From patchwork Wed Jun 22 02:53:51 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xing, Beilei" X-Patchwork-Id: 14181 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 8F620ADF8; Wed, 22 Jun 2016 04:54:00 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 31249ADEC for ; Wed, 22 Jun 2016 04:53:58 +0200 (CEST) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 21 Jun 2016 19:53:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,508,1459839600"; d="scan'208";a="980827787" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga001.jf.intel.com with ESMTP; 21 Jun 2016 19:53:57 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id u5M2rtO2023656; Wed, 22 Jun 2016 10:53:55 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id u5M2rqVn003648; Wed, 22 Jun 2016 10:53:54 +0800 Received: (from beileixi@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u5M2rqEj003644; Wed, 22 Jun 2016 10:53:52 +0800 From: Beilei Xing To: jingjing.wu@intel.com Cc: dev@dpdk.org, Beilei Xing Date: Wed, 22 Jun 2016 10:53:51 +0800 Message-Id: <1466564031-3614-1-git-send-email-beilei.xing@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1465805012-2907-1-git-send-email-beilei.xing@intel.com> References: <1465805012-2907-1-git-send-email-beilei.xing@intel.com> Subject: [dpdk-dev] [PATCH v3] i40e: fix the type issue of a single VLAN type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In current i40e codebase, if single VLAN header is added in a packet, it's treated as inner VLAN. Generally, a single VLAN header is treated as the outer VLAN header. So change corresponding register for single VLAN. Fixes: 19b16e2f6442 ("ethdev: add vlan type when setting ether type") Signed-off-by: Beilei Xing --- v3 changes: Note it as a "fixed issue" in the i40e driver. Reword the title. v2 changes: Combine corresponding i40e driver changes into this patch. doc/guides/rel_notes/release_16_07.rst | 7 +++++++ drivers/net/i40e/i40e_ethdev.c | 29 ++++++++++++++++++++--------- lib/librte_ether/rte_ethdev.h | 4 ++-- 3 files changed, 29 insertions(+), 11 deletions(-) diff --git a/doc/guides/rel_notes/release_16_07.rst b/doc/guides/rel_notes/release_16_07.rst index 7aeacb2..f6912a7 100644 --- a/doc/guides/rel_notes/release_16_07.rst +++ b/doc/guides/rel_notes/release_16_07.rst @@ -113,6 +113,13 @@ Drivers info to descriptor. Now this issue is fixed by disabling vlan stripping from inner header. +* **i40e: Fixed the type issue of a single VLAN type.** + + Currently, if a single VLAN header is added in a packet, it's treated + as inner VLAN. But generally, a single VLAN header is treated as the + outer VLAN header. + This issue is fixed by changing corresponding register for single VLAN. + Libraries ~~~~~~~~~ diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index f94ad87..838889e 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -924,12 +924,6 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) "VLAN ether type"); goto err_setup_pf_switch; } - ret = i40e_vlan_tpid_set(dev, ETH_VLAN_TYPE_INNER, ETHER_TYPE_VLAN); - if (ret != I40E_SUCCESS) { - PMD_INIT_LOG(ERR, "Failed to set the default outer " - "VLAN ether type"); - goto err_setup_pf_switch; - } /* PF setup, which includes VSI setup */ ret = i40e_pf_setup(pf); @@ -2442,13 +2436,24 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev, uint64_t reg_r = 0, reg_w = 0; uint16_t reg_id = 0; int ret = 0; + int qinq = dev->data->dev_conf.rxmode.hw_vlan_extend; switch (vlan_type) { case ETH_VLAN_TYPE_OUTER: - reg_id = 2; + if (qinq) + reg_id = 2; + else + reg_id = 3; break; case ETH_VLAN_TYPE_INNER: - reg_id = 3; + if (qinq) + reg_id = 3; + else { + ret = -EINVAL; + PMD_DRV_LOG(ERR, "Unsupported vlan type" + "in single vlan.\n"); + return ret; + } break; default: ret = -EINVAL; @@ -2510,8 +2515,14 @@ i40e_vlan_offload_set(struct rte_eth_dev *dev, int mask) } if (mask & ETH_VLAN_EXTEND_MASK) { - if (dev->data->dev_conf.rxmode.hw_vlan_extend) + if (dev->data->dev_conf.rxmode.hw_vlan_extend) { i40e_vsi_config_double_vlan(vsi, TRUE); + /* Set global registers with default ether type value */ + i40e_vlan_tpid_set(dev, ETH_VLAN_TYPE_OUTER, + ETHER_TYPE_VLAN); + i40e_vlan_tpid_set(dev, ETH_VLAN_TYPE_INNER, + ETHER_TYPE_VLAN); + } else i40e_vsi_config_double_vlan(vsi, FALSE); } diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index bd93bf6..6804a86 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -363,8 +363,8 @@ struct rte_eth_rxmode { */ enum rte_vlan_type { ETH_VLAN_TYPE_UNKNOWN = 0, - ETH_VLAN_TYPE_INNER, /**< Single VLAN, or inner VLAN. */ - ETH_VLAN_TYPE_OUTER, /**< Outer VLAN. */ + ETH_VLAN_TYPE_INNER, /**< Inner VLAN. */ + ETH_VLAN_TYPE_OUTER, /**< Single VLAN, or outer VLAN. */ ETH_VLAN_TYPE_MAX, };