From patchwork Wed Jul 5 03:11:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 26487 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 3E8E82B96; Wed, 5 Jul 2017 12:19:07 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id 3C2A62A58; Wed, 5 Jul 2017 12:19:05 +0200 (CEST) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP; 05 Jul 2017 03:19:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,311,1496127600"; d="scan'208";a="121020985" Received: from dpdk777.sh.intel.com ([10.67.111.90]) by orsmga005.jf.intel.com with ESMTP; 05 Jul 2017 03:19:01 -0700 From: Qi Zhang To: jingjing.wu@intel.com, beilei.xing@intel.com Cc: helin.zhang@intel.com, dev@dpdk.org, Qi Zhang , stable@dpdk.org Date: Tue, 4 Jul 2017 23:11:57 -0400 Message-Id: <1499224317-32086-1-git-send-email-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH] net/i40e: fix incorrect PF Rx bytes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Internal Rx packet bytes is over counted, CRC size is be excluded, that cause incorrect Rx bytes or even negative value. Fixes: 0bcdc44510ef ("net/i40e: exclude internal packet's byte count") Cc: stable@dpdk.org Signed-off-by: Qi Zhang --- drivers/net/i40e/i40e_ethdev.c | 56 ++++++++++++++++++++++++++++++++++-------- drivers/net/i40e/i40e_ethdev.h | 8 +++--- 2 files changed, 49 insertions(+), 15 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 80f8bc5..01eabf0 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -2391,14 +2391,35 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) i40e_stat_update_48(hw, I40E_GLV_GORCH(hw->port), I40E_GLV_GORCL(hw->port), pf->offset_loaded, - &pf->internal_rx_bytes_offset, - &pf->internal_rx_bytes); + &pf->internal_stats_offset.rx_bytes, + &pf->internal_stats.rx_bytes); i40e_stat_update_48(hw, I40E_GLV_GOTCH(hw->port), I40E_GLV_GOTCL(hw->port), pf->offset_loaded, - &pf->internal_tx_bytes_offset, - &pf->internal_tx_bytes); + &pf->internal_stats_offset.tx_bytes, + &pf->internal_stats.tx_bytes); + /* Get total internal rx packet count */ + i40e_stat_update_48(hw, I40E_GLV_UPRCH(hw->port), + I40E_GLV_UPRCL(hw->port), + pf->offset_loaded, + &pf->internal_stats_offset.rx_unicast, + &pf->internal_stats.rx_unicast); + i40e_stat_update_48(hw, I40E_GLV_MPRCH(hw->port), + I40E_GLV_MPRCL(hw->port), + pf->offset_loaded, + &pf->internal_stats_offset.rx_multicast, + &pf->internal_stats.rx_multicast); + i40e_stat_update_48(hw, I40E_GLV_BPRCH(hw->port), + I40E_GLV_BPRCL(hw->port), + pf->offset_loaded, + &pf->internal_stats_offset.rx_broadcast, + &pf->internal_stats.rx_broadcast); + + /* exclude CRC size */ + pf->internal_stats.rx_bytes -= (pf->internal_stats.rx_unicast + + pf->internal_stats.rx_multicast + + pf->internal_stats.rx_broadcast) * ETHER_CRC_LEN; /* Get statistics of struct i40e_eth_stats */ i40e_stat_update_48(hw, I40E_GLPRT_GORCH(hw->port), @@ -2421,7 +2442,17 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) * so subtract ETHER_CRC_LEN from the byte counter for each rx packet. */ ns->eth.rx_bytes -= (ns->eth.rx_unicast + ns->eth.rx_multicast + - ns->eth.rx_broadcast) * ETHER_CRC_LEN + pf->internal_rx_bytes; + ns->eth.rx_broadcast) * ETHER_CRC_LEN; + + /* Workaround: it is possible I40E_GLV_UPRC[H/L] is updated before + * I40E_GLPRT_GORCH[H/L], so there is a small window that cause negtive + * value. + */ + if (ns->eth.rx_bytes < pf->internal_stats.rx_bytes) + ns->eth.rx_bytes = 0; + /* exlude internal rx bytes */ + else + ns->eth.rx_bytes -= pf->internal_stats.rx_bytes; i40e_stat_update_32(hw, I40E_GLPRT_RDPC(hw->port), pf->offset_loaded, &os->eth.rx_discards, @@ -2449,7 +2480,14 @@ i40e_read_stats_registers(struct i40e_pf *pf, struct i40e_hw *hw) pf->offset_loaded, &os->eth.tx_broadcast, &ns->eth.tx_broadcast); ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast + - ns->eth.tx_broadcast) * ETHER_CRC_LEN + pf->internal_tx_bytes; + ns->eth.tx_broadcast) * ETHER_CRC_LEN; + + /* exclude internal tx bytes */ + if (ns->eth.tx_bytes < pf->internal_stats.tx_bytes) + ns->eth.tx_bytes = 0; + else + ns->eth.tx_bytes -= pf->internal_stats.tx_bytes; + /* GLPRT_TEPC not supported */ /* additional port specific stats */ @@ -5241,10 +5279,8 @@ i40e_pf_setup(struct i40e_pf *pf) pf->offset_loaded = FALSE; memset(&pf->stats, 0, sizeof(struct i40e_hw_port_stats)); memset(&pf->stats_offset, 0, sizeof(struct i40e_hw_port_stats)); - pf->internal_rx_bytes = 0; - pf->internal_tx_bytes = 0; - pf->internal_rx_bytes_offset = 0; - pf->internal_tx_bytes_offset = 0; + memset(&pf->internal_stats, 0, sizeof(struct i40e_eth_stats)); + memset(&pf->internal_stats_offset, 0, sizeof(struct i40e_eth_stats)); ret = i40e_pf_get_switch_config(pf); if (ret != I40E_SUCCESS) { diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 07677da..4ff8f49 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -665,11 +665,9 @@ struct i40e_pf { struct i40e_hw_port_stats stats_offset; struct i40e_hw_port_stats stats; - /* internal packet byte count, it should be excluded from the total */ - uint64_t internal_rx_bytes; - uint64_t internal_tx_bytes; - uint64_t internal_rx_bytes_offset; - uint64_t internal_tx_bytes_offset; + /* internal packet statistics, it should be excluded from the total */ + struct i40e_eth_stats internal_stats_offset; + struct i40e_eth_stats internal_stats; bool offset_loaded; struct rte_eth_dev_data *dev_data; /* Pointer to the device data */