From patchwork Tue Feb 20 07:33:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 35255 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D6C3C1B343; Tue, 20 Feb 2018 08:35:49 +0100 (CET) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 2B79E1B1C8 for ; Tue, 20 Feb 2018 08:35:24 +0100 (CET) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id 38C876C0055 for ; Tue, 20 Feb 2018 07:35:23 +0000 (UTC) Received: from sfocexch01r.SolarFlarecom.com (10.20.40.34) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:17 -0800 Received: from ocex03.SolarFlarecom.com (10.20.40.36) by sfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:13 -0800 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:13 -0800 Received: from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com [10.17.10.10]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZCfQ024869; Tue, 20 Feb 2018 07:35:12 GMT Received: from uklogin.uk.solarflarecom.com (localhost.localdomain [127.0.0.1]) by uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZBtL020529; Tue, 20 Feb 2018 07:35:12 GMT From: Andrew Rybchenko To: CC: Andy Moreton Date: Tue, 20 Feb 2018 07:33:27 +0000 Message-ID: <1519112078-20113-10-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> References: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-MDID: 1519112123-4oSKK3SB4nN6 Subject: [dpdk-dev] [PATCH 09/80] net/sfc/base: move RxDP config get to EF10 NIC code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Andy Moreton Signed-off-by: Andy Moreton Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_impl.h | 5 ++++ drivers/net/sfc/base/ef10_nic.c | 58 +++++++++++++++++++++++++++++++++++++ drivers/net/sfc/base/medford2_nic.c | 58 ------------------------------------- drivers/net/sfc/base/medford_nic.c | 58 ------------------------------------- 4 files changed, 63 insertions(+), 116 deletions(-) diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h index 164e9cc..e004d15 100644 --- a/drivers/net/sfc/base/ef10_impl.h +++ b/drivers/net/sfc/base/ef10_impl.h @@ -1145,6 +1145,11 @@ efx_mcdi_get_clock( extern __checkReturn efx_rc_t +efx_mcdi_get_rxdp_config( + __in efx_nic_t *enp, + __out uint32_t *end_paddingp); + +extern __checkReturn efx_rc_t efx_mcdi_get_vector_cfg( __in efx_nic_t *enp, __out_opt uint32_t *vec_basep, diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c index 311132d..8b9ef15 100644 --- a/drivers/net/sfc/base/ef10_nic.c +++ b/drivers/net/sfc/base/ef10_nic.c @@ -424,6 +424,64 @@ efx_mcdi_get_clock( } __checkReturn efx_rc_t +efx_mcdi_get_rxdp_config( + __in efx_nic_t *enp, + __out uint32_t *end_paddingp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN, + MC_CMD_GET_RXDP_CONFIG_OUT_LEN)]; + uint32_t end_padding; + efx_rc_t rc; + + memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_RXDP_CONFIG; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN; + + efx_mcdi_execute(enp, &req); + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, + GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) { + /* RX DMA end padding is disabled */ + end_padding = 0; + } else { + switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, + GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) { + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64: + end_padding = 64; + break; + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128: + end_padding = 128; + break; + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256: + end_padding = 256; + break; + default: + rc = ENOTSUP; + goto fail2; + } + } + + *end_paddingp = end_padding; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return (rc); +} + + __checkReturn efx_rc_t efx_mcdi_get_vector_cfg( __in efx_nic_t *enp, __out_opt uint32_t *vec_basep, diff --git a/drivers/net/sfc/base/medford2_nic.c b/drivers/net/sfc/base/medford2_nic.c index 8873211..4faf786 100644 --- a/drivers/net/sfc/base/medford2_nic.c +++ b/drivers/net/sfc/base/medford2_nic.c @@ -11,64 +11,6 @@ #if EFSYS_OPT_MEDFORD2 static __checkReturn efx_rc_t -efx_mcdi_get_rxdp_config( - __in efx_nic_t *enp, - __out uint32_t *end_paddingp) -{ - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN, - MC_CMD_GET_RXDP_CONFIG_OUT_LEN)]; - uint32_t end_padding; - efx_rc_t rc; - - memset(payload, 0, sizeof (payload)); - req.emr_cmd = MC_CMD_GET_RXDP_CONFIG; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN; - - efx_mcdi_execute(enp, &req); - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, - GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) { - /* RX DMA end padding is disabled */ - end_padding = 0; - } else { - switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, - GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) { - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64: - end_padding = 64; - break; - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128: - end_padding = 128; - break; - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256: - end_padding = 256; - break; - default: - rc = ENOTSUP; - goto fail2; - } - } - - *end_paddingp = end_padding; - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, efx_rc_t, rc); - - return (rc); -} - -static __checkReturn efx_rc_t medford2_nic_get_required_pcie_bandwidth( __in efx_nic_t *enp, __out uint32_t *bandwidth_mbpsp) diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c index 9b91a82..9a92153 100644 --- a/drivers/net/sfc/base/medford_nic.c +++ b/drivers/net/sfc/base/medford_nic.c @@ -11,64 +11,6 @@ #if EFSYS_OPT_MEDFORD static __checkReturn efx_rc_t -efx_mcdi_get_rxdp_config( - __in efx_nic_t *enp, - __out uint32_t *end_paddingp) -{ - efx_mcdi_req_t req; - uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN, - MC_CMD_GET_RXDP_CONFIG_OUT_LEN)]; - uint32_t end_padding; - efx_rc_t rc; - - memset(payload, 0, sizeof (payload)); - req.emr_cmd = MC_CMD_GET_RXDP_CONFIG; - req.emr_in_buf = payload; - req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN; - req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN; - - efx_mcdi_execute(enp, &req); - if (req.emr_rc != 0) { - rc = req.emr_rc; - goto fail1; - } - - if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, - GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) { - /* RX DMA end padding is disabled */ - end_padding = 0; - } else { - switch (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, - GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) { - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64: - end_padding = 64; - break; - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128: - end_padding = 128; - break; - case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256: - end_padding = 256; - break; - default: - rc = ENOTSUP; - goto fail2; - } - } - - *end_paddingp = end_padding; - - return (0); - -fail2: - EFSYS_PROBE(fail2); -fail1: - EFSYS_PROBE1(fail1, efx_rc_t, rc); - - return (rc); -} - -static __checkReturn efx_rc_t medford_nic_get_required_pcie_bandwidth( __in efx_nic_t *enp, __out uint32_t *bandwidth_mbpsp)