From patchwork Tue Feb 20 07:33:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 35271 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 290851B3D5; Tue, 20 Feb 2018 08:36:06 +0100 (CET) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 19C221B1CA for ; Tue, 20 Feb 2018 08:35:32 +0100 (CET) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id CE2F29C005C for ; Tue, 20 Feb 2018 07:35:30 +0000 (UTC) Received: from sfocexch01r.SolarFlarecom.com (10.20.40.34) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:28 -0800 Received: from ocex03.SolarFlarecom.com (10.20.40.36) by sfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:14 -0800 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:14 -0800 Received: from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com [10.17.10.10]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZDt1025003; Tue, 20 Feb 2018 07:35:13 GMT Received: from uklogin.uk.solarflarecom.com (localhost.localdomain [127.0.0.1]) by uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZBtg020529; Tue, 20 Feb 2018 07:35:13 GMT From: Andrew Rybchenko To: CC: Andy Moreton Date: Tue, 20 Feb 2018 07:33:48 +0000 Message-ID: <1519112078-20113-31-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> References: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-MDID: 1519112131-JYefSz2VyDpu Subject: [dpdk-dev] [PATCH 30/80] net/sfc/base: report memory BAR number X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Andy Moreton On Medford and earlier controllers the BAR layout is: PF BAR 0: (32bit I/O) I/O mapped registers PF BAR 2: (64bit Mem) Memory mapped registers (VI aperture) PF BAR 4: (64bit Mem) MSI-X tables VF BAR 0: (64bit Mem) Memory mapped registers (VI aperture) VF BAR 2: (64bit Mem) MSI-X tables On Medford2, the layout is: PF/VF BAR 0: (64bit Mem) Memory mapped registers (VI aperture) PF/VF BAR 2: (64bit Mem) MSI-X tables Make the VI aperture BAR number available for drivers that need it. Remove EFX_MEM_BAR define as it it is not correct on all platforms. Signed-off-by: Andy Moreton Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/efx.h | 15 +++++++++++++-- drivers/net/sfc/base/efx_nic.c | 26 ++++++++++---------------- drivers/net/sfc/sfc.c | 40 ++++++++++++++++------------------------ 3 files changed, 39 insertions(+), 42 deletions(-) diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index b038029..6149abf 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -48,7 +48,8 @@ extern __checkReturn efx_rc_t efx_family( __in uint16_t venid, __in uint16_t devid, - __out efx_family_t *efp); + __out efx_family_t *efp, + __out unsigned int *membarp); #define EFX_PCI_VENID_SFC 0x1924 @@ -74,7 +75,17 @@ efx_family( #define EFX_PCI_DEVID_MEDFORD2 0x0B03 /* SFC9250 PF */ #define EFX_PCI_DEVID_MEDFORD2_VF 0x1B03 /* SFC9250 VF */ -#define EFX_MEM_BAR 2 + +#define EFX_MEM_BAR_SIENA 2 + +#define EFX_MEM_BAR_HUNTINGTON_PF 2 +#define EFX_MEM_BAR_HUNTINGTON_VF 0 + +#define EFX_MEM_BAR_MEDFORD_PF 2 +#define EFX_MEM_BAR_MEDFORD_VF 0 + +#define EFX_MEM_BAR_MEDFORD2 0 + /* Error codes */ diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c index 7f32959..bce0def 100644 --- a/drivers/net/sfc/base/efx_nic.c +++ b/drivers/net/sfc/base/efx_nic.c @@ -7,11 +7,13 @@ #include "efx.h" #include "efx_impl.h" + __checkReturn efx_rc_t efx_family( __in uint16_t venid, __in uint16_t devid, - __out efx_family_t *efp) + __out efx_family_t *efp, + __out unsigned int *membarp) { if (venid == EFX_PCI_VENID_SFC) { switch (devid) { @@ -21,12 +23,10 @@ efx_family( * Hardware default for PF0 of uninitialised Siena. * manftest must be able to cope with this device id. */ - *efp = EFX_FAMILY_SIENA; - return (0); - case EFX_PCI_DEVID_BETHPAGE: case EFX_PCI_DEVID_SIENA: *efp = EFX_FAMILY_SIENA; + *membarp = EFX_MEM_BAR_SIENA; return (0); #endif /* EFSYS_OPT_SIENA */ @@ -36,17 +36,16 @@ efx_family( * Hardware default for PF0 of uninitialised Huntington. * manftest must be able to cope with this device id. */ - *efp = EFX_FAMILY_HUNTINGTON; - return (0); - case EFX_PCI_DEVID_FARMINGDALE: case EFX_PCI_DEVID_GREENPORT: *efp = EFX_FAMILY_HUNTINGTON; + *membarp = EFX_MEM_BAR_HUNTINGTON_PF; return (0); case EFX_PCI_DEVID_FARMINGDALE_VF: case EFX_PCI_DEVID_GREENPORT_VF: *efp = EFX_FAMILY_HUNTINGTON; + *membarp = EFX_MEM_BAR_HUNTINGTON_VF; return (0); #endif /* EFSYS_OPT_HUNTINGTON */ @@ -56,15 +55,14 @@ efx_family( * Hardware default for PF0 of uninitialised Medford. * manftest must be able to cope with this device id. */ - *efp = EFX_FAMILY_MEDFORD; - return (0); - case EFX_PCI_DEVID_MEDFORD: *efp = EFX_FAMILY_MEDFORD; + *membarp = EFX_MEM_BAR_MEDFORD_PF; return (0); case EFX_PCI_DEVID_MEDFORD_VF: *efp = EFX_FAMILY_MEDFORD; + *membarp = EFX_MEM_BAR_MEDFORD_VF; return (0); #endif /* EFSYS_OPT_MEDFORD */ @@ -74,15 +72,10 @@ efx_family( * Hardware default for PF0 of uninitialised Medford2. * manftest must be able to cope with this device id. */ - *efp = EFX_FAMILY_MEDFORD2; - return (0); - case EFX_PCI_DEVID_MEDFORD2: - *efp = EFX_FAMILY_MEDFORD2; - return (0); - case EFX_PCI_DEVID_MEDFORD2_VF: *efp = EFX_FAMILY_MEDFORD2; + *membarp = EFX_MEM_BAR_MEDFORD2; return (0); #endif /* EFSYS_OPT_MEDFORD2 */ @@ -96,6 +89,7 @@ efx_family( return (ENOTSUP); } + #if EFSYS_OPT_SIENA static const efx_nic_ops_t __efx_nic_siena_ops = { diff --git a/drivers/net/sfc/sfc.c b/drivers/net/sfc/sfc.c index ac5fdca..7eb9305 100644 --- a/drivers/net/sfc/sfc.c +++ b/drivers/net/sfc/sfc.c @@ -530,27 +530,18 @@ sfc_close(struct sfc_adapter *sa) } static int -sfc_mem_bar_init(struct sfc_adapter *sa) +sfc_mem_bar_init(struct sfc_adapter *sa, unsigned int membar) { struct rte_eth_dev *eth_dev = sa->eth_dev; struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); efsys_bar_t *ebp = &sa->mem_bar; - unsigned int i; - struct rte_mem_resource *res; - - for (i = 0; i < RTE_DIM(pci_dev->mem_resource); i++) { - res = &pci_dev->mem_resource[i]; - if ((res->len != 0) && (res->phys_addr != 0)) { - /* Found first memory BAR */ - SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name); - ebp->esb_rid = i; - ebp->esb_dev = pci_dev; - ebp->esb_base = res->addr; - return 0; - } - } + struct rte_mem_resource *res = &pci_dev->mem_resource[membar]; - return EFAULT; + SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name); + ebp->esb_rid = membar; + ebp->esb_dev = pci_dev; + ebp->esb_base = res->addr; + return 0; } static void @@ -753,6 +744,7 @@ int sfc_probe(struct sfc_adapter *sa) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev); + unsigned int membar; efx_nic_t *enp; int rc; @@ -763,17 +755,17 @@ sfc_probe(struct sfc_adapter *sa) sa->socket_id = rte_socket_id(); rte_atomic32_init(&sa->restart_required); - sfc_log_init(sa, "init mem bar"); - rc = sfc_mem_bar_init(sa); - if (rc != 0) - goto fail_mem_bar_init; - sfc_log_init(sa, "get family"); rc = efx_family(pci_dev->id.vendor_id, pci_dev->id.device_id, - &sa->family); + &sa->family, &membar); if (rc != 0) goto fail_family; - sfc_log_init(sa, "family is %u", sa->family); + sfc_log_init(sa, "family is %u, membar is %u", sa->family, membar); + + sfc_log_init(sa, "init mem bar"); + rc = sfc_mem_bar_init(sa, membar); + if (rc != 0) + goto fail_mem_bar_init; sfc_log_init(sa, "create nic"); rte_spinlock_init(&sa->nic_lock); @@ -804,10 +796,10 @@ sfc_probe(struct sfc_adapter *sa) efx_nic_destroy(enp); fail_nic_create: -fail_family: sfc_mem_bar_fini(sa); fail_mem_bar_init: +fail_family: sfc_log_init(sa, "failed %d", rc); return rc; }