From patchwork Tue Feb 20 07:34:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 35298 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7E2181B6C5; Tue, 20 Feb 2018 08:36:37 +0100 (CET) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 2868B1B3C2 for ; Tue, 20 Feb 2018 08:36:05 +0100 (CET) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1-us4.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id 2C017B40059 for ; Tue, 20 Feb 2018 07:36:04 +0000 (UTC) Received: from sfocexch01r.SolarFlarecom.com (10.20.40.34) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:36:01 -0800 Received: from ocex03.SolarFlarecom.com (10.20.40.36) by sfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Mon, 19 Feb 2018 23:35:17 -0800 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25 via Frontend Transport; Mon, 19 Feb 2018 23:35:16 -0800 Received: from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com [10.17.10.10]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZFKK025307; Tue, 20 Feb 2018 07:35:15 GMT Received: from uklogin.uk.solarflarecom.com (localhost.localdomain [127.0.0.1]) by uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w1K7ZBuU020529; Tue, 20 Feb 2018 07:35:15 GMT From: Andrew Rybchenko To: CC: Andy Moreton Date: Tue, 20 Feb 2018 07:34:36 +0000 Message-ID: <1519112078-20113-79-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> References: <1519112078-20113-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-MDID: 1519112164-9ThLEIHQ9++O Subject: [dpdk-dev] [PATCH 78/80] net/sfc/base: add firmware image layout option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Andy Moreton Signed-off-by: Andy Moreton Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/Makefile | 1 + drivers/net/sfc/base/ef10_image.c | 20 ++++++++ drivers/net/sfc/base/ef10_signed_image_layout.h | 62 +++++++++++++++++++++++++ drivers/net/sfc/base/efx_check.h | 7 +++ drivers/net/sfc/base/meson.build | 1 + drivers/net/sfc/efsys.h | 1 + 6 files changed, 92 insertions(+) create mode 100644 drivers/net/sfc/base/ef10_image.c create mode 100644 drivers/net/sfc/base/ef10_signed_image_layout.h diff --git a/drivers/net/sfc/Makefile b/drivers/net/sfc/Makefile index 32b13dd..d2decd0 100644 --- a/drivers/net/sfc/Makefile +++ b/drivers/net/sfc/Makefile @@ -115,6 +115,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += siena_vpd.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_ev.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_filter.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_intr.c +SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_image.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_mac.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_mcdi.c SRCS-$(CONFIG_RTE_LIBRTE_SFC_EFX_PMD) += ef10_nic.c diff --git a/drivers/net/sfc/base/ef10_image.c b/drivers/net/sfc/base/ef10_image.c new file mode 100644 index 0000000..e076f40 --- /dev/null +++ b/drivers/net/sfc/base/ef10_image.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2017-2018 Solarflare Communications Inc. + * All rights reserved. + */ + +#include "efx.h" +#include "efx_impl.h" + +#if EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 + +#if EFSYS_OPT_IMAGE_LAYOUT + +#include "ef10_signed_image_layout.h" + + + +#endif /* EFSYS_OPT_IMAGE_LAYOUT */ + +#endif /* EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */ diff --git a/drivers/net/sfc/base/ef10_signed_image_layout.h b/drivers/net/sfc/base/ef10_signed_image_layout.h new file mode 100644 index 0000000..a35d160 --- /dev/null +++ b/drivers/net/sfc/base/ef10_signed_image_layout.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2016-2018 Solarflare Communications Inc. + * All rights reserved. + */ + +/* These structures define the layouts for the signed firmware image binary + * saved in NVRAM. The original image is in the Cryptographic message + * syntax (CMS) format which contains the bootable firmware binary plus the + * signatures. The entire image is written into NVRAM to enable the firmware + * to validate the signatures. However, the bootrom still requires the + * bootable-image to start at offset 0 of the NVRAM partition. Hence the image + * is parsed upfront by host utilities (sfupdate) and written into nvram as + * 'signed_image_chunks' described by a header. + * + * This file is used by the MC as well as host-utilities (sfupdate). + */ + + +#ifndef CI_MGMT_SIGNED_IMAGE_LAYOUT_H +#define CI_MGMT_SIGNED_IMAGE_LAYOUT_H + +/* Signed image chunk type identifiers */ +enum { + SIGNED_IMAGE_CHUNK_CMS_HEADER, /* CMS header describing the signed data */ + SIGNED_IMAGE_CHUNK_REFLASH_HEADER, /* Reflash header */ + SIGNED_IMAGE_CHUNK_IMAGE, /* Bootable binary image */ + SIGNED_IMAGE_CHUNK_REFLASH_TRAILER, /* Reflash trailer */ + SIGNED_IMAGE_CHUNK_SIGNATURE, /* Remaining contents of the signed image, + * including the certifiates and signature */ + NUM_SIGNED_IMAGE_CHUNKS, +}; + +/* Magic */ +#define SIGNED_IMAGE_CHUNK_HDR_MAGIC 0xEF105161 /* EF10 SIGned Image */ + +/* Initial version definition - version 1 */ +#define SIGNED_IMAGE_CHUNK_HDR_VERSION 0x1 + +/* Header length is 32 bytes */ +#define SIGNED_IMAGE_CHUNK_HDR_LEN 32 +/* Structure describing the header of each chunk of signed image + * as stored in nvram + */ +typedef struct signed_image_chunk_hdr_e { + /* Magic field to recognise a valid entry + * should match SIGNED_IMAGE_CHUNK_HDR_MAGIC + */ + uint32_t magic; + /* Version number of this header */ + uint32_t version; + /* Chunk type identifier */ + uint32_t id; + /* Chunk offset */ + uint32_t offset; + /* Chunk length */ + uint32_t len; + /* Reserved for future expansion of this structure - always set to zeros */ + uint32_t reserved[3]; +} signed_image_chunk_hdr_t; + +#endif /* CI_MGMT_SIGNED_IMAGE_LAYOUT_H */ diff --git a/drivers/net/sfc/base/efx_check.h b/drivers/net/sfc/base/efx_check.h index 77ed0b0..5512e29 100644 --- a/drivers/net/sfc/base/efx_check.h +++ b/drivers/net/sfc/base/efx_check.h @@ -182,6 +182,13 @@ # endif #endif /* EFSYS_OPT_NVRAM */ +#if EFSYS_OPT_IMAGE_LAYOUT +/* Support signed image layout handling */ +# if !(EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2) +# error "IMAGE_LAYOUT requires MEDFORD or MEDFORD2" +# endif +#endif /* EFSYS_OPT_IMAGE_LAYOUT */ + #ifdef EFSYS_OPT_NVRAM_FALCON_BOOTROM # error "NVRAM_FALCON_BOOTROM is obsolete and is not supported." #endif diff --git a/drivers/net/sfc/base/meson.build b/drivers/net/sfc/base/meson.build index a67a638..da2bf44 100644 --- a/drivers/net/sfc/base/meson.build +++ b/drivers/net/sfc/base/meson.build @@ -34,6 +34,7 @@ sources = [ 'siena_vpd.c', 'ef10_ev.c', 'ef10_filter.c', + 'ef10_image.c', 'ef10_intr.c', 'ef10_mac.c', 'ef10_mcdi.c', diff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h index 7958483..f20b667 100644 --- a/drivers/net/sfc/efsys.h +++ b/drivers/net/sfc/efsys.h @@ -178,6 +178,7 @@ prefetch_read_once(const volatile void *addr) #define EFSYS_OPT_VPD 0 #define EFSYS_OPT_NVRAM 0 #define EFSYS_OPT_BOOTCFG 0 +#define EFSYS_OPT_IMAGE_LAYOUT 0 #define EFSYS_OPT_DIAG 0 #define EFSYS_OPT_RX_SCALE 1