@@ -129,7 +129,7 @@ cperf_latency_test_runner(void *arg)
uint8_t burst_size_idx = 0;
uint32_t imix_idx = 0;
- static int only_once;
+ static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
if (ctx == NULL)
return 0;
@@ -311,7 +311,7 @@ cperf_latency_test_runner(void *arg)
time_min = tunit*(double)(tsc_min) / tsc_hz;
if (ctx->options->csv) {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, "
"Packet Size, cycles, time (us)");
@@ -326,7 +326,6 @@ cperf_latency_test_runner(void *arg)
/ tsc_hz);
}
- only_once = 1;
} else {
printf("\n# Device %d on lcore %u\n", ctx->dev_id,
ctx->lcore_id);
@@ -391,7 +391,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
state.lcore = rte_lcore_id();
state.linearize = 0;
- static int only_once;
+ static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
static bool warmup = true;
/*
@@ -437,13 +437,12 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
}
if (!opts->csv) {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
"Burst Size", "Enqueued",
"Dequeued", "Enq Retries",
"Deq Retries", "Cycles/Op",
"Cycles/Enq", "Cycles/Deq");
- only_once = 1;
printf(PRETTY_LINE_FMT, state.ctx->lcore_id,
opts->test_buffer_size, test_burst_size,
@@ -454,13 +453,12 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx)
state.cycles_per_enq,
state.cycles_per_deq);
} else {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
"Burst Size", "Enqueued",
"Dequeued", "Enq Retries",
"Deq Retries", "Cycles/Op",
"Cycles/Enq", "Cycles/Deq");
- only_once = 1;
printf(CSV_LINE_FMT, state.ctx->lcore_id,
opts->test_buffer_size, test_burst_size,
@@ -95,7 +95,7 @@ cperf_throughput_test_runner(void *test_ctx)
uint8_t burst_size_idx = 0;
uint32_t imix_idx = 0;
- static int only_once;
+ static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
struct rte_crypto_op *ops[ctx->options->max_burst_size];
struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
@@ -262,13 +262,12 @@ cperf_throughput_test_runner(void *test_ctx)
ctx->options->total_ops);
if (!ctx->options->csv) {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
"lcore id", "Buf Size", "Burst Size",
"Enqueued", "Dequeued", "Failed Enq",
"Failed Deq", "MOps", "Gbps",
"Cycles/Buf");
- only_once = 1;
printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64
"%12"PRIu64"%12.4f%12.4f%12.2f\n",
@@ -283,12 +282,11 @@ cperf_throughput_test_runner(void *test_ctx)
throughput_gbps,
cycles_per_packet);
} else {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf("#lcore id,Buffer Size(B),"
"Burst Size,Enqueued,Dequeued,Failed Enq,"
"Failed Deq,Ops(Millions),Throughput(Gbps),"
"Cycles/Buf\n\n");
- only_once = 1;
printf("%u;%u;%u;%"PRIu64";%"PRIu64";%"PRIu64";%"PRIu64";"
"%.3f;%.3f;%.3f\n",
@@ -233,7 +233,7 @@ cperf_verify_test_runner(void *test_ctx)
uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;
uint64_t ops_failed = 0;
- static int only_once;
+ static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
uint64_t i;
uint16_t ops_unused = 0;
@@ -376,12 +376,11 @@ cperf_verify_test_runner(void *test_ctx)
}
if (!ctx->options->csv) {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf("%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
"lcore id", "Buf Size", "Burst size",
"Enqueued", "Dequeued", "Failed Enq",
"Failed Deq", "Failed Ops");
- only_once = 1;
printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64
"%12"PRIu64"%12"PRIu64"\n",
@@ -394,11 +393,10 @@ cperf_verify_test_runner(void *test_ctx)
ops_deqd_failed,
ops_failed);
} else {
- if (!only_once)
+ if (rte_atomic16_test_and_set(&display_once))
printf("\n# lcore id, Buffer Size(B), "
"Burst Size,Enqueued,Dequeued,Failed Enq,"
"Failed Deq,Failed Ops\n");
- only_once = 1;
printf("%10u;%10u;%u;%"PRIu64";%"PRIu64";%"PRIu64";%"PRIu64";"
"%"PRIu64"\n",