[v2,1/4] event/octeontx2: add switch tag flush op
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Commit Message
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add SWTAG flush operation at the end of transmit sequence to
immediately release the tag held by the core.
Reuse Tag address to check SWTAG completion status.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/octeontx2/otx2_evdev.c | 2 +-
drivers/event/octeontx2/otx2_evdev.h | 18 +++++++++---------
drivers/event/octeontx2/otx2_worker.h | 27 +++++++++++++--------------
3 files changed, 23 insertions(+), 24 deletions(-)
Comments
On Fri, Oct 9, 2020 at 12:19 AM Harman Kalra <hkalra@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add SWTAG flush operation at the end of transmit sequence to
> immediately release the tag held by the core.
> Reuse Tag address to check SWTAG completion status.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Applied to driver-specific patches(1 to 3)to
dpdk-next-net-evntdev/for-main. Thanks.
Waiting for feedback on the non-driver-specific 4/4 patch[1]
[1]
http://patches.dpdk.org/patch/80076/
@@ -771,7 +771,7 @@ sso_set_port_ops(struct otx2_ssogws *ws, uintptr_t base)
ws->tag_op = base + SSOW_LF_GWS_TAG;
ws->wqp_op = base + SSOW_LF_GWS_WQP;
ws->getwrk_op = base + SSOW_LF_GWS_OP_GET_WORK;
- ws->swtp_op = base + SSOW_LF_GWS_SWTP;
+ ws->swtag_flush_op = base + SSOW_LF_GWS_OP_SWTAG_FLUSH;
ws->swtag_norm_op = base + SSOW_LF_GWS_OP_SWTAG_NORM;
ws->swtag_desched_op = base + SSOW_LF_GWS_OP_SWTAG_DESCHED;
}
@@ -162,15 +162,15 @@ struct otx2_sso_evdev {
struct otx2_timesync_info *tstamp;
} __rte_cache_aligned;
-#define OTX2_SSOGWS_OPS \
- /* WS ops */ \
- uintptr_t getwrk_op; \
- uintptr_t tag_op; \
- uintptr_t wqp_op; \
- uintptr_t swtp_op; \
- uintptr_t swtag_norm_op; \
- uintptr_t swtag_desched_op; \
- uint8_t cur_tt; \
+#define OTX2_SSOGWS_OPS \
+ /* WS ops */ \
+ uintptr_t getwrk_op; \
+ uintptr_t tag_op; \
+ uintptr_t wqp_op; \
+ uintptr_t swtag_flush_op; \
+ uintptr_t swtag_norm_op; \
+ uintptr_t swtag_desched_op; \
+ uint8_t cur_tt; \
uint8_t cur_grp
/* Event port aka GWS */
@@ -190,8 +190,7 @@ otx2_ssogws_swtag_untag(struct otx2_ssogws *ws)
static __rte_always_inline void
otx2_ssogws_swtag_flush(struct otx2_ssogws *ws)
{
- otx2_write64(0, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
- SSOW_LF_GWS_OP_SWTAG_FLUSH);
+ otx2_write64(0, ws->swtag_flush_op);
ws->cur_tt = SSO_SYNC_EMPTY;
}
@@ -208,20 +207,18 @@ otx2_ssogws_swtag_wait(struct otx2_ssogws *ws)
#ifdef RTE_ARCH_ARM64
uint64_t swtp;
- asm volatile (
- " ldr %[swtb], [%[swtp_loc]] \n"
- " cbz %[swtb], done%= \n"
- " sevl \n"
- "rty%=: wfe \n"
- " ldr %[swtb], [%[swtp_loc]] \n"
- " cbnz %[swtb], rty%= \n"
- "done%=: \n"
- : [swtb] "=&r" (swtp)
- : [swtp_loc] "r" (ws->swtp_op)
- );
+ asm volatile(" ldr %[swtb], [%[swtp_loc]] \n"
+ " tbz %[swtb], 62, done%= \n"
+ " sevl \n"
+ "rty%=: wfe \n"
+ " ldr %[swtb], [%[swtp_loc]] \n"
+ " tbnz %[swtb], 62, rty%= \n"
+ "done%=: \n"
+ : [swtb] "=&r" (swtp)
+ : [swtp_loc] "r" (ws->tag_op));
#else
/* Wait for the SWTAG/SWTAG_FULL operation */
- while (otx2_read64(ws->swtp_op))
+ while (otx2_read64(ws->tag_op) & BIT_ULL(62))
;
#endif
}
@@ -309,6 +306,8 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[],
otx2_nix_xmit_one(cmd, txq->lmt_addr, txq->io_addr, flags);
}
+ otx2_write64(0, ws->swtag_flush_op);
+
return 1;
}