From patchwork Tue May 14 16:35:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tyler Retzlaff X-Patchwork-Id: 140108 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C166D44024; Tue, 14 May 2024 18:40:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B1F0542D35; Tue, 14 May 2024 18:36:51 +0200 (CEST) Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182]) by mails.dpdk.org (Postfix) with ESMTP id 5227840A6E for ; Tue, 14 May 2024 18:36:09 +0200 (CEST) Received: by linux.microsoft.com (Postfix, from userid 1086) id 76F4420B2CB0; Tue, 14 May 2024 09:36:00 -0700 (PDT) DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com 76F4420B2CB0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com; s=default; t=1715704562; bh=v+eFkx/KOnmL4syGice03b0XW5NzkGC9tOrIIje0Cms=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XqY42z4vnFRaMHSVvsUSODyw41qE4yvopHtXxE6dgakNE41WfM0znzaDDIqETRgGG kSpMSgMhB7re2WFtadrQsfxXoT+f6bSXeDUmBs3/SVGSATpr/QARecEDrT0ZwzE89/ 163QYtc7y4x70X3QbjuieM7zIMgD347TxPU8/4j0= From: Tyler Retzlaff To: dev@dpdk.org Cc: =?utf-8?q?Mattias_R=C3=B6nnblom?= , =?utf-8?q?Morten_Br=C3=B8rup?= , Abdullah Sevincer , Ajit Khaparde , Alok Prasad , Anatoly Burakov , Andrew Rybchenko , Anoob Joseph , Bruce Richardson , Byron Marohn , Chenbo Xia , Chengwen Feng , Ciara Loftus , Ciara Power , Dariusz Sosnowski , David Hunt , Devendra Singh Rawat , Erik Gabriel Carrillo , Guoyang Zhou , Harman Kalra , Harry van Haaren , Honnappa Nagarahalli , Jakub Grajciar , Jerin Jacob , Jeroen de Borst , Jian Wang , Jiawen Wu , Jie Hai , Jingjing Wu , Joshua Washington , Joyce Kong , Junfeng Guo , Kevin Laatz , Konstantin Ananyev , Liang Ma , Long Li , Maciej Czekaj , Matan Azrad , Maxime Coquelin , Nicolas Chautru , Ori Kam , Pavan Nikhilesh , Peter Mccarthy , Rahul Lakkireddy , Reshma Pattan , Rosen Xu , Ruifeng Wang , Rushil Gupta , Sameh Gobriel , Sivaprasad Tummala , Somnath Kotur , Stephen Hemminger , Suanming Mou , Sunil Kumar Kori , Sunil Uttarwar , Tetsuya Mukawa , Vamsi Attunuru , Viacheslav Ovsiienko , Vladimir Medvedkin , Xiaoyun Wang , Yipeng Wang , Yisen Zhuang , Ziyang Xuan , Tyler Retzlaff Subject: [PATCH v6 35/45] dma/idxd: use rte stdatomic API Date: Tue, 14 May 2024 09:35:49 -0700 Message-Id: <1715704559-15839-36-git-send-email-roretzla@linux.microsoft.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1715704559-15839-1-git-send-email-roretzla@linux.microsoft.com> References: <1710967892-7046-1-git-send-email-roretzla@linux.microsoft.com> <1715704559-15839-1-git-send-email-roretzla@linux.microsoft.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding rte_atomic_xxx optional rte stdatomic API. Signed-off-by: Tyler Retzlaff Acked-by: Stephen Hemminger --- drivers/dma/idxd/idxd_internal.h | 2 +- drivers/dma/idxd/idxd_pci.c | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/dma/idxd/idxd_internal.h b/drivers/dma/idxd/idxd_internal.h index cd41777..537cf9b 100644 --- a/drivers/dma/idxd/idxd_internal.h +++ b/drivers/dma/idxd/idxd_internal.h @@ -33,7 +33,7 @@ struct idxd_pci_common { rte_spinlock_t lk; uint8_t wq_cfg_sz; - uint16_t ref_count; + RTE_ATOMIC(uint16_t) ref_count; volatile struct rte_idxd_bar0 *regs; volatile uint32_t *wq_regs_base; volatile struct rte_idxd_grpcfg *grp_regs; diff --git a/drivers/dma/idxd/idxd_pci.c b/drivers/dma/idxd/idxd_pci.c index a78889a..06fa115 100644 --- a/drivers/dma/idxd/idxd_pci.c +++ b/drivers/dma/idxd/idxd_pci.c @@ -136,7 +136,8 @@ * the PCI struct */ /* NOTE: review for potential ordering optimization */ - is_last_wq = (__atomic_fetch_sub(&idxd->u.pci->ref_count, 1, __ATOMIC_SEQ_CST) == 1); + is_last_wq = (rte_atomic_fetch_sub_explicit(&idxd->u.pci->ref_count, 1, + rte_memory_order_seq_cst) == 1); if (is_last_wq) { /* disable the device */ err_code = idxd_pci_dev_command(idxd, idxd_disable_dev); @@ -330,9 +331,9 @@ return ret; } qid = rte_dma_get_dev_id_by_name(qname); - max_qid = __atomic_load_n( + max_qid = rte_atomic_load_explicit( &((struct idxd_dmadev *)rte_dma_fp_objs[qid].dev_private)->u.pci->ref_count, - __ATOMIC_SEQ_CST); + rte_memory_order_seq_cst); /* we have queue 0 done, now configure the rest of the queues */ for (qid = 1; qid < max_qid; qid++) { @@ -389,7 +390,7 @@ free(idxd.u.pci); return ret; } - __atomic_fetch_add(&idxd.u.pci->ref_count, 1, __ATOMIC_SEQ_CST); + rte_atomic_fetch_add_explicit(&idxd.u.pci->ref_count, 1, rte_memory_order_seq_cst); } return 0;