| Message ID | 20170303031727.461-8-qi.z.zhang@intel.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Delegated to: | Ferruh Yigit |
| Headers | show |
| Context | Check | Description |
|---|---|---|
| ci/checkpatch | success | coding style OK |
| ci/Intel-compilation | success | Compilation OK |
On 3/3/2017 3:17 AM, Qi Zhang wrote: > The diagram represents bit layout of the multi-bit VLAN update > message format. Re-draw the numbers using base 8, and mark the > bit values every 8 bits at the top. This should make it more > easy to grasp the table quickly. Can you please somehow mention in the patch title that this is a comment update. > > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> <...>
diff --git a/drivers/net/fm10k/base/fm10k_pf.c b/drivers/net/fm10k/base/fm10k_pf.c index 1dcea2b..856cb8a 100644 --- a/drivers/net/fm10k/base/fm10k_pf.c +++ b/drivers/net/fm10k/base/fm10k_pf.c @@ -255,8 +255,8 @@ STATIC s32 fm10k_update_vlan_pf(struct fm10k_hw *hw, u32 vid, u8 vsi, bool set) /* VLAN multi-bit write: * The multi-bit write has several parts to it. - * 3 2 1 0 - * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * 24 16 8 0 + * 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | RSVD0 | Length |C|RSVD0| VLAN ID | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
The diagram represents bit layout of the multi-bit VLAN update message format. Re-draw the numbers using base 8, and mark the bit values every 8 bits at the top. This should make it more easy to grasp the table quickly. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/fm10k/base/fm10k_pf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)