[dpdk-dev,09/18] net/mlx5: support tunnel inner csum offloads
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Commit Message
PKT_RX_IP_CKSUM_GOOD and PKT_RX_L4_CKSUM_GOOD of mubf.ol_flags now are
inner header checksum when packet is tunneled.
Signed-off-by: Xueming Li <xuemingl@mellanox.com>
---
drivers/net/mlx5/mlx5_flow.c | 13 +++++++++++++
drivers/net/mlx5/mlx5_rxq.c | 2 --
drivers/net/mlx5/mlx5_rxtx.c | 18 ++++--------------
drivers/net/mlx5/mlx5_rxtx.h | 1 -
4 files changed, 17 insertions(+), 17 deletions(-)
@@ -812,8 +812,15 @@ struct ibv_spec_header {
{
const struct mlx5_flow_items *cur_item = mlx5_flow_items;
unsigned int i;
+ int csum_en = 0;
+ struct mlx5_rxq_data *q;
(void)priv;
+ /* Check if checksum offloading */
+ for (i = 0; i != parser->queues_n; ++i) {
+ q = (*priv->rxqs)[parser->queues[i]];
+ csum_en |= q->csum;
+ }
/* Initialise the offsets to start after verbs attribute. */
for (i = 0; i != hash_rxq_init_n; ++i)
parser->queue[i].offset = sizeof(struct ibv_flow_attr);
@@ -850,6 +857,12 @@ struct ibv_spec_header {
" tunnel encapsulations.");
return -rte_errno;
}
+ if (!priv->config.tunnel_en && csum_en)
+ rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ITEM,
+ items,
+ "Cannot support hw tunnel checksum "
+ "offloads");
parser->inner = IBV_FLOW_SPEC_INNER;
}
if (parser->drop) {
@@ -1005,8 +1005,6 @@ struct mlx5_rxq_ctrl*
}
/* Toggle RX checksum offload if hardware supports it. */
tmpl->rxq.csum = !!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM);
- tmpl->rxq.csum_l2tun = (!!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM) &&
- priv->config.tunnel_en);
tmpl->rxq.hw_timestamp = !!(conf->offloads & DEV_RX_OFFLOAD_TIMESTAMP);
/* Configure VLAN stripping. */
tmpl->rxq.vlan_strip = !!(conf->offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
@@ -41,7 +41,7 @@
uint16_t cqe_cnt, uint32_t *rss_hash);
static __rte_always_inline uint32_t
-rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe);
+rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe);
uint32_t mlx5_ptype_table[] __rte_cache_aligned = {
[0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */
@@ -1688,8 +1688,6 @@
/**
* Translate RX completion flags to offload flags.
*
- * @param[in] rxq
- * Pointer to RX queue structure.
* @param[in] cqe
* Pointer to CQE.
*
@@ -1697,7 +1695,7 @@
* Offload flags (ol_flags) for struct rte_mbuf.
*/
static inline uint32_t
-rxq_cq_to_ol_flags(struct mlx5_rxq_data *rxq, volatile struct mlx5_cqe *cqe)
+rxq_cq_to_ol_flags(volatile struct mlx5_cqe *cqe)
{
uint32_t ol_flags = 0;
uint16_t flags = rte_be_to_cpu_16(cqe->hdr_type_etc);
@@ -1709,14 +1707,6 @@
TRANSPOSE(flags,
MLX5_CQE_RX_L4_HDR_VALID,
PKT_RX_L4_CKSUM_GOOD);
- if ((cqe->pkt_info & MLX5_CQE_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
- ol_flags |=
- TRANSPOSE(flags,
- MLX5_CQE_RX_L3_HDR_VALID,
- PKT_RX_IP_CKSUM_GOOD) |
- TRANSPOSE(flags,
- MLX5_CQE_RX_L4_HDR_VALID,
- PKT_RX_L4_CKSUM_GOOD);
return ol_flags;
}
@@ -1815,8 +1805,8 @@
mlx5_flow_mark_get(mark);
}
}
- if (rxq->csum | rxq->csum_l2tun)
- pkt->ol_flags |= rxq_cq_to_ol_flags(rxq, cqe);
+ if (rxq->csum)
+ pkt->ol_flags |= rxq_cq_to_ol_flags(cqe);
if (rxq->vlan_strip &&
(cqe->hdr_type_etc &
rte_cpu_to_be_16(MLX5_CQE_VLAN_STRIPPED))) {
@@ -77,7 +77,6 @@ struct rxq_zip {
/* RX queue descriptor. */
struct mlx5_rxq_data {
unsigned int csum:1; /* Enable checksum offloading. */
- unsigned int csum_l2tun:1; /* Same for L2 tunnels. */
unsigned int hw_timestamp:1; /* Enable HW timestamp. */
unsigned int vlan_strip:1; /* Enable VLAN stripping. */
unsigned int crc_present:1; /* CRC must be subtracted. */