From patchwork Mon Feb 26 15:09:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 35416 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5DC654D3A; Mon, 26 Feb 2018 16:10:28 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id B12834CC0 for ; Mon, 26 Feb 2018 16:10:25 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from xuemingl@mellanox.com) with ESMTPS (AES256-SHA encrypted); 26 Feb 2018 17:10:43 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (dev-r630-06.mtbc.labs.mlnx [10.12.205.180]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w1QFANsA021405; Mon, 26 Feb 2018 17:10:24 +0200 Received: from dev-r630-06.mtbc.labs.mlnx (localhost [127.0.0.1]) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7) with ESMTP id w1QFANY9107273; Mon, 26 Feb 2018 23:10:23 +0800 Received: (from xuemingl@localhost) by dev-r630-06.mtbc.labs.mlnx (8.14.7/8.14.7/Submit) id w1QFANl3107272; Mon, 26 Feb 2018 23:10:23 +0800 From: Xueming Li To: Wenzhuo Lu , Jingjing Wu , Thomas Monjalon , Nelio Laranjeiro , Adrien Mazarguil , Shahaf Shuler Cc: dev@dpdk.org, stable@dpdk.org Date: Mon, 26 Feb 2018 23:09:35 +0800 Message-Id: <20180226150947.107179-7-xuemingl@mellanox.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20180226150947.107179-1-xuemingl@mellanox.com> References: <20180226150947.107179-1-xuemingl@mellanox.com> Subject: [dpdk-dev] [PATCH 06/18] net/mlx5: fix tunnel offloads cap query X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shahaf Shuler The query for the tunnel stateless offloads is wrongly implemented because of: 1. It was using the device id to query for the offloads. 2. It was using a compilation flag for Verbs which no longer exits. The main reason was lack of proper API from Verbs. Fixing the query to use rdma-core API. The capability returned from rdma-core refer to both Tx and Rx sides. Eventhough there is a separate cap for GRE and VXLAN, implementation merge them into a single flag in order to simplify the checks on the data path. Fixes: 43e9d9794cde ("net/mlx5: support upstream rdma-core") Fixes: f5fde5205101 ("net/mlx5: add hardware checksum offload for tunnel packets") Cc: stable@dpdk.org Signed-off-by: Shahaf Shuler --- drivers/net/mlx5/Makefile | 6 +++--- drivers/net/mlx5/mlx5.c | 39 +++++++++++++++------------------------ drivers/net/mlx5/mlx5.h | 4 ++-- drivers/net/mlx5/mlx5_rxq.c | 2 +- 4 files changed, 21 insertions(+), 30 deletions(-) diff --git a/drivers/net/mlx5/Makefile b/drivers/net/mlx5/Makefile index 3bc9736..afda411 100644 --- a/drivers/net/mlx5/Makefile +++ b/drivers/net/mlx5/Makefile @@ -125,9 +125,9 @@ mlx5_autoconf.h.new: FORCE mlx5_autoconf.h.new: $(RTE_SDK)/buildtools/auto-config-h.sh $Q $(RM) -f -- '$@' $Q sh -- '$<' '$@' \ - HAVE_IBV_DEVICE_VXLAN_SUPPORT \ - infiniband/verbs.h \ - enum IBV_DEVICE_VXLAN_SUPPORT \ + HAVE_IBV_DEVICE_TUNNEL_SUPPORT \ + infiniband/mlx5dv.h \ + enum MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS \ $(AUTOCONF_OUTPUT) $Q sh -- '$<' '$@' \ HAVE_IBV_WQ_FLAG_RX_END_PADDING \ diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 6c0985b..61cb931 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -584,7 +584,7 @@ unsigned int tunnel_en = 0; int idx; int i; - struct mlx5dv_context attrs_out; + struct mlx5dv_context attrs_out = {0}; #ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT struct ibv_counter_set_description cs_desc; #endif @@ -633,20 +633,6 @@ PCI_DEVICE_ID_MELLANOX_CONNECTX5VF) || (pci_dev->id.device_id == PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)); - switch (pci_dev->id.device_id) { - case PCI_DEVICE_ID_MELLANOX_CONNECTX4: - tunnel_en = 1; - break; - case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX: - case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF: - tunnel_en = 1; - break; - default: - break; - } INFO("PCI information matches, using device \"%s\"" " (SR-IOV: %s)", list[i]->name, @@ -675,6 +661,9 @@ * Multi-packet send is supported by ConnectX-4 Lx PF as well * as all ConnectX-5 devices. */ +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + attrs_out.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS; +#endif mlx5_glue->dv_query_device(attr_ctx, &attrs_out); if (attrs_out.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) { if (attrs_out.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) { @@ -693,6 +682,17 @@ cqe_comp = 0; else cqe_comp = 1; +#ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT + if (attrs_out.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) { + tunnel_en = ((attrs_out.tunnel_offloads_caps & + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) && + (attrs_out.tunnel_offloads_caps & + MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE)); + } + DEBUG("Tunnel offloading is %ssupported", tunnel_en ? "" : "not "); +#else + WARN("Tunnel offloading disabled due to old OFED/rdma-core version"); +#endif if (mlx5_glue->query_device_ex(attr_ctx, NULL, &device_attr)) goto error; INFO("%u port(s) detected", device_attr.orig_attr.phys_port_cnt); @@ -838,15 +838,6 @@ IBV_DEVICE_RAW_IP_CSUM); DEBUG("checksum offloading is %ssupported", (config.hw_csum ? "" : "not ")); - -#ifdef HAVE_IBV_DEVICE_VXLAN_SUPPORT - config.hw_csum_l2tun = - !!(exp_device_attr.exp_device_cap_flags & - IBV_DEVICE_VXLAN_SUPPORT); -#endif - DEBUG("Rx L2 tunnel checksum offloads are %ssupported", - (config.hw_csum_l2tun ? "" : "not ")); - #ifdef HAVE_IBV_DEVICE_COUNTERS_SET_SUPPORT config.flow_counter_en = !!(device_attr.max_counter_sets); mlx5_glue->describe_counter_set(ctx, 0, &cs_desc); diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 965c19f..3e2d96a 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -75,13 +75,13 @@ struct mlx5_xstats_ctrl { */ struct mlx5_dev_config { unsigned int hw_csum:1; /* Checksum offload is supported. */ - unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */ unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */ unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */ unsigned int hw_padding:1; /* End alignment padding is supported. */ unsigned int sriov:1; /* This is a VF or PF with VF devices. */ unsigned int mps:2; /* Multi-packet send supported mode. */ - unsigned int tunnel_en:1; /* Whether tunnel is supported. */ + unsigned int tunnel_en:1; + /* Whether tunnel stateless offloads are supported. */ unsigned int flow_counter_en:1; /* Whether flow counter is supported. */ unsigned int cqe_comp:1; /* CQE compression is enabled. */ unsigned int tso:1; /* Whether TSO is supported. */ diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index ff58c49..238fa7e 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1006,7 +1006,7 @@ struct mlx5_rxq_ctrl* /* Toggle RX checksum offload if hardware supports it. */ tmpl->rxq.csum = !!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM); tmpl->rxq.csum_l2tun = (!!(conf->offloads & DEV_RX_OFFLOAD_CHECKSUM) && - priv->config.hw_csum_l2tun); + priv->config.tunnel_en); tmpl->rxq.hw_timestamp = !!(conf->offloads & DEV_RX_OFFLOAD_TIMESTAMP); /* Configure VLAN stripping. */ tmpl->rxq.vlan_strip = !!(conf->offloads & DEV_RX_OFFLOAD_VLAN_STRIP);