From patchwork Sat Apr 6 14:27:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob X-Patchwork-Id: 52371 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 258D04CC7; Sat, 6 Apr 2019 16:28:39 +0200 (CEST) Received: from mail-pf1-f193.google.com (mail-pf1-f193.google.com [209.85.210.193]) by dpdk.org (Postfix) with ESMTP id 62B034CC5 for ; Sat, 6 Apr 2019 16:28:38 +0200 (CEST) Received: by mail-pf1-f193.google.com with SMTP id w25so3454229pfi.9 for ; Sat, 06 Apr 2019 07:28:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YwP13CPT60zDXG2T6byXzroUcM1CE8S8ka0/YU0nWkM=; b=BFjmS5bCk570a9PVYd+pl5SLNGqh68IRkcNpDHujIIiIrfUZcBVQQqwRypoh5QrjRE TROJPenYMmXCgteOzTxm9pGFi0JUfZ0APLp2jbyOLCVWHf5v97EHOrkNYtgwluDF/MPB EYL6upcTEbQIZIzFoGiLOVnoewUcwhoEoStrOzrcKAjSda8gNcx2HkA5YfW2zKhg9eq5 d+zzGWkcno1l2wcj7LlylxWF9FKyfny/dacrdmJdP8/2aunYaU306nj13pNTuZGnGkBw ZD0mRmACE9ccGHxzbC0j1moYCwTkMbX8IJjRGZ6iktYnvVBh3TNZwYBHwHwqdxBRJNgM 9h7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YwP13CPT60zDXG2T6byXzroUcM1CE8S8ka0/YU0nWkM=; b=pgdmjBhgAp2LKnf0hrQwjpTx/T8p5am7x1qYEsqOfUGbSA7FywvJ0N3yQ/olWRYD8Q YnROfc4z17jrncoZk20qzVsGpB0vwIaQSUJ/qSy8QU6yUI4vJYtSKbY+oMgFCCzuOSsA NLKEJJSPkGB9GgZybiCEUs7tawwhAHYU4p4k8r1HMpyKtAS8itJfcjyF11oN+QeDrU9A k8ebcHlUvIfhcqIRp71+ZPDCcB2zTXwCoil0EI0OXch/dRCLoxbPUmG7qvAIfZGfLM/S FTNAyqi/81sglNDLU/GClolRaXYeVQADITGrEAZ51Vb2PNOwRg8f7HmAr1Ae3ro5kBhR cHDw== X-Gm-Message-State: APjAAAUFgf4DUxB6MShqGjIMhg1TC4ag7XFQPryOvzBSGlb9AwubEiaE JJxMNt/huCT2tcO+1oFv7BfpuywqpgGPeg== X-Google-Smtp-Source: APXvYqysA2QjNkf/ZiER7DMVgc6kJC4jAYacDgumtoBM6rps6CpxGNN1xpKDZPAbpyHzGF6YfyGH5A== X-Received: by 2002:a63:2b4c:: with SMTP id r73mr18445763pgr.181.1554560917357; Sat, 06 Apr 2019 07:28:37 -0700 (PDT) Received: from jerin.caveonetworks.com ([223.226.40.87]) by smtp.gmail.com with ESMTPSA id o5sm84199008pfa.135.2019.04.06.07.28.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 06 Apr 2019 07:28:36 -0700 (PDT) From: jerinjacobk@gmail.com X-Google-Original-From: jerinj@marvell.com To: Thomas Monjalon Cc: dev@dpdk.org, Jerin Jacob , Pavan Nikhilesh , Gavin Hu Date: Sat, 6 Apr 2019 19:57:37 +0530 Message-Id: <20190406142737.20091-4-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190406142737.20091-1-jerinj@marvell.com> References: <20190318164949.2357-1-jerinj@marvell.com> <20190406142737.20091-1-jerinj@marvell.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH v7 4/4] config: add octeontx2 machine config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Optimized configuration for Marvell octeontx2 SoC. Updated meson build to support Marvell octeontx2 SoC. Added meson cross build target for octeontx2. Signed-off-by: Jerin Jacob Signed-off-by: Pavan Nikhilesh Reviewed-by: Gavin Hu --- config/arm/arm64_octeontx2_linux_gcc | 16 +++++++++ config/arm/meson.build | 9 ++++- config/defconfig_arm64-octeontx2-linux-gcc | 1 + config/defconfig_arm64-octeontx2-linuxapp-gcc | 18 ++++++++++ mk/machine/octeontx2/rte.vars.mk | 34 +++++++++++++++++++ 5 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 config/arm/arm64_octeontx2_linux_gcc create mode 120000 config/defconfig_arm64-octeontx2-linux-gcc create mode 100644 config/defconfig_arm64-octeontx2-linuxapp-gcc create mode 100644 mk/machine/octeontx2/rte.vars.mk diff --git a/config/arm/arm64_octeontx2_linux_gcc b/config/arm/arm64_octeontx2_linux_gcc new file mode 100644 index 000000000..e2c0b8f72 --- /dev/null +++ b/config/arm/arm64_octeontx2_linux_gcc @@ -0,0 +1,16 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' +pcap-config = '' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = '0x43' +implementor_pn = '0xb2' diff --git a/config/arm/meson.build b/config/arm/meson.build index 9282bbf33..0d76b2554 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -79,6 +79,12 @@ flags_thunderx2_extra = [ ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 256], ['RTE_USE_C11_MEM_MODEL', true]] +flags_octeontx2_extra = [ + ['RTE_MACHINE', '"octeontx2"'], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 24], + ['RTE_EAL_IGB_UIO', false], + ['RTE_USE_C11_MEM_MODEL', true]] machine_args_generic = [ ['default', ['-march=armv8-a+crc+crypto']], @@ -96,7 +102,8 @@ machine_args_cavium = [ ['0xa1', ['-mcpu=thunderxt88'], flags_thunderx_extra], ['0xa2', ['-mcpu=thunderxt81'], flags_thunderx_extra], ['0xa3', ['-mcpu=thunderxt83'], flags_thunderx_extra], - ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra]] + ['0xaf', ['-mcpu=thunderx2t99'], flags_thunderx2_extra], + ['0xb2', ['-mcpu=octeontx2'], flags_octeontx2_extra]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] diff --git a/config/defconfig_arm64-octeontx2-linux-gcc b/config/defconfig_arm64-octeontx2-linux-gcc new file mode 120000 index 000000000..e25150531 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linux-gcc @@ -0,0 +1 @@ +defconfig_arm64-octeontx2-linuxapp-gcc \ No newline at end of file diff --git a/config/defconfig_arm64-octeontx2-linuxapp-gcc b/config/defconfig_arm64-octeontx2-linuxapp-gcc new file mode 100644 index 000000000..9eae84538 --- /dev/null +++ b/config/defconfig_arm64-octeontx2-linuxapp-gcc @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +#include "defconfig_arm64-armv8a-linux-gcc" + +CONFIG_RTE_MACHINE="octeontx2" + +CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_MAX_NUMA_NODES=1 +CONFIG_RTE_MAX_LCORE=24 + +# Doesn't support NUMA +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_LIBRTE_VHOST_NUMA=n + +# Recommend to use VFIO as co-processors needs SMMU/IOMMU +CONFIG_RTE_EAL_IGB_UIO=n diff --git a/mk/machine/octeontx2/rte.vars.mk b/mk/machine/octeontx2/rte.vars.mk new file mode 100644 index 000000000..cbec7f14d --- /dev/null +++ b/mk/machine/octeontx2/rte.vars.mk @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Marvell International Ltd +# + +# +# machine: +# +# - can define ARCH variable (overridden by cmdline value) +# - can define CROSS variable (overridden by cmdline value) +# - define MACHINE_CFLAGS variable (overridden by cmdline value) +# - define MACHINE_LDFLAGS variable (overridden by cmdline value) +# - define MACHINE_ASFLAGS variable (overridden by cmdline value) +# - can define CPU_CFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_LDFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - can define CPU_ASFLAGS variable (overridden by cmdline value) that +# overrides the one defined in arch. +# - may override any previously defined variable +# + +# ARCH = +# CROSS = +# MACHINE_CFLAGS = +# MACHINE_LDFLAGS = +# MACHINE_ASFLAGS = +# CPU_CFLAGS = +# CPU_LDFLAGS = +# CPU_ASFLAGS = + +include $(RTE_SDK)/mk/rte.helper.mk + +MACHINE_CFLAGS += $(call rte_cc_has_argument, -march=-mcpu=armv8.2-a+crc+crypto+lse) +MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2)