From patchwork Wed Sep 9 15:52:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lance Richardson X-Patchwork-Id: 77065 X-Patchwork-Delegate: ajit.khaparde@broadcom.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E979CA04B5; Wed, 9 Sep 2020 17:53:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 62ED51C0CE; Wed, 9 Sep 2020 17:53:14 +0200 (CEST) Received: from mail-pj1-f67.google.com (mail-pj1-f67.google.com [209.85.216.67]) by dpdk.org (Postfix) with ESMTP id 7D0631C0CD for ; Wed, 9 Sep 2020 17:53:13 +0200 (CEST) Received: by mail-pj1-f67.google.com with SMTP id kk9so1560555pjb.2 for ; Wed, 09 Sep 2020 08:53:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ARxLoz6AxiMLK1VeQ63z6GCuJpZN1cUAzC3kNwlnzyA=; b=N3WwPHXrxEl+OYjIjlFTJpqH9IEsJy+IuRxyu4sQto4J9uev6Atm6rtKtrWZ05O9/p WwsvzR349rPCZhcQRvwxoLpfpQeJ8yu2Hibm6RQ1sezE/BF+2cBnICQFZWR0CWbrm/9I qSN1sN+WzOBhNw4ZiiSRuSmDMHe0LpXu1jrq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ARxLoz6AxiMLK1VeQ63z6GCuJpZN1cUAzC3kNwlnzyA=; b=aoxl7TrqAmIvDMRaMUAD/DGX9HA8E6TmkIFA4biEyq7do3RMWfP8LzdgJ+Q6Mcv8mR A4kWtSW6SOOE52ekFzVA4Fgi2ztEw0fwU7VXK3uE9ATEcOwECVykC3WyFcjHWR8rpnnD FV9BttcnSU2RcdMLIqFhEqTgMaBWh88xZYx397GEVgHK1vB7JDry2k1Eh0v8Lmn29KQj PraTsNNtV54qU39OXJjcPXp6Z4DiDW5hz9wqXYH6K/QW1j+HEbnr+FFIShi+/Pz2ds3g R8fYZln8CTq8Ds7CWDpMob69tbBiY1jd9Andwyj4s3ZF8FrCForioHWBVIbEkxyfgv3U rC6A== X-Gm-Message-State: AOAM533VnKVTq7OHzLz0ZknIoxRGR3/4nFmbINgAlB++N80dQVk+CnXn YBIKo4r+BZPbwyNeTZIdt3Wcj0YSu6iO9w== X-Google-Smtp-Source: ABdhPJxiFnUOqRwwIth7HqcwETulkMl/rCay1AWrzxNemNrS7P90ub+wnFmRtOyxQbQaa+Kb5I378w== X-Received: by 2002:a17:90a:414d:: with SMTP id m13mr1287679pjg.163.1599666792674; Wed, 09 Sep 2020 08:53:12 -0700 (PDT) Received: from localhost.localdomain ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id h15sm3188427pfo.23.2020.09.09.08.53.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2020 08:53:11 -0700 (PDT) From: Lance Richardson To: Ajit Khaparde , Somnath Kotur , Ruifeng Wang Cc: dev@dpdk.org, stable@dpdk.org Date: Wed, 9 Sep 2020 11:52:54 -0400 Message-Id: <20200909155302.28656-2-lance.richardson@broadcom.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200909155302.28656-1-lance.richardson@broadcom.com> References: <20200909155302.28656-1-lance.richardson@broadcom.com> MIME-Version: 1.0 Subject: [dpdk-dev] [PATCH 01/12] net/bnxt: fix burst mode get for Arm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Transmit and receive burst mode get operations incorrectly return "Vector SSE" on ARM64 platforms, change to return "Vector Neon" instead. Fixes: 3983583414 ("net/bnxt: support NEON") Reviewed-by: Ajit Kumar Khaparde Signed-off-by: Lance Richardson Cc: stable@dpdk.org --- drivers/net/bnxt/bnxt_ethdev.c | 60 +++++++++++++++++++++------------- 1 file changed, 38 insertions(+), 22 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 75d055be00..7a77922c0c 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -2615,46 +2615,62 @@ bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id, qinfo->conf.tx_deferred_start = txq->tx_deferred_start; } +static const struct { + eth_rx_burst_t pkt_burst; + const char *info; +} bnxt_rx_burst_info[] = { + {bnxt_recv_pkts, "Scalar"}, +#if defined(RTE_ARCH_X86) + {bnxt_recv_pkts_vec, "Vector SSE"}, +#elif defined(RTE_ARCH_ARM64) + {bnxt_recv_pkts_vec, "Vector Neon"}, +#endif +}; + static int bnxt_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, struct rte_eth_burst_mode *mode) { eth_rx_burst_t pkt_burst = dev->rx_pkt_burst; + size_t i; - if (pkt_burst == bnxt_recv_pkts) { - snprintf(mode->info, sizeof(mode->info), "%s", - "Scalar"); - return 0; - } -#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) - if (pkt_burst == bnxt_recv_pkts_vec) { - snprintf(mode->info, sizeof(mode->info), "%s", - "Vector SSE"); - return 0; + for (i = 0; i < RTE_DIM(bnxt_rx_burst_info); i++) { + if (pkt_burst == bnxt_rx_burst_info[i].pkt_burst) { + snprintf(mode->info, sizeof(mode->info), "%s", + bnxt_rx_burst_info[i].info); + return 0; + } } -#endif return -EINVAL; } +static const struct { + eth_tx_burst_t pkt_burst; + const char *info; +} bnxt_tx_burst_info[] = { + {bnxt_xmit_pkts, "Scalar"}, +#if defined(RTE_ARCH_X86) + {bnxt_xmit_pkts_vec, "Vector SSE"}, +#elif defined(RTE_ARCH_ARM64) + {bnxt_xmit_pkts_vec, "Vector Neon"}, +#endif +}; + static int bnxt_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, struct rte_eth_burst_mode *mode) { eth_tx_burst_t pkt_burst = dev->tx_pkt_burst; + size_t i; - if (pkt_burst == bnxt_xmit_pkts) { - snprintf(mode->info, sizeof(mode->info), "%s", - "Scalar"); - return 0; - } -#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) - if (pkt_burst == bnxt_xmit_pkts_vec) { - snprintf(mode->info, sizeof(mode->info), "%s", - "Vector SSE"); - return 0; + for (i = 0; i < RTE_DIM(bnxt_tx_burst_info); i++) { + if (pkt_burst == bnxt_tx_burst_info[i].pkt_burst) { + snprintf(mode->info, sizeof(mode->info), "%s", + bnxt_tx_burst_info[i].info); + return 0; + } } -#endif return -EINVAL; }