@@ -830,13 +830,12 @@ ulp_ctx_init(struct bnxt *bp,
goto error_deinit;
}
- /* TODO: For now we are overriding to APP:1 on this branch*/
- bp->app_id = 1;
rc = bnxt_ulp_cntxt_app_id_set(bp->ulp_ctx, bp->app_id);
if (rc) {
BNXT_TF_DBG(ERR, "Unable to set app_id for ULP init.\n");
goto error_deinit;
}
+ BNXT_TF_DBG(DEBUG, "Ulp initialized with app id %d\n", bp->app_id);
rc = bnxt_ulp_cntxt_app_caps_init(bp->ulp_ctx, bp->app_id, devid);
if (rc) {
@@ -1393,13 +1392,17 @@ bnxt_ulp_port_init(struct bnxt *bp)
uint32_t ulp_flags;
int32_t rc = 0;
- if (!bp || !BNXT_TRUFLOW_EN(bp))
- return rc;
-
if (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {
BNXT_TF_DBG(ERR,
"Skip ulp init for port: %d, not a TVF or PF\n",
- bp->eth_dev->data->port_id);
+ bp->eth_dev->data->port_id);
+ return rc;
+ }
+
+ if (!BNXT_TRUFLOW_EN(bp)) {
+ BNXT_TF_DBG(ERR,
+ "Skip ulp init for port: %d, truflow is not enabled\n",
+ bp->eth_dev->data->port_id);
return rc;
}
@@ -1520,9 +1523,6 @@ bnxt_ulp_port_deinit(struct bnxt *bp)
struct rte_pci_device *pci_dev;
struct rte_pci_addr *pci_addr;
- if (!BNXT_TRUFLOW_EN(bp))
- return;
-
if (!BNXT_PF(bp) && !BNXT_VF_IS_TRUSTED(bp)) {
BNXT_TF_DBG(ERR,
"Skip ULP deinit port:%d, not a TVF or PF\n",
@@ -1530,6 +1530,13 @@ bnxt_ulp_port_deinit(struct bnxt *bp)
return;
}
+ if (!BNXT_TRUFLOW_EN(bp)) {
+ BNXT_TF_DBG(ERR,
+ "Skip ULP deinit for port:%d, truflow is not enabled\n",
+ bp->eth_dev->data->port_id);
+ return;
+ }
+
if (!bp->ulp_ctx) {
BNXT_TF_DBG(DEBUG, "ulp ctx already de-allocated\n");
return;
@@ -96,7 +96,9 @@ bnxt_ulp_init_mapper_params(struct bnxt_ulp_mapper_create_parms *mapper_cparms,
mapper_cparms->act_tid = params->act_tmpl;
mapper_cparms->func_id = params->func_id;
mapper_cparms->hdr_bitmap = ¶ms->hdr_bitmap;
+ mapper_cparms->enc_hdr_bitmap = ¶ms->enc_hdr_bitmap;
mapper_cparms->hdr_field = params->hdr_field;
+ mapper_cparms->enc_field = params->enc_field;
mapper_cparms->comp_fld = params->comp_fld;
mapper_cparms->act = ¶ms->act_bitmap;
mapper_cparms->act_prop = ¶ms->act_prop;
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Thu May 20 11:56:39 2021 */
+/* date: Thu May 27 17:35:19 2021 */
#ifndef ULP_TEMPLATE_DB_H_
#define ULP_TEMPLATE_DB_H_
@@ -41,7 +41,7 @@
#define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 89
#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 600
#define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 26
-#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 619
+#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 618
#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 49
#define ULP_THOR_CLASS_TMPL_LIST_SIZE 6
#define ULP_THOR_CLASS_TBL_LIST_SIZE 33
@@ -53,7 +53,7 @@
#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 35
#define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 2
#define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 1
-#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 512
+#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 527
#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 39
#define ULP_THOR_ACT_TMPL_LIST_SIZE 7
#define ULP_THOR_ACT_TBL_LIST_SIZE 2
@@ -229,7 +229,9 @@ enum bnxt_ulp_cond_opc {
BNXT_ULP_COND_OPC_ACT_PAT_MATCH = 11,
BNXT_ULP_COND_OPC_EXT_MEM_IS_SET = 12,
BNXT_ULP_COND_OPC_EXT_MEM_NOT_SET = 13,
- BNXT_ULP_COND_OPC_LAST = 14
+ BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET = 14,
+ BNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET = 15,
+ BNXT_ULP_COND_OPC_LAST = 16
};
enum bnxt_ulp_critical_resource {
@@ -257,6 +259,36 @@ enum bnxt_ulp_direction {
BNXT_ULP_DIRECTION_LAST = 2
};
+enum bnxt_ulp_enc_field {
+ BNXT_ULP_ENC_FIELD_ETH_DMAC = 0,
+ BNXT_ULP_ENC_FIELD_ETH_SMAC = 1,
+ BNXT_ULP_ENC_FIELD_ETH_TYPE = 2,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TCI = 3,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TYPE = 4,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TCI = 5,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TYPE = 6,
+ BNXT_ULP_ENC_FIELD_IPV4_IHL = 7,
+ BNXT_ULP_ENC_FIELD_IPV4_TOS = 8,
+ BNXT_ULP_ENC_FIELD_IPV4_PKT_ID = 9,
+ BNXT_ULP_ENC_FIELD_IPV4_FRAG = 10,
+ BNXT_ULP_ENC_FIELD_IPV4_TTL = 11,
+ BNXT_ULP_ENC_FIELD_IPV4_PROTO = 12,
+ BNXT_ULP_ENC_FIELD_IPV4_SADDR = 13,
+ BNXT_ULP_ENC_FIELD_IPV4_DADDR = 14,
+ BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW = 15,
+ BNXT_ULP_ENC_FIELD_IPV6_PROTO = 16,
+ BNXT_ULP_ENC_FIELD_IPV6_TTL = 17,
+ BNXT_ULP_ENC_FIELD_IPV6_SADDR = 18,
+ BNXT_ULP_ENC_FIELD_IPV6_DADDR = 19,
+ BNXT_ULP_ENC_FIELD_UDP_SPORT = 20,
+ BNXT_ULP_ENC_FIELD_UDP_DPORT = 21,
+ BNXT_ULP_ENC_FIELD_VXLAN_FLAGS = 22,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 = 23,
+ BNXT_ULP_ENC_FIELD_VXLAN_VNI = 24,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 = 25,
+ BNXT_ULP_ENC_FIELD_LAST = 26
+};
+
enum bnxt_ulp_fdb_opc {
BNXT_ULP_FDB_OPC_PUSH_FID = 0,
BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE = 1,
@@ -304,7 +336,9 @@ enum bnxt_ulp_field_src {
BNXT_ULP_FIELD_SRC_SKIP = 13,
BNXT_ULP_FIELD_SRC_REJECT = 14,
BNXT_ULP_FIELD_SRC_PORT_TABLE = 15,
- BNXT_ULP_FIELD_SRC_LAST = 16
+ BNXT_ULP_FIELD_SRC_ENC_HDR_BIT = 16,
+ BNXT_ULP_FIELD_SRC_ENC_FIELD = 17,
+ BNXT_ULP_FIELD_SRC_LAST = 18
};
enum bnxt_ulp_func_opc {
@@ -198,7 +198,9 @@ const struct bnxt_ulp_template_device_tbls ulp_template_thor_tbls[] = {
struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
[BNXT_ULP_DEVICE_ID_WH_PLUS] = {
.description = "Whitney_Plus",
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .key_byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .result_byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.encap_byte_swap = 1,
.int_flow_db_num_entries = 16384,
.ext_flow_db_num_entries = 32768,
@@ -218,7 +220,9 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
},
[BNXT_ULP_DEVICE_ID_THOR] = {
.description = "Thor",
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .key_byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .result_byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.encap_byte_swap = 1,
.int_flow_db_num_entries = 16384,
.ext_flow_db_num_entries = 32768,
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Thu May 13 18:15:56 2021 */
+/* date: Wed May 26 15:11:34 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -41,7 +41,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 0,
.result_bit_size = 64,
.result_num_fields = 1
@@ -62,7 +61,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 1,
.result_bit_size = 128,
.result_num_fields = 17
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Thu May 20 11:56:39 2021 */
+/* date: Wed May 26 15:11:34 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -59,7 +59,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 0,
.blob_key_bit_size = 10,
.key_bit_size = 10,
@@ -82,7 +81,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 1,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -104,7 +102,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 2,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -122,8 +119,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.cond_start_idx = 5,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 1, , table: l2_cntxt_tcam.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -141,7 +137,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 7,
.blob_key_bit_size = 213,
.key_bit_size = 213,
@@ -166,7 +161,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 28,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -189,7 +183,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 33,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -207,8 +200,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.cond_start_idx = 6,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 1, , table: fkb_select.l3_l4_wm */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -223,7 +215,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 10,
.result_bit_size = 106,
.result_num_fields = 106
@@ -246,7 +237,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 36,
.blob_key_bit_size = 94,
.key_bit_size = 94,
@@ -271,7 +261,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 79,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -297,7 +286,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_BE,
.key_start_idx = 82,
.blob_key_bit_size = 0,
.key_bit_size = 0,
@@ -322,7 +310,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_DEFAULT_AREC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 136,
.result_bit_size = 128,
.result_num_fields = 17
@@ -341,7 +328,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 196,
.blob_key_bit_size = 10,
.key_bit_size = 10,
@@ -364,7 +350,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 197,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -382,8 +367,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.cond_start_idx = 9,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -403,7 +387,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 198,
.blob_key_bit_size = 213,
.key_bit_size = 213,
@@ -428,7 +411,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 219,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -450,7 +432,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 168,
.result_bit_size = 32,
.result_num_fields = 1
@@ -468,7 +449,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 169,
.result_bit_size = 32,
.result_num_fields = 1
@@ -482,8 +462,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
.cond_start_idx = 10,
.cond_nums = 1 },
- .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_opcode = BNXT_ULP_FDB_OPC_NOP
},
{ /* class_tid: 4, , table: int_full_act_record.egr_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -501,7 +480,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 170,
.result_bit_size = 128,
.result_num_fields = 17,
@@ -521,7 +499,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 220,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -539,8 +516,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.cond_start_idx = 11,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -558,7 +534,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 221,
.blob_key_bit_size = 213,
.key_bit_size = 213,
@@ -582,7 +557,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 193,
.result_bit_size = 32,
.result_num_fields = 1
@@ -600,7 +574,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 194,
.result_bit_size = 32,
.result_num_fields = 1
@@ -621,7 +594,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 195,
.result_bit_size = 128,
.result_num_fields = 17,
@@ -640,7 +612,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
.tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 212,
.result_bit_size = 32,
.result_num_fields = 1
@@ -658,7 +629,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
.tbl_operand = ULP_THOR_SYM_LOOPBACK_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 213,
.result_bit_size = 32,
.result_num_fields = 1
@@ -679,7 +649,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 214,
.result_bit_size = 128,
.result_num_fields = 17,
@@ -701,7 +670,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .record_size = 16,
.result_start_idx = 231,
.result_bit_size = 0,
.result_num_fields = 0,
@@ -723,7 +692,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_thor_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 242,
.result_bit_size = 128,
.result_num_fields = 17
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Mon May 17 15:54:03 2021 */
+/* date: Tue Jun 1 16:05:30 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -90,7 +90,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 0,
.blob_key_bit_size = 1,
.key_bit_size = 1,
@@ -114,14 +113,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 0,
.result_bit_size = 64,
.result_num_fields = 1
},
{ /* act_tid: 1, , table: int_vtag_encap_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
- .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
+ .resource_type = TF_TBL_TYPE_ACT_ENCAP_8B,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TABLE_NORMAL,
.direction = TF_DIR_RX,
@@ -135,11 +133,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .record_size = 8,
.result_start_idx = 1,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 1, , table: int_full_act_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -157,8 +155,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 13,
+ .result_start_idx = 12,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -179,11 +176,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 39,
+ .result_start_idx = 38,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 2, , table: control.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
@@ -195,8 +191,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.cond_start_idx = 14,
.cond_nums = 0 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* act_tid: 2, , table: mirror_tbl.alloc */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -215,8 +210,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 77,
+ .result_start_idx = 75,
.result_bit_size = 32,
.result_num_fields = 6
},
@@ -237,8 +231,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 83,
+ .result_start_idx = 81,
.result_bit_size = 64,
.result_num_fields = 1
},
@@ -259,8 +252,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 84,
+ .result_start_idx = 82,
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0
@@ -282,11 +274,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_RID_REGFILE,
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 110,
+ .result_start_idx = 108,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 2, , table: mirror_tbl.wr */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -304,8 +295,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MIRROR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 148,
+ .result_start_idx = 145,
.result_bit_size = 32,
.result_num_fields = 6
},
@@ -324,12 +314,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 1,
.blob_key_bit_size = 1,
.key_bit_size = 1,
.key_num_fields = 1,
- .result_start_idx = 154,
+ .result_start_idx = 151,
.result_bit_size = 34,
.result_num_fields = 2
},
@@ -348,8 +337,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 156,
+ .result_start_idx = 153,
.result_bit_size = 64,
.result_num_fields = 1
},
@@ -368,8 +356,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 157,
+ .result_start_idx = 154,
.result_bit_size = 32,
.result_num_fields = 1
},
@@ -388,8 +375,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 158,
+ .result_start_idx = 155,
.result_bit_size = 32,
.result_num_fields = 1
},
@@ -408,11 +394,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 159,
+ .record_size = 16,
+ .result_start_idx = 156,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 3, , table: int_full_act_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -429,8 +415,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 171,
+ .result_start_idx = 167,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -449,11 +434,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 197,
+ .result_start_idx = 193,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 4, , table: int_flow_counter_tbl.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -470,8 +454,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 235,
+ .result_start_idx = 230,
.result_bit_size = 64,
.result_num_fields = 1
},
@@ -490,11 +473,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 236,
+ .record_size = 8,
+ .result_start_idx = 231,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 4, , table: int_full_act_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -511,8 +494,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 248,
+ .result_start_idx = 242,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -531,11 +513,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 274,
+ .result_start_idx = 268,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 4, , table: ext_full_act_record.one_tag */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -552,11 +533,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 312,
+ .result_start_idx = 305,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 5, , table: int_flow_counter_tbl.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -573,8 +553,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 350,
+ .result_start_idx = 342,
.result_bit_size = 64,
.result_num_fields = 1
},
@@ -593,8 +572,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_SRC_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 351,
+ .result_start_idx = 343,
.result_bit_size = 32,
.result_num_fields = 1
},
@@ -613,8 +591,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MODIFY_IPV4_DST_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 352,
+ .result_start_idx = 344,
.result_bit_size = 32,
.result_num_fields = 1
},
@@ -633,11 +610,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
.tbl_operand = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 353,
+ .record_size = 16,
+ .result_start_idx = 345,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 5, , table: int_full_act_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -654,8 +631,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 365,
+ .result_start_idx = 356,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -674,11 +650,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 391,
+ .result_start_idx = 382,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* act_tid: 6, , table: int_flow_counter_tbl.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -695,8 +670,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_FLOW_CNTR_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 429,
+ .result_start_idx = 419,
.result_bit_size = 64,
.result_num_fields = 1
},
@@ -715,11 +689,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 430,
+ .record_size = 16,
+ .result_start_idx = 420,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 3
+ .encap_num_fields = 2
},
{ /* act_tid: 6, , table: sp_smac_ipv6.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -736,11 +710,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_SP_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 433,
+ .record_size = 24,
+ .result_start_idx = 422,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 3
+ .encap_num_fields = 2
},
{ /* act_tid: 6, , table: int_tun_encap_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -757,11 +731,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 436,
+ .record_size = 64,
+ .result_start_idx = 424,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 30
},
{ /* act_tid: 6, , table: int_full_act_record.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -778,8 +752,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 448,
+ .result_start_idx = 454,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -798,11 +771,10 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE,
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 474,
+ .result_start_idx = 480,
.result_bit_size = 128,
.result_num_fields = 26,
- .encap_num_fields = 12
+ .encap_num_fields = 30
}
};
@@ -1033,22 +1005,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
},
/* act_tid: 1, , table: int_vtag_encap_record.0 */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
},
{
.description = "ecv_l2_en",
@@ -1057,26 +1033,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -1088,13 +1060,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
},
{
.description = "vtag_de",
@@ -1103,19 +1075,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
- },
- {
- .description = "spare",
- .field_bit_size = 80,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
},
/* act_tid: 1, , table: int_full_act_record.0 */
{
@@ -1628,20 +1594,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -1649,25 +1617,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "ecv_l2_en",
.field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L2_EN_YES}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -1678,8 +1644,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -1690,14 +1656,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 0,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2105,20 +2065,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2126,25 +2088,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "ecv_l2_en",
.field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L2_EN_YES}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2155,8 +2115,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2167,14 +2127,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 0,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2268,20 +2222,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
},
/* act_tid: 3, , table: int_encap_mac_record.0 */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2294,24 +2250,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
ULP_WP_SYM_ECV_L2_EN_YES}
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -2320,8 +2274,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2332,14 +2286,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 80,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2806,20 +2754,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2827,25 +2777,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "ecv_l2_en",
.field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L2_EN_YES}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2856,8 +2804,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2868,14 +2816,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 0,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -2888,23 +2830,27 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
},
/* act_tid: 4, , table: int_vtag_encap_record.0 */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
+ },
{
.description = "ecv_l2_en",
.field_bit_size = 1,
@@ -2912,26 +2858,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -2943,13 +2885,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
},
{
.description = "vtag_de",
@@ -2958,19 +2900,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
- },
- {
- .description = "spare",
- .field_bit_size = 80,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
},
/* act_tid: 4, , table: int_full_act_record.0 */
{
@@ -3350,20 +3286,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3371,25 +3309,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "ecv_l2_en",
.field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L2_EN_YES}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3400,8 +3336,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3412,14 +3348,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 0,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3620,22 +3550,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
(uint64_t)BNXT_ULP_ACT_BIT_DROP & 0xff}
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
},
{
.description = "ecv_l2_en",
@@ -3644,26 +3578,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -3675,13 +3605,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN & 0xff}
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
},
{
.description = "vtag_de",
@@ -3690,19 +3620,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP & 0xff}
- },
- {
- .description = "spare",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ (BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID & 0xff}
},
/* act_tid: 5, , table: int_flow_counter_tbl.0 */
{
@@ -3733,20 +3657,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
},
/* act_tid: 5, , table: int_encap_mac_record.dummy */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3759,24 +3685,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
ULP_WP_SYM_ECV_L2_EN_YES}
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -3785,8 +3709,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -3797,14 +3721,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 80,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -4271,20 +4189,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -4292,25 +4212,23 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "ecv_l2_en",
.field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L2_EN_YES}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -4321,8 +4239,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -4333,14 +4251,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 0,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
@@ -4356,76 +4268,62 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.description = "smac",
.field_bit_size = 48,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff}
+ (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
},
{
.description = "ipv4_src_addr",
.field_bit_size = 32,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff}
- },
- {
- .description = "reserved",
- .field_bit_size = 48,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ (BNXT_ULP_ENC_FIELD_IPV4_SADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_SADDR & 0xff}
},
/* act_tid: 6, , table: sp_smac_ipv6.0 */
{
.description = "smac",
.field_bit_size = 48,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC & 0xff}
+ (BNXT_ULP_ENC_FIELD_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_ETH_SMAC & 0xff}
},
{
.description = "ipv6_src_addr",
.field_bit_size = 128,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC & 0xff}
- },
- {
- .description = "reserved",
- .field_bit_size = 16,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ (BNXT_ULP_ENC_FIELD_IPV6_SADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_SADDR & 0xff}
},
/* act_tid: 6, , table: int_tun_encap_record.0 */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
},
{
.description = "ecv_l2_en",
@@ -4433,81 +4331,478 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 1}
+ ULP_WP_SYM_ECV_L2_EN_YES}
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 1}
+ ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
},
{
- .description = "encap_l2_dmac",
+ .description = "enc_eth_dmac",
.field_bit_size = 48,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff}
+ (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
},
{
- .description = "encap_vtag",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,
+ .description = "enc_o_vlan_tag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_o_vlan_type",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_i_vlan_tag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_i_vlan_type",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_ihl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_tos",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_pkt_id",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_frag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_ttl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_proto",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_daddr",
+ .field_bit_size = 32,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_vtc",
+ .field_bit_size = 32,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_zero",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ZERO,
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_ip",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,
+ .description = "enc_ipv6_proto",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_ttl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_daddr",
+ .field_bit_size = 128,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_udp_sport",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_udp_dport",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_vxlan_flags",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_udp",
- .field_bit_size = 32,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .description = "enc_vxlan_rsvd0",
+ .field_bit_size = 24,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_tun",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,
+ .description = "enc_vxlan_vni",
+ .field_bit_size = 24,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff,
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_vxlan_rsvd1",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
/* act_tid: 6, , table: int_full_act_record.0 */
{
@@ -4857,29 +5152,27 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
+ ULP_WP_SYM_ECV_VALID_YES}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
},
{
.description = "ecv_l2_en",
@@ -4887,79 +5180,478 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = {
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 1}
+ ULP_WP_SYM_ECV_L2_EN_YES}
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE & 0xff}
+ (BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE >> 8) & 0xff,
+ BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE & 0xff}
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_L4_TYPE_UDP_CSUM}
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_CONST,
.field_opr1 = {
- 1}
+ ULP_WP_SYM_ECV_TUN_TYPE_VXLAN}
},
{
- .description = "encap_l2_dmac",
+ .description = "enc_eth_dmac",
.field_bit_size = 48,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC & 0xff}
+ (BNXT_ULP_ENC_FIELD_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_ETH_DMAC & 0xff}
},
{
- .description = "encap_vtag",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,
+ .description = "enc_o_vlan_tag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_O_VLAN_TCI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TCI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_o_vlan_type",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OO_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_O_VLAN_TYPE >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_O_VLAN_TYPE & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_i_vlan_tag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_I_VLAN_TCI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TCI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_i_vlan_type",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_OI_VLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_I_VLAN_TYPE >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_I_VLAN_TYPE & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_ihl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_IHL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_IHL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_tos",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_TOS >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_TOS & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_pkt_id",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_PKT_ID >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_PKT_ID & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_frag",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_FRAG >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_FRAG & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_ttl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_TTL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_TTL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_proto",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_PROTO >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_PROTO & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv4_daddr",
+ .field_bit_size = 32,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV4 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV4_DADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV4_DADDR & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_vtc",
+ .field_bit_size = 32,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_zero",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG & 0xff,
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ZERO,
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_ip",
- .field_bit_size = 0,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP_SZ,
+ .description = "enc_ipv6_proto",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_PROTO >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_PROTO & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_ttl",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_TTL >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_TTL & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_ipv6_daddr",
+ .field_bit_size = 128,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_IPV6 & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_IPV6_DADDR >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_IPV6_DADDR & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_udp_sport",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_UDP_SPORT >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_UDP_SPORT & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_udp_dport",
+ .field_bit_size = 16,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_O_UDP >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_O_UDP & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_UDP_DPORT >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_UDP_DPORT & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_vxlan_flags",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
+ .field_opr1 = {
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_FLAGS >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_FLAGS & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
+ },
+ {
+ .description = "enc_vxlan_rsvd0",
+ .field_bit_size = 24,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP & 0xff,
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD0 & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_udp",
- .field_bit_size = 32,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .description = "enc_vxlan_vni",
+ .field_bit_size = 24,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_VNI & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
},
{
- .description = "encap_tun",
- .field_bit_size = 80,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP,
+ .description = "enc_vxlan_rsvd1",
+ .field_bit_size = 8,
+ .field_opc = BNXT_ULP_FIELD_OPC_SRC1_THEN_SRC2_ELSE_SRC3,
+ .field_src1 = BNXT_ULP_FIELD_SRC_ENC_HDR_BIT,
.field_opr1 = {
- (BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN >> 8) & 0xff,
- BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN & 0xff}
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 48) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 40) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 32) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 24) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 16) & 0xff,
+ ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 8) & 0xff,
+ (uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN & 0xff},
+ .field_src2 = BNXT_ULP_FIELD_SRC_ENC_FIELD,
+ .field_opr2 = {
+ (BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 >> 8) & 0xff,
+ BNXT_ULP_ENC_FIELD_VXLAN_RSVD1 & 0xff},
+ .field_src3 = BNXT_ULP_FIELD_SRC_SKIP
}
};
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-/* date: Mon May 17 15:54:03 2021 */
+/* date: Fri May 28 16:46:46 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@@ -80,7 +80,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 0,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -102,7 +101,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 1,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -120,8 +118,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 2,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 1, , table: l2_cntxt_tcam.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -139,7 +136,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 6,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -164,7 +160,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 19,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -188,7 +183,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 24,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -206,8 +200,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 3,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 1, , table: control.2 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
@@ -225,8 +218,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
.func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,
.func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,
- .func_dst_opr = BNXT_ULP_RF_IDX_CC },
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .func_dst_opr = BNXT_ULP_RF_IDX_CC }
},
{ /* class_tid: 1, , table: profile_tcam.ipv4 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -244,7 +236,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 27,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -271,7 +262,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 70,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -298,7 +288,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 113,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -324,7 +313,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 156,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -346,7 +334,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 159,
.blob_key_bit_size = 176,
.key_bit_size = 176,
@@ -368,7 +355,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 169,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -390,7 +376,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 179,
.blob_key_bit_size = 416,
.key_bit_size = 416,
@@ -412,7 +397,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 190,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -434,7 +418,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 201,
.blob_key_bit_size = 200,
.key_bit_size = 200,
@@ -456,7 +439,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 212,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -479,7 +461,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 223,
.blob_key_bit_size = 16,
.key_bit_size = 16,
@@ -497,8 +478,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 25,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 2, , table: l2_cntxt_tcam.1 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -516,7 +496,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 225,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -541,7 +520,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 238,
.blob_key_bit_size = 16,
.key_bit_size = 16,
@@ -559,8 +537,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
.cond_start_idx = 26,
.cond_nums = 1 },
- .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_opcode = BNXT_ULP_FDB_OPC_NOP
},
{ /* class_tid: 2, , table: mac_addr_cache.rd */
.resource_func = BNXT_ULP_RESOURCE_FUNC_GENERIC_TABLE,
@@ -576,7 +553,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 240,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -594,8 +570,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 27,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 2, , table: l2_cntxt_tcam.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -613,7 +588,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 245,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -638,7 +612,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 258,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -662,7 +635,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 263,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -680,8 +652,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 28,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 2, , table: profile_tcam.f2 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -701,7 +672,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 266,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -725,7 +695,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 309,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -747,7 +716,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 312,
.blob_key_bit_size = 112,
.key_bit_size = 112,
@@ -769,7 +737,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 320,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -792,7 +759,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 328,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -814,7 +780,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 329,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -832,8 +797,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 32,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 3, , table: l2_cntxt_tcam.0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -851,7 +815,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 334,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -876,7 +839,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_HASH,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 347,
.blob_key_bit_size = 73,
.key_bit_size = 73,
@@ -899,7 +861,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 352,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -917,8 +878,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 33,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 3, , table: control.conflict_check */
.resource_func = BNXT_ULP_RESOURCE_FUNC_CTRL_TABLE,
@@ -936,8 +896,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.func_opr1 = BNXT_ULP_RF_IDX_FLOW_SIG_ID,
.func_src2 = BNXT_ULP_FUNC_SRC_COMP_FIELD,
.func_opr2 = BNXT_ULP_CF_IDX_FLOW_SIG_ID,
- .func_dst_opr = BNXT_ULP_RF_IDX_CC },
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .func_dst_opr = BNXT_ULP_RF_IDX_CC }
},
{ /* class_tid: 3, , table: profile_tcam.ipv4 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -955,7 +914,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 355,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -982,7 +940,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 398,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1007,7 +964,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 441,
.blob_key_bit_size = 14,
.key_bit_size = 14,
@@ -1029,7 +985,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 444,
.blob_key_bit_size = 176,
.key_bit_size = 176,
@@ -1051,7 +1006,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 454,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -1073,7 +1027,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 464,
.blob_key_bit_size = 416,
.key_bit_size = 416,
@@ -1095,7 +1048,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 475,
.blob_key_bit_size = 448,
.key_bit_size = 448,
@@ -1120,7 +1072,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 292,
.result_bit_size = 128,
.result_num_fields = 26
@@ -1139,7 +1090,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 486,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1157,8 +1107,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 41,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 4, , table: l2_cntxt_tcam.ing_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1178,7 +1127,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 487,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1203,7 +1151,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 500,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1225,7 +1172,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 335,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1243,7 +1189,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 336,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1261,7 +1206,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 337,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1275,8 +1219,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND,
.cond_start_idx = 42,
.cond_nums = 1 },
- .fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_opcode = BNXT_ULP_FDB_OPC_NOP
},
{ /* class_tid: 4, , table: int_full_act_record.egr_vfr */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1294,7 +1237,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 338,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -1314,7 +1256,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 501,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1332,8 +1273,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 43,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 4, , table: l2_cntxt_tcam_bypass.egr_vfr */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1351,7 +1291,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 502,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1376,7 +1315,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 515,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1399,7 +1337,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 516,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1417,8 +1354,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 44,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 4, , table: l2_cntxt_tcam.egr_0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1436,7 +1372,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 517,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1461,7 +1396,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 530,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1486,7 +1420,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 398,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -1505,7 +1438,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 424,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1523,7 +1455,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 425,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1541,7 +1472,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD,
.tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 426,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1562,7 +1492,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 427,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -1582,7 +1511,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 531,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1600,8 +1528,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 47,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 5, , table: l2_cntxt_tcam.vf_egr */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1619,7 +1546,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 532,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1644,7 +1570,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 545,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1666,7 +1591,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 470,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1684,7 +1608,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 471,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1702,7 +1625,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST,
.tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 472,
.result_bit_size = 32,
.result_num_fields = 1
@@ -1723,7 +1645,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_AND_SET_VFR_FLAG,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.result_start_idx = 473,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -1746,7 +1667,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 546,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1771,7 +1691,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 559,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1789,8 +1708,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_start_idx = 48,
.cond_nums = 1 },
.fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE,
- .fdb_operand = BNXT_ULP_RF_IDX_RID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE
+ .fdb_operand = BNXT_ULP_RF_IDX_RID
},
{ /* class_tid: 5, , table: l2_cntxt_tcam_bypass.vfr_egr0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
@@ -1808,7 +1726,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.fdb_operand = BNXT_ULP_RF_IDX_RID,
.pri_opcode = BNXT_ULP_PRI_OPC_CONST,
.pri_operand = 0,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 560,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1833,7 +1750,6 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE,
.gen_tbl_lkup_type = BNXT_ULP_GENERIC_TBL_LKUP_TYPE_INDEX,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 573,
.blob_key_bit_size = 8,
.key_bit_size = 8,
@@ -1858,11 +1774,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
+ .record_size = 8,
.result_start_idx = 529,
.result_bit_size = 0,
.result_num_fields = 0,
- .encap_num_fields = 12
+ .encap_num_fields = 11
},
{ /* class_tid: 5, , table: int_full_act_record.vfr_egr0 */
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -1880,8 +1796,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 541,
+ .result_start_idx = 540,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -1901,8 +1816,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
- .result_start_idx = 567,
+ .result_start_idx = 566,
.result_bit_size = 128,
.result_num_fields = 26
},
@@ -1923,12 +1837,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 574,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 593,
+ .result_start_idx = 592,
.result_bit_size = 64,
.result_num_fields = 13,
.ident_start_idx = 26,
@@ -1951,12 +1864,11 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.pri_operand = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO,
- .byte_order = BNXT_ULP_BYTE_ORDER_LE,
.key_start_idx = 587,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 606,
+ .result_start_idx = 605,
.result_bit_size = 64,
.result_num_fields = 13,
.ident_start_idx = 26,
@@ -2522,17 +2434,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
@@ -6207,17 +6115,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
@@ -8046,17 +7950,13 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
.field_info_spec = {
.description = "tun_hdr_type",
.field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_TUN_HDR_TYPE_NONE}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
}
},
{
@@ -16093,22 +15993,26 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
},
/* class_tid: 5, , table: int_vtag_encap_record.vfr_egr0 */
{
- .description = "ecv_tun_type",
- .field_bit_size = 3,
+ .description = "ecv_valid",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ 1}
},
{
- .description = "ecv_l4_type",
- .field_bit_size = 3,
+ .description = "ecv_custom_en",
+ .field_bit_size = 1,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_l3_type",
- .field_bit_size = 3,
+ .description = "ecv_vtag_type",
+ .field_bit_size = 4,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
+ .field_opr1 = {
+ ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
},
{
.description = "ecv_l2_en",
@@ -16117,26 +16021,22 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_vtag_type",
- .field_bit_size = 4,
+ .description = "ecv_l3_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- ULP_WP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_custom_en",
- .field_bit_size = 1,
+ .description = "ecv_l4_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "ecv_valid",
- .field_bit_size = 1,
+ .description = "ecv_tun_type",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CONST,
- .field_opr1 = {
- 1}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_tpid",
@@ -16148,13 +16048,10 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
0x00}
},
{
- .description = "vtag_vid",
- .field_bit_size = 12,
+ .description = "vtag_pcp",
+ .field_bit_size = 3,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_CF,
- .field_opr1 = {
- (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
- BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}
+ .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
.description = "vtag_de",
@@ -16163,16 +16060,13 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = {
.field_src1 = BNXT_ULP_FIELD_SRC_ZERO
},
{
- .description = "vtag_pcp",
- .field_bit_size = 3,
- .field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
- },
- {
- .description = "spare",
- .field_bit_size = 80,
+ .description = "vtag_vid",
+ .field_bit_size = 12,
.field_opc = BNXT_ULP_FIELD_OPC_SRC1,
- .field_src1 = BNXT_ULP_FIELD_SRC_ZERO
+ .field_src1 = BNXT_ULP_FIELD_SRC_CF,
+ .field_opr1 = {
+ (BNXT_ULP_CF_IDX_DEV_PORT_ID >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_DEV_PORT_ID & 0xff}
},
/* class_tid: 5, , table: int_full_act_record.vfr_egr0 */
{
@@ -116,7 +116,7 @@ ulp_flow_db_resource_func_get(struct ulp_fdb_resource_info *res_info)
func = (((res_info->nxt_resource_idx & ULP_FLOW_DB_RES_FUNC_MASK) >>
ULP_FLOW_DB_RES_FUNC_BITS) << ULP_FLOW_DB_RES_FUNC_UPPER);
- /* The reource func is split into upper and lower */
+ /* The resource func is split into upper and lower */
if (func & ULP_FLOW_DB_RES_FUNC_NEED_LOWER)
return (func | res_info->resource_func_lower);
return func;
@@ -622,7 +622,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
if (params->critical_resource && fid_resource->resource_em_handle) {
BNXT_TF_DBG(DEBUG, "Ignore multiple critical resources\n");
- /* Ignore the multiple criticial resources */
+ /* Ignore the multiple critical resources */
params->critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO;
}
@@ -674,7 +674,7 @@ ulp_flow_db_resource_add(struct bnxt_ulp_context *ulp_ctxt,
* flow_type [in] Specify it is regular or default flow
* fid [in] The index to the flow entry
* params [in/out] The contents to be copied into params.
- * Onlythe critical_resource needs to be set by the caller.
+ * Only the critical_resource needs to be set by the caller.
*
* Returns 0 on success and negative on failure.
*/
@@ -18,7 +18,7 @@
/*
* Structure for the flow database resource information
- * The below structure is based on the below paritions
+ * The below structure is based on the below partitions
* nxt_resource_idx = dir[31],resource_func_upper[30:28],nxt_resource_idx[27:0]
* If resource_func is EM_TBL then use resource_em_handle.
* Else the other part of the union is used and
@@ -185,7 +185,7 @@ ulp_ha_mgr_timer_cb(void *arg __rte_unused)
rc = ulp_ha_mgr_state_get(ulp_ctx, &curr_state);
if (rc) {
/*
- * This shouldn't happen, if it does, resetart the timer
+ * This shouldn't happen, if it does, reset the timer
* and try again next time.
*/
BNXT_TF_DBG(ERR, "Failed(%d) to get state.\n",
@@ -1010,7 +1010,7 @@ ulp_mapper_field_src_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
idx = tfp_be_to_cpu_16(idx);
- if (idx >= BNXT_ULP_CF_IDX_LAST || bytelen > sizeof(uint32_t)) {
+ if (idx >= BNXT_ULP_CF_IDX_LAST || bytelen > sizeof(uint64_t)) {
BNXT_TF_DBG(ERR, "comp field [%d] read oob %d\n", idx,
bytelen);
return -EINVAL;
@@ -1215,8 +1215,47 @@ ulp_mapper_field_src_process(struct bnxt_ulp_mapper_parms *parms,
BNXT_TF_DBG(ERR, "field port table failed\n");
return -EINVAL;
}
+ break;
+ case BNXT_ULP_FIELD_SRC_ENC_HDR_BIT:
+ if (!ulp_operand_read(field_opr,
+ (uint8_t *)&lregval, sizeof(uint64_t))) {
+ BNXT_TF_DBG(ERR, "Header bit read failed\n");
+ return -EINVAL;
+ }
+ lregval = tfp_be_to_cpu_64(lregval);
+ if (ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits, lregval)) {
+ *val = mapper_fld_one;
+ *value = 1;
+ } else {
+ *val = mapper_fld_zeros;
+ }
+ break;
+ case BNXT_ULP_FIELD_SRC_ENC_FIELD:
+ if (!ulp_operand_read(field_opr,
+ (uint8_t *)&idx, sizeof(uint16_t))) {
+ BNXT_TF_DBG(ERR, "Header field read failed\n");
+ return -EINVAL;
+ }
+ idx = tfp_be_to_cpu_16(idx);
+ /* get the index from the global field list */
+ if (idx >= BNXT_ULP_ENC_FIELD_LAST) {
+ BNXT_TF_DBG(ERR, "invalid encap field tbl idx %d\n",
+ idx);
+ return -EINVAL;
+ }
+ buffer = parms->enc_field[idx].spec;
+ field_size = parms->enc_field[idx].size;
+ if (bytelen > field_size) {
+ BNXT_TF_DBG(ERR, "Encap field[%d] size small %u\n",
+ idx, field_size);
+ return -EINVAL;
+ }
+ *val = &buffer[field_size - bytelen];
+ break;
case BNXT_ULP_FIELD_SRC_SKIP:
/* do nothing */
+ *val = mapper_fld_zeros;
+ *val_len = 0;
break;
case BNXT_ULP_FIELD_SRC_REJECT:
return -EINVAL;
@@ -1270,6 +1309,8 @@ static int32_t ulp_mapper_field_blob_write(enum bnxt_ulp_field_src fld_src,
BNXT_TF_DBG(ERR, "encap blob push failed\n");
return -EINVAL;
}
+ } else if (fld_src == BNXT_ULP_FIELD_SRC_SKIP) {
+ /* do nothing */
} else {
if (!ulp_blob_push(blob, val, val_len)) {
BNXT_TF_DBG(ERR, "push of val1 failed\n");
@@ -1465,7 +1506,7 @@ ulp_mapper_field_opc_process(struct bnxt_ulp_mapper_parms *parms,
if (!rc) {
#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_MAPPER
- if (fld->field_src1 != BNXT_ULP_FIELD_SRC_ZERO)
+ if (fld->field_src1 != BNXT_ULP_FIELD_SRC_ZERO && val_len)
ulp_mapper_field_dump(name, fld, blob, write_idx, val,
val_len);
#endif
@@ -1489,7 +1530,8 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
const char *name)
{
struct bnxt_ulp_mapper_field_info *dflds;
- uint32_t i, num_flds = 0, encap_flds = 0;
+ uint32_t i = 0, num_flds = 0, encap_flds = 0;
+ struct ulp_blob encap_blob;
int32_t rc = 0;
/* Get the result field list */
@@ -1506,33 +1548,60 @@ ulp_mapper_tbl_result_build(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
- /* process the result fields, loop through them */
- for (i = 0; i < (num_flds + encap_flds); i++) {
- /* set the swap index if encap swap bit is enabled */
- if (parms->device_params->encap_byte_swap && encap_flds &&
- i == num_flds)
- ulp_blob_encap_swap_idx_set(data);
-
- /* Process the result fields */
+ /* process the result fields */
+ for (i = 0; i < num_flds; i++) {
rc = ulp_mapper_field_opc_process(parms, tbl->direction,
&dflds[i], data, 0, name);
if (rc) {
- BNXT_TF_DBG(ERR, "data field failed\n");
+ BNXT_TF_DBG(ERR, "result field processing failed\n");
return rc;
}
}
- /* if encap bit swap is enabled perform the bit swap */
- if (parms->device_params->encap_byte_swap && encap_flds) {
- ulp_blob_perform_encap_swap(data);
+ /* process encap fields if any */
+ if (encap_flds) {
+ uint32_t pad = 0;
+ /* Initialize the encap blob */
+ if (!tbl->record_size) {
+ BNXT_TF_DBG(ERR, "Encap tbl record size incorrect\n");
+ return -EINVAL;
+ }
+ if (!ulp_blob_init(&encap_blob,
+ ULP_BYTE_2_BITS(tbl->record_size),
+ parms->device_params->encap_byte_order)) {
+ BNXT_TF_DBG(ERR, "blob inits failed.\n");
+ return -EINVAL;
+ }
+ for (; i < encap_flds; i++) {
+ rc = ulp_mapper_field_opc_process(parms, tbl->direction,
+ &dflds[i],
+ &encap_blob, 0, name);
+ if (rc) {
+ BNXT_TF_DBG(ERR,
+ "encap field processing failed\n");
+ return rc;
+ }
+ }
+ /* add the dynamic pad push */
+ pad = ULP_BYTE_2_BITS(tbl->record_size) -
+ ulp_blob_data_len_get(&encap_blob);
+ ulp_blob_pad_push(&encap_blob, pad);
+
+ /* perform the 64 bit byte swap */
+ ulp_blob_perform_64B_byte_swap(&encap_blob);
+ /* Append encap blob to the result blob */
+ rc = ulp_blob_buffer_copy(data, &encap_blob);
+ if (rc) {
+ BNXT_TF_DBG(ERR, "encap buffer copy failed\n");
+ return rc;
+ }
+ }
#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG
#ifdef RTE_LIBRTE_BNXT_TRUFLOW_DEBUG_MAPPER
- BNXT_TF_DBG(INFO, "Dump after encap swap\n");
- ulp_mapper_blob_dump(data);
+ BNXT_TF_DBG(DEBUG, "Result dump\n");
+ ulp_mapper_blob_dump(data);
#endif
#endif
- }
-
return rc;
}
@@ -1934,11 +2003,14 @@ ulp_mapper_tcam_tbl_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
- if (!ulp_blob_init(key, tbl->blob_key_bit_size, tbl->byte_order) ||
- !ulp_blob_init(mask, tbl->blob_key_bit_size, tbl->byte_order) ||
- !ulp_blob_init(&data, tbl->result_bit_size, dparms->byte_order) ||
+ if (!ulp_blob_init(key, tbl->blob_key_bit_size,
+ dparms->key_byte_order) ||
+ !ulp_blob_init(mask, tbl->blob_key_bit_size,
+ dparms->key_byte_order) ||
+ !ulp_blob_init(&data, tbl->result_bit_size,
+ dparms->result_byte_order) ||
!ulp_blob_init(&update_data, tbl->result_bit_size,
- dparms->byte_order)) {
+ dparms->result_byte_order)) {
BNXT_TF_DBG(ERR, "blob inits failed.\n");
return -EINVAL;
}
@@ -2145,9 +2217,9 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
/* Initialize the key/result blobs */
if (!ulp_blob_init(&key, tbl->blob_key_bit_size,
- tbl->byte_order) ||
+ dparms->key_byte_order) ||
!ulp_blob_init(&data, tbl->result_bit_size,
- tbl->byte_order)) {
+ dparms->result_byte_order)) {
BNXT_TF_DBG(ERR, "blob inits failed.\n");
return -EINVAL;
}
@@ -2336,7 +2408,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms,
/* Initialize the blob data */
if (!ulp_blob_init(&data, bit_size,
- parms->device_params->byte_order)) {
+ parms->device_params->result_byte_order)) {
BNXT_TF_DBG(ERR, "Failed to initialize index table blob\n");
return -EINVAL;
}
@@ -2627,7 +2699,7 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,
tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session);
/* Initialize the blob data */
if (!ulp_blob_init(&data, tbl->result_bit_size,
- parms->device_params->byte_order)) {
+ parms->device_params->result_byte_order)) {
BNXT_TF_DBG(ERR, "Failed initial index table blob\n");
return -EINVAL;
}
@@ -2658,7 +2730,7 @@ ulp_mapper_if_tbl_process(struct bnxt_ulp_mapper_parms *parms,
case BNXT_ULP_IF_TBL_OPC_RD_COMP_FIELD:
/* Initialize the result blob */
if (!ulp_blob_init(&res_blob, tbl->result_bit_size,
- parms->device_params->byte_order)) {
+ parms->device_params->result_byte_order)) {
BNXT_TF_DBG(ERR, "Failed initial result blob\n");
return -EINVAL;
}
@@ -2747,7 +2819,7 @@ ulp_mapper_gen_tbl_process(struct bnxt_ulp_mapper_parms *parms,
}
if (!ulp_blob_init(&key, tbl->key_bit_size,
- parms->device_params->byte_order)) {
+ parms->device_params->key_byte_order)) {
BNXT_TF_DBG(ERR, "Failed to alloc blob\n");
return -EINVAL;
}
@@ -3252,6 +3324,26 @@ ulp_mapper_cond_opc_process(struct bnxt_ulp_mapper_parms *parms,
}
*res = (mtype == BNXT_ULP_FLOW_MEM_TYPE_INT) ? 1 : 0;
break;
+ case BNXT_ULP_COND_OPC_ENC_HDR_BIT_IS_SET:
+ if (operand < BNXT_ULP_HDR_BIT_LAST) {
+ *res = ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits,
+ operand);
+ } else {
+ BNXT_TF_DBG(ERR, "header bit out of bounds %d\n",
+ operand);
+ rc = -EINVAL;
+ }
+ break;
+ case BNXT_ULP_COND_OPC_ENC_HDR_BIT_NOT_SET:
+ if (operand < BNXT_ULP_HDR_BIT_LAST) {
+ *res = !ULP_BITMAP_ISSET(parms->enc_hdr_bitmap->bits,
+ operand);
+ } else {
+ BNXT_TF_DBG(ERR, "header bit out of bounds %d\n",
+ operand);
+ rc = -EINVAL;
+ }
+ break;
default:
BNXT_TF_DBG(ERR, "Invalid conditional opcode %d\n", opc);
rc = -EINVAL;
@@ -3864,8 +3956,10 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
parms.act_prop = cparms->act_prop;
parms.act_bitmap = cparms->act;
parms.hdr_bitmap = cparms->hdr_bitmap;
+ parms.enc_hdr_bitmap = cparms->enc_hdr_bitmap;
parms.regfile = ®file;
parms.hdr_field = cparms->hdr_field;
+ parms.enc_field = cparms->enc_field;
parms.fld_bitmap = cparms->fld_bitmap;
parms.comp_fld = cparms->comp_fld;
parms.ulp_ctx = ulp_ctx;
@@ -44,7 +44,9 @@ struct bnxt_ulp_mapper_parms {
struct ulp_rte_act_prop *act_prop;
struct ulp_rte_act_bitmap *act_bitmap;
struct ulp_rte_hdr_bitmap *hdr_bitmap;
+ struct ulp_rte_hdr_bitmap *enc_hdr_bitmap;
struct ulp_rte_hdr_field *hdr_field;
+ struct ulp_rte_hdr_field *enc_field;
struct ulp_rte_field_bitmap *fld_bitmap;
uint64_t *comp_fld;
struct ulp_regfile *regfile;
@@ -67,7 +69,9 @@ struct bnxt_ulp_mapper_parms {
struct bnxt_ulp_mapper_create_parms {
uint32_t app_priority;
struct ulp_rte_hdr_bitmap *hdr_bitmap;
+ struct ulp_rte_hdr_bitmap *enc_hdr_bitmap;
struct ulp_rte_hdr_field *hdr_field;
+ struct ulp_rte_hdr_field *enc_field;
uint64_t *comp_fld;
struct ulp_rte_act_bitmap *act;
struct ulp_rte_act_prop *act_prop;
@@ -40,6 +40,18 @@ ulp_rte_item_skip_void(const struct rte_flow_item **item, uint32_t increment)
return 0;
}
+/* Utility function to copy field spec items */
+static struct ulp_rte_hdr_field *
+ulp_rte_parser_fld_copy(struct ulp_rte_hdr_field *field,
+ const void *buffer,
+ uint32_t size)
+{
+ field->size = size;
+ memcpy(field->spec, buffer, field->size);
+ field++;
+ return field;
+}
+
/* Utility function to update the field_bitmap */
static void
ulp_rte_parser_field_bitmap_update(struct ulp_rte_parser_params *params,
@@ -883,7 +895,7 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
BNXT_ULP_HDR_BIT_II_VLAN);
inner_flag = 1;
} else {
- BNXT_TF_DBG(ERR, "Error Parsing:Vlan hdr found withtout eth\n");
+ BNXT_TF_DBG(ERR, "Error Parsing:Vlan hdr found without eth\n");
return BNXT_TF_RC_ERROR;
}
/* Update the field protocol hdr bitmap */
@@ -1726,6 +1738,184 @@ ulp_rte_rss_act_handler(const struct rte_flow_action *action_item,
return BNXT_TF_RC_SUCCESS;
}
+/* Function to handle the parsing of RTE Flow item eth Header. */
+static void
+ulp_rte_enc_eth_hdr_handler(struct ulp_rte_parser_params *params,
+ const struct rte_flow_item_eth *eth_spec)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_ETH_DMAC];
+ size = sizeof(eth_spec->dst.addr_bytes);
+ field = ulp_rte_parser_fld_copy(field, eth_spec->dst.addr_bytes, size);
+
+ size = sizeof(eth_spec->src.addr_bytes);
+ field = ulp_rte_parser_fld_copy(field, eth_spec->src.addr_bytes, size);
+
+ size = sizeof(eth_spec->type);
+ field = ulp_rte_parser_fld_copy(field, ð_spec->type, size);
+
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_ETH);
+}
+
+/* Function to handle the parsing of RTE Flow item vlan Header. */
+static void
+ulp_rte_enc_vlan_hdr_handler(struct ulp_rte_parser_params *params,
+ const struct rte_flow_item_vlan *vlan_spec,
+ uint32_t inner)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+
+ if (!inner) {
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_O_VLAN_TCI];
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits,
+ BNXT_ULP_HDR_BIT_OO_VLAN);
+ } else {
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_I_VLAN_TCI];
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits,
+ BNXT_ULP_HDR_BIT_OI_VLAN);
+ }
+
+ size = sizeof(vlan_spec->tci);
+ field = ulp_rte_parser_fld_copy(field, &vlan_spec->tci, size);
+
+ size = sizeof(vlan_spec->inner_type);
+ field = ulp_rte_parser_fld_copy(field, &vlan_spec->inner_type, size);
+}
+
+/* Function to handle the parsing of RTE Flow item ipv4 Header. */
+static void
+ulp_rte_enc_ipv4_hdr_handler(struct ulp_rte_parser_params *params,
+ const struct rte_flow_item_ipv4 *ip)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+ uint8_t val8;
+
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV4_IHL];
+ size = sizeof(ip->hdr.version_ihl);
+ if (!ip->hdr.version_ihl)
+ val8 = RTE_IPV4_VHL_DEF;
+ else
+ val8 = ip->hdr.version_ihl;
+ field = ulp_rte_parser_fld_copy(field, &val8, size);
+
+ size = sizeof(ip->hdr.type_of_service);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.type_of_service, size);
+
+ size = sizeof(ip->hdr.packet_id);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.packet_id, size);
+
+ size = sizeof(ip->hdr.fragment_offset);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.fragment_offset, size);
+
+ size = sizeof(ip->hdr.time_to_live);
+ if (!ip->hdr.time_to_live)
+ val8 = BNXT_ULP_DEFAULT_TTL;
+ else
+ val8 = ip->hdr.time_to_live;
+ field = ulp_rte_parser_fld_copy(field, &val8, size);
+
+ size = sizeof(ip->hdr.next_proto_id);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.next_proto_id, size);
+
+ size = sizeof(ip->hdr.src_addr);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.src_addr, size);
+
+ size = sizeof(ip->hdr.dst_addr);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.dst_addr, size);
+
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_IPV4);
+}
+
+/* Function to handle the parsing of RTE Flow item ipv6 Header. */
+static void
+ulp_rte_enc_ipv6_hdr_handler(struct ulp_rte_parser_params *params,
+ const struct rte_flow_item_ipv6 *ip)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+ uint32_t val32;
+ uint8_t val8;
+
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV6_VTC_FLOW];
+ size = sizeof(ip->hdr.vtc_flow);
+ if (!ip->hdr.vtc_flow)
+ val32 = rte_cpu_to_be_32(BNXT_ULP_IPV6_DFLT_VER);
+ else
+ val32 = ip->hdr.vtc_flow;
+ field = ulp_rte_parser_fld_copy(field, &val32, size);
+
+ size = sizeof(ip->hdr.proto);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.proto, size);
+
+ size = sizeof(ip->hdr.hop_limits);
+ if (!ip->hdr.hop_limits)
+ val8 = BNXT_ULP_DEFAULT_TTL;
+ else
+ val8 = ip->hdr.hop_limits;
+ field = ulp_rte_parser_fld_copy(field, &val8, size);
+
+ size = sizeof(ip->hdr.src_addr);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.src_addr, size);
+
+ size = sizeof(ip->hdr.dst_addr);
+ field = ulp_rte_parser_fld_copy(field, &ip->hdr.dst_addr, size);
+
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_IPV6);
+}
+
+/* Function to handle the parsing of RTE Flow item UDP Header. */
+static void
+ulp_rte_enc_udp_hdr_handler(struct ulp_rte_parser_params *params,
+ const struct rte_flow_item_udp *udp_spec)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+ uint8_t type = IPPROTO_UDP;
+
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_UDP_SPORT];
+ size = sizeof(udp_spec->hdr.src_port);
+ field = ulp_rte_parser_fld_copy(field, &udp_spec->hdr.src_port, size);
+
+ size = sizeof(udp_spec->hdr.dst_port);
+ field = ulp_rte_parser_fld_copy(field, &udp_spec->hdr.dst_port, size);
+
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_O_UDP);
+
+ /* Update thhe ip header protocol */
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV4_PROTO];
+ ulp_rte_parser_fld_copy(field, &type, sizeof(type));
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_IPV6_PROTO];
+ ulp_rte_parser_fld_copy(field, &type, sizeof(type));
+}
+
+/* Function to handle the parsing of RTE Flow item vxlan Header. */
+static void
+ulp_rte_enc_vxlan_hdr_handler(struct ulp_rte_parser_params *params,
+ struct rte_flow_item_vxlan *vxlan_spec)
+{
+ struct ulp_rte_hdr_field *field;
+ uint32_t size;
+
+ field = ¶ms->enc_field[BNXT_ULP_ENC_FIELD_VXLAN_FLAGS];
+ size = sizeof(vxlan_spec->flags);
+ field = ulp_rte_parser_fld_copy(field, &vxlan_spec->flags, size);
+
+ size = sizeof(vxlan_spec->rsvd0);
+ field = ulp_rte_parser_fld_copy(field, &vxlan_spec->rsvd0, size);
+
+ size = sizeof(vxlan_spec->vni);
+ field = ulp_rte_parser_fld_copy(field, &vxlan_spec->vni, size);
+
+ size = sizeof(vxlan_spec->rsvd1);
+ field = ulp_rte_parser_fld_copy(field, &vxlan_spec->rsvd1, size);
+
+ ULP_BITMAP_SET(params->enc_hdr_bitmap.bits, BNXT_ULP_HDR_BIT_T_VXLAN);
+}
+
/* Function to handle the parsing of RTE Flow action vxlan_encap Header. */
int32_t
ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
@@ -1733,23 +1923,14 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
{
const struct rte_flow_action_vxlan_encap *vxlan_encap;
const struct rte_flow_item *item;
- const struct rte_flow_item_eth *eth_spec;
const struct rte_flow_item_ipv4 *ipv4_spec;
const struct rte_flow_item_ipv6 *ipv6_spec;
struct rte_flow_item_vxlan vxlan_spec;
uint32_t vlan_num = 0, vlan_size = 0;
uint32_t ip_size = 0, ip_type = 0;
uint32_t vxlan_size = 0;
- uint8_t *buff;
- /* IP header per byte - ver/hlen, TOS, ID, ID, FRAG, FRAG, TTL, PROTO */
- const uint8_t def_ipv4_hdr[] = {0x45, 0x00, 0x00, 0x01, 0x00,
- 0x00, 0x40, 0x11};
- /* IPv6 header per byte - vtc-flow,flow,zero,nexthdr-ttl */
- const uint8_t def_ipv6_hdr[] = {0x60, 0x00, 0x00, 0x01, 0x00,
- 0x00, 0x11, 0xf6};
struct ulp_rte_act_bitmap *act = ¶ms->act_bitmap;
struct ulp_rte_act_prop *ap = ¶ms->act_prop;
- const uint8_t *tmp_buff;
vxlan_encap = action_item->conf;
if (!vxlan_encap) {
@@ -1771,18 +1952,10 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
BNXT_TF_DBG(ERR, "Parse Error:vxlan encap does not have eth\n");
return BNXT_TF_RC_ERROR;
}
- eth_spec = item->spec;
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC];
- ulp_encap_buffer_copy(buff,
- eth_spec->dst.addr_bytes,
- BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC,
- ULP_BUFFER_ALIGN_8_BYTE);
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC];
- ulp_encap_buffer_copy(buff,
- eth_spec->src.addr_bytes,
- BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC,
- ULP_BUFFER_ALIGN_8_BYTE);
+ /* Parse the ethernet header */
+ if (item->spec)
+ ulp_rte_enc_eth_hdr_handler(params, item->spec);
/* Goto the next item */
if (!ulp_rte_item_skip_void(&item, 1))
@@ -1791,11 +1964,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
/* May have vlan header */
if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
vlan_num++;
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG];
- ulp_encap_buffer_copy(buff,
- item->spec,
- sizeof(struct rte_flow_item_vlan),
- ULP_BUFFER_ALIGN_8_BYTE);
+ if (item->spec)
+ ulp_rte_enc_vlan_hdr_handler(params, item->spec, 0);
if (!ulp_rte_item_skip_void(&item, 1))
return BNXT_TF_RC_ERROR;
@@ -1804,13 +1974,13 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
/* may have two vlan headers */
if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
vlan_num++;
- memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG +
- sizeof(struct rte_flow_item_vlan)],
- item->spec,
- sizeof(struct rte_flow_item_vlan));
+ if (item->spec)
+ ulp_rte_enc_vlan_hdr_handler(params, item->spec, 1);
+
if (!ulp_rte_item_skip_void(&item, 1))
return BNXT_TF_RC_ERROR;
}
+
/* Update the vlan count and size of more than one */
if (vlan_num) {
vlan_size = vlan_num * sizeof(struct rte_flow_item_vlan);
@@ -1829,49 +1999,6 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
ipv4_spec = item->spec;
ip_size = BNXT_ULP_ENCAP_IPV4_SIZE;
- /* copy the ipv4 details */
- if (ulp_buffer_is_empty(&ipv4_spec->hdr.version_ihl,
- BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS)) {
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];
- ulp_encap_buffer_copy(buff,
- def_ipv4_hdr,
- BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS +
- BNXT_ULP_ENCAP_IPV4_ID_PROTO,
- ULP_BUFFER_ALIGN_8_BYTE);
- } else {
- /* Total length being ignored in the ip hdr. */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];
- tmp_buff = (const uint8_t *)&ipv4_spec->hdr.packet_id;
- ulp_encap_buffer_copy(buff,
- tmp_buff,
- BNXT_ULP_ENCAP_IPV4_ID_PROTO,
- ULP_BUFFER_ALIGN_8_BYTE);
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +
- BNXT_ULP_ENCAP_IPV4_ID_PROTO];
- ulp_encap_buffer_copy(buff,
- &ipv4_spec->hdr.version_ihl,
- BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS,
- ULP_BUFFER_ALIGN_8_BYTE);
- }
-
- /* Update the dst ip address in ip encap buffer */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +
- BNXT_ULP_ENCAP_IPV4_VER_HLEN_TOS +
- BNXT_ULP_ENCAP_IPV4_ID_PROTO];
- ulp_encap_buffer_copy(buff,
- (const uint8_t *)&ipv4_spec->hdr.dst_addr,
- sizeof(ipv4_spec->hdr.dst_addr),
- ULP_BUFFER_ALIGN_8_BYTE);
-
- /* Update the src ip address */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC +
- BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC -
- sizeof(ipv4_spec->hdr.src_addr)];
- ulp_encap_buffer_copy(buff,
- (const uint8_t *)&ipv4_spec->hdr.src_addr,
- sizeof(ipv4_spec->hdr.src_addr),
- ULP_BUFFER_ALIGN_8_BYTE);
-
/* Update the ip size details */
ip_size = tfp_cpu_to_be_32(ip_size);
memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ],
@@ -1885,6 +2012,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
/* update the computed field to notify it is ipv4 header */
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_ENCAP_IPV4_FLAG,
1);
+ if (ipv4_spec)
+ ulp_rte_enc_ipv4_hdr_handler(params, ipv4_spec);
if (!ulp_rte_item_skip_void(&item, 1))
return BNXT_TF_RC_ERROR;
@@ -1892,47 +2021,6 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
ipv6_spec = item->spec;
ip_size = BNXT_ULP_ENCAP_IPV6_SIZE;
- /* copy the ipv6 details */
- tmp_buff = (const uint8_t *)&ipv6_spec->hdr.vtc_flow;
- if (ulp_buffer_is_empty(tmp_buff,
- BNXT_ULP_ENCAP_IPV6_VTC_FLOW)) {
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];
- ulp_encap_buffer_copy(buff,
- def_ipv6_hdr,
- sizeof(def_ipv6_hdr),
- ULP_BUFFER_ALIGN_8_BYTE);
- } else {
- /* The payload length being ignored in the ip hdr. */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP];
- tmp_buff = (const uint8_t *)&ipv6_spec->hdr.proto;
- ulp_encap_buffer_copy(buff,
- tmp_buff,
- BNXT_ULP_ENCAP_IPV6_PROTO_TTL,
- ULP_BUFFER_ALIGN_8_BYTE);
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +
- BNXT_ULP_ENCAP_IPV6_PROTO_TTL +
- BNXT_ULP_ENCAP_IPV6_DO];
- tmp_buff = (const uint8_t *)&ipv6_spec->hdr.vtc_flow;
- ulp_encap_buffer_copy(buff,
- tmp_buff,
- BNXT_ULP_ENCAP_IPV6_VTC_FLOW,
- ULP_BUFFER_ALIGN_8_BYTE);
- }
- /* Update the dst ip address in ip encap buffer */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP +
- sizeof(def_ipv6_hdr)];
- ulp_encap_buffer_copy(buff,
- (const uint8_t *)ipv6_spec->hdr.dst_addr,
- sizeof(ipv6_spec->hdr.dst_addr),
- ULP_BUFFER_ALIGN_8_BYTE);
-
- /* Update the src ip address */
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC];
- ulp_encap_buffer_copy(buff,
- (const uint8_t *)ipv6_spec->hdr.src_addr,
- sizeof(ipv6_spec->hdr.src_addr),
- ULP_BUFFER_ALIGN_16_BYTE);
-
/* Update the ip size details */
ip_size = tfp_cpu_to_be_32(ip_size);
memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ],
@@ -1946,6 +2034,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
/* update the computed field to notify it is ipv6 header */
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_ACT_ENCAP_IPV6_FLAG,
1);
+ if (ipv6_spec)
+ ulp_rte_enc_ipv6_hdr_handler(params, ipv6_spec);
if (!ulp_rte_item_skip_void(&item, 1))
return BNXT_TF_RC_ERROR;
@@ -1959,10 +2049,8 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
BNXT_TF_DBG(ERR, "vxlan encap does not have udp\n");
return BNXT_TF_RC_ERROR;
}
- /* copy the udp details */
- ulp_encap_buffer_copy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP],
- item->spec, BNXT_ULP_ENCAP_UDP_SIZE,
- ULP_BUFFER_ALIGN_8_BYTE);
+ if (item->spec)
+ ulp_rte_enc_udp_hdr_handler(params, item->spec);
if (!ulp_rte_item_skip_void(&item, 1))
return BNXT_TF_RC_ERROR;
@@ -1976,21 +2064,12 @@ ulp_rte_vxlan_encap_act_handler(const struct rte_flow_action *action_item,
/* copy the vxlan details */
memcpy(&vxlan_spec, item->spec, vxlan_size);
vxlan_spec.flags = 0x08;
- buff = &ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN];
- if (ip_type == rte_cpu_to_be_32(BNXT_ULP_ETH_IPV4)) {
- ulp_encap_buffer_copy(buff, (const uint8_t *)&vxlan_spec,
- vxlan_size, ULP_BUFFER_ALIGN_8_BYTE);
- } else {
- ulp_encap_buffer_copy(buff, (const uint8_t *)&vxlan_spec,
- vxlan_size / 2, ULP_BUFFER_ALIGN_8_BYTE);
- ulp_encap_buffer_copy(buff + (vxlan_size / 2),
- (const uint8_t *)&vxlan_spec.vni,
- vxlan_size / 2, ULP_BUFFER_ALIGN_8_BYTE);
- }
vxlan_size = tfp_cpu_to_be_32(vxlan_size);
memcpy(&ap->act_details[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ],
&vxlan_size, sizeof(uint32_t));
+ ulp_rte_enc_vxlan_hdr_handler(params, &vxlan_spec);
+
/* update the hdr_bitmap with vxlan */
ULP_BITMAP_SET(act->bits, BNXT_ULP_ACT_BIT_VXLAN_ENCAP);
return BNXT_TF_RC_SUCCESS;
@@ -33,8 +33,10 @@
#define BNXT_ULP_GET_IPV6_FLOWLABEL(vtcf) \
((vtcf) & BNXT_ULP_PARSER_IPV6_FLOW_LABEL)
#define BNXT_ULP_PARSER_IPV6_VER_MASK 0xf0000000
+#define BNXT_ULP_IPV6_DFLT_VER 0x60000000
#define BNXT_ULP_PARSER_IPV6_TC 0x0ff00000
#define BNXT_ULP_PARSER_IPV6_FLOW_LABEL 0x000fffff
+#define BNXT_ULP_DEFAULT_TTL 64
enum bnxt_ulp_prsr_action {
ULP_PRSR_ACT_DEFAULT = 0,
@@ -30,6 +30,7 @@
#define BNXT_ULP_PROTO_HDR_GRE_NUM 6
#define BNXT_ULP_PROTO_HDR_ICMP_NUM 5
#define BNXT_ULP_PROTO_HDR_MAX 128
+#define BNXT_ULP_PROTO_HDR_ENCAP_MAX 64
#define BNXT_ULP_PROTO_HDR_FIELD_SVIF_IDX 1
/* Direction attributes */
@@ -64,12 +65,13 @@ struct ulp_rte_act_prop {
/* Structure to be used for passing all the parser functions */
struct ulp_rte_parser_params {
- STAILQ_ENTRY(ulp_rte_parser_params) next;
struct ulp_rte_hdr_bitmap hdr_bitmap;
+ struct ulp_rte_hdr_bitmap enc_hdr_bitmap;
struct ulp_rte_hdr_bitmap hdr_fp_bit;
struct ulp_rte_field_bitmap fld_bitmap;
struct ulp_rte_field_bitmap fld_s_bitmap;
struct ulp_rte_hdr_field hdr_field[BNXT_ULP_PROTO_HDR_MAX];
+ struct ulp_rte_hdr_field enc_field[BNXT_ULP_PROTO_HDR_ENCAP_MAX];
uint64_t comp_fld[BNXT_ULP_CF_IDX_LAST];
uint32_t field_idx;
struct ulp_rte_act_bitmap act_bitmap;
@@ -207,7 +209,9 @@ struct bnxt_ulp_template_device_tbls {
/* Device specific parameters */
struct bnxt_ulp_device_params {
uint8_t description[16];
- enum bnxt_ulp_byte_order byte_order;
+ enum bnxt_ulp_byte_order key_byte_order;
+ enum bnxt_ulp_byte_order result_byte_order;
+ enum bnxt_ulp_byte_order encap_byte_order;
uint8_t encap_byte_swap;
uint8_t num_phy_ports;
uint32_t mark_db_lfid_entries;
@@ -254,7 +258,6 @@ struct bnxt_ulp_mapper_tbl_info {
uint8_t direction;
enum bnxt_ulp_pri_opc pri_opcode;
uint32_t pri_operand;
- enum bnxt_ulp_byte_order byte_order;
/* conflict resolution opcode */
enum bnxt_ulp_accept_opc accept_opcode;
@@ -267,6 +270,7 @@ struct bnxt_ulp_mapper_tbl_info {
uint16_t key_num_fields;
/* Size of the blob that holds the key */
uint16_t blob_key_bit_size;
+ uint16_t record_size;
/* Information for accessing the ulp_class_result_field_list */
uint32_t result_start_idx;
@@ -62,7 +62,7 @@ ulp_regfile_read(struct ulp_regfile *regfile,
* data [in] The value is written into this variable. It is going to be in the
* same byte order as it was written.
*
- * size [in] The size in bytes of the value beingritten into this
+ * size [in] The size in bytes of the value being written into this
* variable.
*
* returns 0 on success
@@ -295,7 +295,7 @@ ulp_blob_push(struct ulp_blob *blob,
datalen,
data);
if (!rc) {
- BNXT_TF_DBG(ERR, "Failed ro write blob\n");
+ BNXT_TF_DBG(ERR, "Failed to write blob\n");
return 0;
}
blob->write_idx += datalen;
@@ -355,7 +355,7 @@ ulp_blob_insert(struct ulp_blob *blob, uint32_t offset,
datalen,
data);
if (!rc) {
- BNXT_TF_DBG(ERR, "Failed ro write blob\n");
+ BNXT_TF_DBG(ERR, "Failed to write blob\n");
return 0;
}
/* copy the previously stored data */
@@ -409,7 +409,7 @@ ulp_blob_push_64(struct ulp_blob *blob,
*
* data [in] 32-bit value to be added to the blob.
*
- * datalen [in] The number of bits to be added ot the blob.
+ * datalen [in] The number of bits to be added to the blob.
*
* The offset of the data is updated after each push of data.
* NULL returned on error, pointer pushed value otherwise.
@@ -987,6 +987,33 @@ ulp_blob_append(struct ulp_blob *dst, struct ulp_blob *src,
return 0;
}
+/*
+ * Perform the blob buffer copy.
+ * This api makes the src blob merged to the dst blob.
+ *
+ * dst [in] The destination blob, the blob to be merged.
+ * src [in] The src blob.
+ *
+ * returns 0 on success.
+ */
+int32_t
+ulp_blob_buffer_copy(struct ulp_blob *dst, struct ulp_blob *src)
+{
+ if ((dst->write_idx + src->write_idx) > dst->bitlen) {
+ BNXT_TF_DBG(ERR, "source buffer too large\n");
+ return -EINVAL;
+ }
+ if (ULP_BITS_IS_BYTE_NOT_ALIGNED(dst->write_idx) ||
+ ULP_BITS_IS_BYTE_NOT_ALIGNED(src->write_idx)) {
+ BNXT_TF_DBG(ERR, "source buffer is not aligned\n");
+ return -EINVAL;
+ }
+ memcpy(&dst->data[ULP_BITS_2_BYTE_NR(dst->write_idx)],
+ src->data, ULP_BITS_2_BYTE_NR(src->write_idx));
+ dst->write_idx += src->write_idx;
+ return 0;
+}
+
/*
* Read data from the operand
*
@@ -1012,44 +1039,6 @@ ulp_operand_read(uint8_t *operand,
return bytes;
}
-/*
- * copy the buffer in the encap format which is 2 bytes.
- * The MSB of the src is placed at the LSB of dst.
- *
- * dst [out] The destination buffer
- * src [in] The source buffer dst
- * size[in] size of the buffer.
- * align[in] The alignment is either 8 or 16.
- */
-void
-ulp_encap_buffer_copy(uint8_t *dst,
- const uint8_t *src,
- uint16_t size,
- uint16_t align)
-{
- uint16_t idx, tmp_size = 0;
-
- do {
- dst += tmp_size;
- src += tmp_size;
- idx = 0;
- if (size > align) {
- tmp_size = align;
- size -= align;
- } else {
- tmp_size = size;
- size = 0;
- }
- /* copy 2 bytes at a time. Write MSB to LSB */
- while ((idx + sizeof(uint16_t)) <= tmp_size) {
- memcpy(&dst[idx],
- &src[tmp_size - idx - sizeof(uint16_t)],
- sizeof(uint16_t));
- idx += sizeof(uint16_t);
- }
- } while (size);
-}
-
/*
* Check the buffer is empty
*
@@ -475,6 +475,18 @@ int32_t
ulp_blob_append(struct ulp_blob *dst, struct ulp_blob *src,
uint16_t src_offset, uint16_t src_len);
+/*
+ * Perform the blob buffer copy.
+ * This api makes the src blob merged to the dst blob.
+ *
+ * dst [in] The destination blob, the blob to be merged.
+ * src [in] The src blob.
+ *
+ * returns 0 on success.
+ */
+int32_t
+ulp_blob_buffer_copy(struct ulp_blob *dst, struct ulp_blob *src);
+
/*
* Read data from the operand
*
@@ -491,21 +503,6 @@ ulp_operand_read(uint8_t *operand,
uint8_t *val,
uint16_t bitlen);
-/*
- * copy the buffer in the encap format which is 2 bytes.
- * The MSB of the src is placed at the LSB of dst.
- *
- * dst [out] The destination buffer
- * src [in] The source buffer dst
- * size[in] size of the buffer.
- * align[in] The alignment is either 8 or 16.
- */
-void
-ulp_encap_buffer_copy(uint8_t *dst,
- const uint8_t *src,
- uint16_t size,
- uint16_t align);
-
/*
* Check the buffer is empty
*