From patchwork Mon Sep 6 07:54:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil Kumar Kori X-Patchwork-Id: 98054 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A15F1A0C4D; Mon, 6 Sep 2021 09:56:36 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 86F904111C; Mon, 6 Sep 2021 09:55:37 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id C94694111C for ; Mon, 6 Sep 2021 09:55:36 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 185Levca011779 for ; Mon, 6 Sep 2021 00:55:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=tDQeSxYPYZtHzPGRoasF8vPk6sGLTCZu1yfmuAB6hEg=; b=fkbChB0qg21aZYu5PAIYGKPPTsUGlQkxHrl4eGpkN9WVv++tYMuaEJVaSHquqI+TLzYe GQAgg3S+yoKN2ddqWt+W/rzh16BqFqUd4HCoYDags6UD+gzUUCbWCSw0nHbiTJbmizaH LGzrZZfCzo539bBpLzbFDO4tYGxrEt8JJEpasN1xhN6qdXQG+rD8jc8pgQQWg+Ij6QXk LB2DT2xsW9GquJ+sDUB3Bi0rsEOOZ6Pl8HS5H4tjbNHoUl/STftAL7hBDdI6sF4oAfsl kVGn+1dRCkceaEoB1rHtD+1KF7XFdTe0RSelfwfCMK1mddkoTAWr0WozuifBRUZSsJ+1 bQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 3aw2sp1snr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 06 Sep 2021 00:55:36 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 6 Sep 2021 00:55:34 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 6 Sep 2021 00:55:34 -0700 Received: from localhost.localdomain (unknown [10.28.34.25]) by maili.marvell.com (Postfix) with ESMTP id B19353F7089; Mon, 6 Sep 2021 00:55:32 -0700 (PDT) From: To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: Date: Mon, 6 Sep 2021 13:24:40 +0530 Message-ID: <20210906075450.1452123-17-skori@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210906075450.1452123-1-skori@marvell.com> References: <20210906075450.1452123-1-skori@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 3K1_2VfbQIqhkG3mQLdqFvWHq-4Airla X-Proofpoint-ORIG-GUID: 3K1_2VfbQIqhkG3mQLdqFvWHq-4Airla X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01 Subject: [dpdk-dev] [PATCH 17/27] net/cnxk: support ops to create meter profile X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Sunil Kumar Kori Implement API to add meter profile for CN10K platform. Signed-off-by: Sunil Kumar Kori --- drivers/net/cnxk/cn10k_ethdev_mtr.c | 104 ++++++++++++++++++++++++++++ drivers/net/cnxk/cnxk_ethdev.h | 13 ++++ 2 files changed, 117 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev_mtr.c b/drivers/net/cnxk/cn10k_ethdev_mtr.c index bf97bf4a71..404431fb8c 100644 --- a/drivers/net/cnxk/cn10k_ethdev_mtr.c +++ b/drivers/net/cnxk/cn10k_ethdev_mtr.c @@ -37,6 +37,71 @@ static struct rte_mtr_capabilities mtr_capa = { RTE_MTR_STATS_N_BYTES_YELLOW | RTE_MTR_STATS_N_BYTES_RED | RTE_MTR_STATS_N_BYTES_DROPPED}; +static struct cn10k_flow_meter_profile * +nix_mtr_profile_find(struct cnxk_eth_dev *dev, uint32_t profile_id) +{ + struct cn10k_mtr_profiles *fmps = &dev->mtr_profiles; + struct cn10k_flow_meter_profile *fmp; + + TAILQ_FOREACH(fmp, fmps, next) + if (profile_id == fmp->id) + return fmp; + + return NULL; +} + +static int +nix_mtr_profile_validate(struct cnxk_eth_dev *dev, uint32_t profile_id, + struct rte_mtr_meter_profile *profile, + struct rte_mtr_error *error) +{ + int rc = 0; + + PLT_SET_USED(dev); + + if (profile == NULL) + return -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, + NULL, "Meter profile is null."); + + if (profile_id == UINT32_MAX) + return -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE_ID, + NULL, "Meter profile id not valid."); + + switch (profile->alg) { + case RTE_MTR_SRTCM_RFC2697: + if (profile->srtcm_rfc2697.cir > mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "CIR exceeds max meter rate"); + break; + + case RTE_MTR_TRTCM_RFC2698: + if (profile->trtcm_rfc2698.pir > mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PIR exceeds max meter rate"); + break; + + case RTE_MTR_TRTCM_RFC4115: + if ((profile->trtcm_rfc4115.cir + profile->trtcm_rfc4115.eir) > + mtr_capa.meter_rate_max) + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "PIR + EIR exceeds max rate"); + break; + + default: + rc = -rte_mtr_error_set(error, EINVAL, + RTE_MTR_ERROR_TYPE_METER_PROFILE, NULL, + "alg is invalid"); + break; + } + + return rc; +} + static int cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev, struct rte_mtr_capabilities *capa, @@ -52,8 +117,47 @@ cn10k_nix_mtr_capabilities_get(struct rte_eth_dev *dev, return 0; } +static int +cn10k_nix_mtr_profile_add(struct rte_eth_dev *eth_dev, uint32_t profile_id, + struct rte_mtr_meter_profile *profile, + struct rte_mtr_error *error) +{ + struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev); + struct cn10k_mtr_profiles *fmps = &dev->mtr_profiles; + struct cn10k_flow_meter_profile *fmp; + int ret; + + /* Check input params. */ + ret = nix_mtr_profile_validate(dev, profile_id, profile, error); + if (ret) + return ret; + + fmp = nix_mtr_profile_find(dev, profile_id); + if (fmp) { + rte_mtr_error_set(error, EEXIST, + RTE_MTR_ERROR_TYPE_METER_PROFILE_ID, NULL, + "Profile already exist"); + return 0; + } + + fmp = plt_zmalloc(sizeof(struct cn10k_flow_meter_profile), ROC_ALIGN); + if (fmp == NULL) + return -rte_mtr_error_set(error, ENOMEM, + RTE_MTR_ERROR_TYPE_UNSPECIFIED, NULL, + "Meter profile memory " + "alloc failed."); + + fmp->id = profile_id; + fmp->profile = *profile; + + TAILQ_INSERT_TAIL(fmps, fmp, next); + + return 0; +} + const struct rte_mtr_ops nix_mtr_ops = { .capabilities_get = cn10k_nix_mtr_capabilities_get, + .meter_profile_add = cn10k_nix_mtr_profile_add, }; int diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h index 2528b3cdaa..5d7cf58a24 100644 --- a/drivers/net/cnxk/cnxk_ethdev.h +++ b/drivers/net/cnxk/cnxk_ethdev.h @@ -13,6 +13,7 @@ #include #include #include +#include #include #include "roc_api.h" @@ -144,6 +145,15 @@ struct cnxk_timesync_info { uint64_t *tx_tstamp; } __plt_cache_aligned; +struct cn10k_flow_meter_profile { + TAILQ_ENTRY(cn10k_flow_meter_profile) next; + struct rte_mtr_meter_profile profile; /**< Profile detail. */ + uint32_t ref_cnt; /**< Use count. */ + uint32_t id; /**< Profile id. */ +}; + +TAILQ_HEAD(cn10k_mtr_profiles, cn10k_flow_meter_profile); + struct cnxk_eth_dev { /* ROC NIX */ struct roc_nix nix; @@ -211,6 +221,9 @@ struct cnxk_eth_dev { double clk_freq_mult; uint64_t clk_delta; + /* Ingress policer */ + struct cn10k_mtr_profiles mtr_profiles; + /* Rx burst for cleanup(Only Primary) */ eth_rx_burst_t rx_pkt_burst_no_offload;