[v3,6/9] gpudev: add memory barrier
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Commit Message
From: Elena Agostini <eagostini@nvidia.com>
Add a function for the application to ensure the coherency
of the writes executed by another device into the GPU memory.
Signed-off-by: Elena Agostini <eagostini@nvidia.com>
---
doc/guides/prog_guide/gpudev.rst | 8 ++++++++
lib/gpudev/gpudev.c | 19 +++++++++++++++++++
lib/gpudev/gpudev_driver.h | 3 +++
lib/gpudev/rte_gpudev.h | 18 ++++++++++++++++++
lib/gpudev/version.map | 1 +
5 files changed, 49 insertions(+)
Comments
09/10/2021 03:53, eagostini@nvidia.com:
> From: Elena Agostini <eagostini@nvidia.com>
>
> Add a function for the application to ensure the coherency
> of the writes executed by another device into the GPU memory.
>
> Signed-off-by: Elena Agostini <eagostini@nvidia.com>
> ---
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Enforce a GPU memory write barrier.
> + *
> + * @param dev_id
> + * Reference device ID.
> + *
> + * @return
> + * 0 on success, -rte_errno otherwise:
> + * - ENODEV if invalid dev_id
> + * - ENOTSUP if operation not supported by the driver
> + * - EPERM if driver error
> + */
> +__rte_experimental
> +int rte_gpu_mbw(int16_t dev_id);
I would replace mbw with wmb.
Also it may be worth adding few more words about the goal:
ensure that previous writes in GPU memory are complete?
Does it work for writes done from CPU? from GPU?
@@ -65,3 +65,11 @@ gpudev can register a CPU memory area to make it visible from a GPU device.
Later, it's also possible to unregister that memory with gpudev.
CPU memory registered outside of the gpudev library
(e.g. with GPU specific library) cannot be unregistered by the gpudev library.
+
+Memory Barrier
+~~~~~~~~~~~~~~
+
+Some GPU drivers may need, under certain conditions,
+to enforce the coherency of external devices writes (e.g. NIC receiving packets)
+into the GPU memory.
+gpudev abstracts and exposes this capability.
@@ -624,3 +624,22 @@ rte_gpu_free(int16_t dev_id, void *ptr)
}
return GPU_DRV_RET(dev->ops.mem_free(dev, ptr));
}
+
+int
+rte_gpu_mbw(int16_t dev_id)
+{
+ struct rte_gpu *dev;
+
+ dev = gpu_get_by_id(dev_id);
+ if (dev == NULL) {
+ GPU_LOG(ERR, "memory barrier for invalid device ID %d", dev_id);
+ rte_errno = ENODEV;
+ return -rte_errno;
+ }
+
+ if (dev->ops.mbw == NULL) {
+ rte_errno = ENOTSUP;
+ return -rte_errno;
+ }
+ return GPU_DRV_RET(dev->ops.mbw(dev));
+}
@@ -31,6 +31,7 @@ typedef int (rte_gpu_mem_alloc_t)(struct rte_gpu *dev, size_t size, void **ptr);
typedef int (rte_gpu_free_t)(struct rte_gpu *dev, void *ptr);
typedef int (rte_gpu_mem_register_t)(struct rte_gpu *dev, size_t size, void *ptr);
typedef int (rte_gpu_mem_unregister_t)(struct rte_gpu *dev, void *ptr);
+typedef int (rte_gpu_mbw_t)(struct rte_gpu *dev);
struct rte_gpu_ops {
/* Get device info. If NULL, info is just copied. */
@@ -45,6 +46,8 @@ struct rte_gpu_ops {
rte_gpu_free_t *mem_free;
/* Unregister CPU memory in device. */
rte_gpu_mem_unregister_t *mem_unregister;
+ /* Enforce GPU memory write barrier. */
+ rte_gpu_mbw_t *mbw;
};
struct rte_gpu_mpshared {
@@ -387,6 +387,24 @@ int rte_gpu_register(int16_t dev_id, size_t size, void * ptr);
__rte_experimental
int rte_gpu_unregister(int16_t dev_id, void *ptr);
+/**
+ * @warning
+ * @b EXPERIMENTAL: this API may change without prior notice.
+ *
+ * Enforce a GPU memory write barrier.
+ *
+ * @param dev_id
+ * Reference device ID.
+ *
+ * @return
+ * 0 on success, -rte_errno otherwise:
+ * - ENODEV if invalid dev_id
+ * - ENOTSUP if operation not supported by the driver
+ * - EPERM if driver error
+ */
+__rte_experimental
+int rte_gpu_mbw(int16_t dev_id);
+
#ifdef __cplusplus
}
#endif
@@ -13,6 +13,7 @@ EXPERIMENTAL {
rte_gpu_init;
rte_gpu_is_valid;
rte_gpu_malloc;
+ rte_gpu_mbw;
rte_gpu_register;
rte_gpu_unregister;
};