From patchwork Tue Oct 19 18:14:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerin Jacob Kollanukkaran X-Patchwork-Id: 102289 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 968DDA0547; Tue, 19 Oct 2021 20:19:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7330D410EA; Tue, 19 Oct 2021 20:19:03 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 74D40410E9 for ; Tue, 19 Oct 2021 20:19:01 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19JFUP0d021014; Tue, 19 Oct 2021 11:18:46 -0700 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-0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 19 Oct 2021 11:18:42 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id 165B33F7043; Tue, 19 Oct 2021 11:18:18 -0700 (PDT) From: To: , Ray Kinsella CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Jerin Jacob Date: Tue, 19 Oct 2021 23:44:58 +0530 Message-ID: <20211019181459.1709976-2-jerinj@marvell.com> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211019181459.1709976-1-jerinj@marvell.com> References: <20211019181459.1709976-1-jerinj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: 1FUM1RX_boHQsFoL9cScvo64aRd47fSi X-Proofpoint-ORIG-GUID: 1FUM1RX_boHQsFoL9cScvo64aRd47fSi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-19_02,2021-10-19_01,2020-04-07_01 Subject: [dpdk-dev] [RFC PATCH 1/1] dwa: introduce dataplane workload accelerator subsystem X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Signed-off-by: Jerin Jacob --- doc/api/doxy-api-index.md | 13 + doc/api/doxy-api.conf.in | 1 + lib/dwa/dwa.c | 7 + lib/dwa/meson.build | 17 ++ lib/dwa/rte_dwa.h | 184 +++++++++++++ lib/dwa/rte_dwa_core.h | 264 +++++++++++++++++++ lib/dwa/rte_dwa_dev.h | 154 +++++++++++ lib/dwa/rte_dwa_port_dwa_ethernet.h | 68 +++++ lib/dwa/rte_dwa_port_host_ethernet.h | 178 +++++++++++++ lib/dwa/rte_dwa_profile_admin.h | 85 ++++++ lib/dwa/rte_dwa_profile_l3fwd.h | 378 +++++++++++++++++++++++++++ lib/dwa/version.map | 3 + lib/meson.build | 1 + 13 files changed, 1353 insertions(+) create mode 100644 lib/dwa/dwa.c create mode 100644 lib/dwa/meson.build create mode 100644 lib/dwa/rte_dwa.h create mode 100644 lib/dwa/rte_dwa_core.h create mode 100644 lib/dwa/rte_dwa_dev.h create mode 100644 lib/dwa/rte_dwa_port_dwa_ethernet.h create mode 100644 lib/dwa/rte_dwa_port_host_ethernet.h create mode 100644 lib/dwa/rte_dwa_profile_admin.h create mode 100644 lib/dwa/rte_dwa_profile_l3fwd.h create mode 100644 lib/dwa/version.map diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index 2939050431..d55a506ff3 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -199,6 +199,19 @@ The public API headers are grouped by topics: [eth_node] (@ref rte_node_eth_api.h), [ip4_node] (@ref rte_node_ip4_api.h) +- **dataplane workload accelerator**: + * infrastructure: + [dwa] (@ref rte_dwa.h), + [core] (@ref rte_dwa_core.h), + [device] (@ref rte_dwa_dev.h) + * dwa ports: + [ethernet] (@ref rte_dwa_port_dwa_ethernet.h) + * host ports: + [ethernet] (@ref rte_dwa_port_host_ethernet.h) + * profile: + [admin] (@ref rte_dwa_profile_admin.h), + [l3fwd] (@ref rte_dwa_profile_l3fwd.h) + - **basic**: [bitops] (@ref rte_bitops.h), [approx fraction] (@ref rte_approx.h), diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in index 109ec1f682..4fa0916d06 100644 --- a/doc/api/doxy-api.conf.in +++ b/doc/api/doxy-api.conf.in @@ -36,6 +36,7 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \ @TOPDIR@/lib/cryptodev \ @TOPDIR@/lib/distributor \ @TOPDIR@/lib/dmadev \ + @TOPDIR@/lib/dwa \ @TOPDIR@/lib/efd \ @TOPDIR@/lib/ethdev \ @TOPDIR@/lib/eventdev \ diff --git a/lib/dwa/dwa.c b/lib/dwa/dwa.c new file mode 100644 index 0000000000..5331d613e8 --- /dev/null +++ b/lib/dwa/dwa.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + + +#include + diff --git a/lib/dwa/meson.build b/lib/dwa/meson.build new file mode 100644 index 0000000000..88cc0f410f --- /dev/null +++ b/lib/dwa/meson.build @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(C) 2020 Marvell International Ltd. + +sources = files( + 'dwa.c', +) +headers = files( + 'rte_dwa.h', + 'rte_dwa_core.h', + 'rte_dwa_dev.h', + 'rte_dwa_port_dwa_ethernet.h', + 'rte_dwa_port_host_ethernet.h', + 'rte_dwa_profile_admin.h', + 'rte_dwa_profile_l3fwd.h', +) + +deps += ['eal'] diff --git a/lib/dwa/rte_dwa.h b/lib/dwa/rte_dwa.h new file mode 100644 index 0000000000..608be80e6c --- /dev/null +++ b/lib/dwa/rte_dwa.h @@ -0,0 +1,184 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_H +#define RTE_DWA_H + +/** + * @file + * + * RTE DWA API + * + * DWA components: + * + * \code{.c} + * + * + * +--> rte_dwa_port_host_*() + * | (User Plane traffic as TLV) + * | + * +----------------------+ | +--------------------+ + * | | | | DPDK DWA Device[0] | + * | +----------------+ | Host Port | +----------------+ | + * | | | |<========+==>| | | | + * | | Profile 0 | | | | Profile X | | + * | | | | | | | | + *<=============>| +----------------+ | Control Port| +----------------+ | + * DWA Port0 | +----------------+ |<========+==>| | + * | | | | | +--------------------+ + * | | Profile 1 | | | + * | | | | +--> rte_dwa_ctrl_op() + * | +----------------+ | (Control Plane traffic as TLV) + *<=============>| Dataplane | + * DWA Port1 | Workload | + * | Accelerator | +---------- ---------+ + * | (HW/FW/SW) | | DPDK DWA Device[N] | + * | | Host Port | +----------------+ | + *<=============>| +----------------+ |<===========>| | | | + * DWA PortN | | | | | | Profile Y | | + * | | Profile N | | | | ^ | | + * | | | | Control Port| +-----------|----+ | + * | +-------|--------+ |<===========>| | | + * | | | +-------------|------+ + * +----------|-----------+ | + * | | + * +---------------------------------------+ + * ^ + * | + * +--rte_dwa_dev_attach() + * + * \endcode + * + * **Dataplane Workload Accelerator**: It is an abstract model. The model is + * capable of offloading the dataplane workload from application via + * DPDK API over host and control ports of a DWA device. + * Dataplane Workload Accelerator(DWA) typically contains a set of CPUs, + * Network controllers, and programmable data acceleration engines for + * packet processing, cryptography, regex engines, base-band processing, etc. + * This allows DWA to offload compute/packet processing/base-band/cryptography + * related workload from the host CPU to save cost and power. Also, + * enable scaling the workload by adding DWAs to the host CPU as needed. + * + * **DWA device**: A DWA can be sliced to N number of DPDK DWA device(s) + * based on the resources available in DWA. + * The DPDK API interface operates on the DPDK DWA device. + * It is a representation of a set of resources in DWA. + * + * **TLV**: TLV (tag-length-value) encoded data stream contain tag as + * message ID, followed by message length, and finally the message payload. + * The 32bit message ID consists of two parts, 16bit Tag and 16bit Subtag. + * The tag represents ID of the group of the similar message, + * whereas, subtag represents a message tag ID under the group. + + * **Control Port**: Used for transferring the control plane TLVs. + * Every DPDK DWA device must have a control port. + * Only one outstanding TLV can be processed via this port by + * a single DWA device. + * This makes the control port suitable for the control plane. + + * **Host Port**: Used for transferring the user plane TLVs. + * Ethernet, PCIe DMA, Shared Memory, etc.are the example of + * different transport mechanisms abstracted under the host port. + * The primary purpose of host port to decouple the user plane TLVs with + * underneath transport mechanism differences. + * Unlike control port, more than one outstanding TLVs can be processed by + * a single DWA device via this port. + * This makes, the host port transfer to be in asynchronous nature, + * to support large volumes and less latency user plane traffic. + + * **DWA Port**: Used for transferring data between the external source and DWA. + * Ethernet, eCPRI are examples of DWA ports. Unlike host ports, + * the host CPU is not involved in transferring the data to/from DWA ports. + * These ports typically connected to the Network controller inside the + * DWA to transfer the traffic from the external source. + * + * **TLV direction**: `Host to DWA` and `DWA to Host` are the directions + * of TLV messages. The former one is specified as `H2D`, and the later one is + * specified as `D2H`. The `H2D` control TLVs, used for requesting DWA to + * perform specific action and `D2H` control TLVs are used to respond to the + * requested actions. The `H2D` user plane messages are used for transferring + * data from the host to the DWA. The `D2H` user plane messages are used for + * transferring data from the DWA to the host. + * + * **DWA device states**: Following are the different states of a DWA device. + * - `READY`: DWA Device is ready to attach the profile. + * See rte_dwa_dev_disc_profiles() API to discover the profile. + * - `ATTACHED`: DWA Device attached to one or more profiles. + * See rte_dwa_dev_attach() API to attach the profile(s). + * - `STOPPED`: Profile is in the stop state. + * TLV type `TYPE_ATTACHED` and `TYPE_STOPPED` messages are valid in this state. + * After rte_dwa_dev_attach() or explicitly invoking the rte_dwa_stop() API + * brings device to this state. + * - `RUNNING`: Invoking rte_dwa_start() brings the device to this state. + * TLV type `TYPE_STARTED` and `TYPE_USER_PLANE` are valid in this state. + * - `DETACHED`: Invoking rte_dwa_dev_detach() brings the device to this state + * The device and profile must be in the `STOPPED` state prior to invoking the + * rte_dwa_dev_reattach(). + * - `CLOSED`: Closed a stopped/detached DWA device. + * The device cannot be restarted. Invoking rte_dwa_dev_close() brings the + * device to this state. + * + * **TLV types**: Following are the different TLV types + * - `TYPE_ATTACHED`: Valid when the device is in `ATTACHED`, `STOPPED` and + * `RUNNING` state. + * - `TYPE_STOPPED`: Valid when the device is in `STOPPED` state. + * - `TYPE_STARTED`: Valid when the device is in `RUNNING` state. + * - `TYPE_USER_PLANE`: Valid when the device is in `RUNNING` state and used to + * transfer only user plane traffic. + * + * **Profile**: Specifies a workload that dataplane workload accelerator + * process on behalf of a DPDK application through a DPDK DWA device. + * A profile is expressed as a set of TLV messages for control plane and + * user plane functions. + * Each TLV message must have Tag, SubTag, Direction, Type, Payload attributes. + * + * **Programming model**: Typical application programming sequence is as follows + * -# In the EAL initialization phase, the DWA devices shall be probed, + * the application can query the number of available DWA devices + * using rte_dwa_dev_count() API. + * -# Application discovers the available profile(s) in a DWA device using + * rte_dwa_dev_disc_profiles() API. + * -# Application attaches one or more profile(s) to a DWA device using + * rte_dwa_dev_attach(). + * -# Once the profile is attached, The device shall be in the `STOPPED` state. + * Configure the profile(s) with `TYPE_ATTACHED` and `TYPE_STOPPED` type TLVs + * using rte_dwa_ctrl_op() API. + * -# Once the profile is configured, move the profile to the `RUNNING` state + * by invoking rte_dwa_start() API. + * -# Once the profile is in running state and if it has user plane TLV, + * transfer those TLVs using rte_dwa_port_host_() API based on the available + * host port for the given profile attached. + * -# Application can change the dynamic configuration aspects in + * `RUNNING` state using rte_dwa_ctrl_op() API by issuing + * `TYPE_STARTED` type of TLV messages. + * -# Finally, use rte_dwa_stop(), rte_dwa_dev_detach(), rte_dwa_dev_close() + * sequence for tear-down. + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Core */ +#include + +/* DWA Device */ +#include + +/* DWA Ports */ +#include + +/* Host ports */ +#include + +/* Profiles */ +#include +#include + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_H */ diff --git a/lib/dwa/rte_dwa_core.h b/lib/dwa/rte_dwa_core.h new file mode 100644 index 0000000000..3637a843dc --- /dev/null +++ b/lib/dwa/rte_dwa_core.h @@ -0,0 +1,264 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_CORE_H +#define RTE_DWA_CORE_H + +/** + * @file + * + * @warning + * @b EXPERIMENTAL: + * All functions in this file may be changed or removed without prior notice. + * + * RTE DWA core API + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#include +#include + +/* Types */ +typedef void *rte_dwa_obj_t; /**< DWA object type. */ + +/* Tag partitions */ +/** + * Enumerates different tag sections. + */ +enum rte_dwa_tag { + RTE_DWA_TAG_COMMON, /**< Tags common for all profile and ports. */ + RTE_DWA_TAG_PORT_DWA_BASE = 0x400, /**< Base tag value for DWA port. */ + RTE_DWA_TAG_PORT_HOST_BASE = 0x800, /**< Base tag value for host port */ + RTE_DWA_TAG_VENDOR_EXTENSION = 0x1000, + /**< Base tag value for vendor extension TLVs. */ + RTE_DWA_TAG_PROFILE_BASE = 0x3000, /**< Base tag value for profile. */ + RTE_DWA_TAG_MAX = UINT16_MAX, /* Max available tags space. */ +}; + +/** + * Enumerates DWA port types. + */ +enum rte_dwa_tag_port_dwa { + RTE_DWA_TAG_PORT_DWA_ETHERNET = RTE_DWA_TAG_PORT_DWA_BASE, + /**< Tag value for DWA ethernet port. */ +}; + +/** + * Enumerates host port types. + */ +enum rte_dwa_tag_port_host { + RTE_DWA_TAG_PORT_HOST_ETHERNET = RTE_DWA_TAG_PORT_HOST_BASE, + /**< Tag value for host ethernet port. */ +}; + +/** + * Enumerates profiles types. + */ +enum rte_dwa_tag_profile { + RTE_DWA_TAG_PROFILE_ADMIN = RTE_DWA_TAG_PROFILE_BASE, + /**< Tag value for admin profile. */ + RTE_DWA_TAG_PROFILE_L3FWD, + /**< Tag value for l3fwd profile. */ +}; + +/* Common sub tags */ +#define RTE_DWA_ERROR_STR_LEN_MAX 128 /**< Max error string length.*/ + +/** + * Payload of RTE_DWA_STAG_COMMON_D2H_ERR message. + */ +struct rte_dwa_common_d2h_err { + int32_t dwa_errno; /**< Error number of the failure */ + uint8_t has_reason_str; /**< If set, valid string in reason */ + char reason[RTE_DWA_ERROR_STR_LEN_MAX]; /**< Failure reason as string */ +} __rte_packed; + +/** + * Enumerates the stag list for RTE_DWA_TAG_COMMON tag. + */ +enum rte_dwa_stag_common { + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_COMMON + * Stag | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * Direction | D2H + * Type | TYPE_ATTACHED + * Payload | NA + * Pair TLV | NA + * + * D2H response for successful TLV action. + */ + RTE_DWA_STAG_COMMON_D2H_SUCCESS, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_COMMON + * Stag | RTE_DWA_STAG_COMMON_D2H_ERR + * Direction | D2H + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_common_d2h_err + * Pair TLV | NA + * + * D2H response for unsuccessful TLV action. + */ + RTE_DWA_STAG_COMMON_D2H_ERR, + RTE_DWA_STAG_COMMON_MAX = UINT16_MAX, /**< Max stags for common tag.*/ +}; + +/* TLV */ +/** Macro to get TLV ID from tag and stag. */ +#define RTE_DWA_TLV_ID(tag, stag) ((uint32_t)((uint32_t)(tag) << 16 | (stag))) +/** Macro to form TLV ID from tag and stag. */ +#define RTE_DWA_TLV_MK_ID(tag, stag) \ + RTE_DWA_TLV_ID(RTE_DWA_TAG_ ## tag, RTE_DWA_STAG_ ## tag ##_ ## stag) + +/** TLV representation of the DWA message */ +struct rte_dwa_tlv { + RTE_STD_C11 + union { + uint32_t id; /**< ID as tag and stag tuple. */ + RTE_STD_C11 + union { + uint16_t tag; /**< Tag. */ + uint16_t stag;/**< Sub Tag. */ + }; + }; + uint32_t len; /**< Length of payload. */ + char msg[]; /**< Zero length array points to payload of TLV. */ +} __rte_packed; + +/** DWA TLV header size */ +#define RTE_DWA_TLV_HDR_SZ offsetof(struct rte_dwa_tlv, msg) + +/** + * Fill DWA TLV. + * + * Fill the DWA TLV attributes from arguments. + * + * @param [out] tlv + * TLV pointer to fill. + * @param id + * TLV ID value. @see RTE_DWA_TLV_MK_ID RTE_DWA_TLV_ID + * @param len + * TLV payload length. + * @param msg + * TLV payload message. + */ +static inline void +rte_dwa_tlv_fill(struct rte_dwa_tlv *tlv, uint32_t id, uint32_t len, void *msg) +{ + tlv->id = id; + tlv->len = len; + if (len) + rte_memcpy(tlv->msg, msg, len); +} + +/** + * Get payload of a D2H TLV message. + * + * Get payload message pointer from the D2H TLV message. + * + * @param tlv + * TLV pointer. + * + * @return + * TLV payload on success, NULL otherwise. + */ +static inline void* +rte_dwa_tlv_d2h_to_msg(struct rte_dwa_tlv *tlv) +{ + if (tlv == NULL || tlv->id == RTE_DWA_TLV_MK_ID(COMMON, D2H_ERR)) + return NULL; + else + return tlv->msg; +} + +/** + * Get TLV name from ID. + * + * Get TLV name as string from ID. + * + * @param id + * TLV ID. + * + * @return + * TLV name string on success, NULL otherwise. + */ +char *rte_dwa_tlv_id_to_str(uint32_t id); + +/** + * Get TLV payload length. + * + * Get TLV payload length from the given TLV ID. + * + * @param id + * TLV ID. + * + * @return + * >=0 On success, <0 on invalid ID. + */ +int32_t rte_dwa_tlv_len(uint32_t id); + +/* Control plane operation */ + +/** + * Execute a control plane operation on DWA. + * + * @param obj + * DWA object. + * + * @param h2d + * H2D direction TLV to execute a control plane operation on DWA. + * + * @return + * D2H TLV response on success, NULL otherwise. + * Implementation allocates the memory for the response using malloc(), + * Application must free this memory using free() API after use. + */ +struct rte_dwa_tlv *rte_dwa_ctrl_op(rte_dwa_obj_t obj, struct rte_dwa_tlv *h2d); + +/* State management */ + +/** + * Move DWA device to `RUNNING` state. + * + * Move DWA device and its associated profiles to `RUNNING` state. + * `TYPE_ATTACHED`, `TYPE_STARTED` and `TYPE_USER_PLANE` type messages are + * valid in this state. + * + * @param obj + * DWA object. + * + * @return + * 0 on success, error otherwise. + */ + +int rte_dwa_start(rte_dwa_obj_t obj); + +/** + * Move DWA device to `STOPPED` state. + * + * Move DWA device and its associated profiles to `STOPPED` state. + * `TYPE_ATTACHED`, `TYPE_STOPPED` type messages are valid in this state. + * + * @param obj + * DWA object. + * + * @return + * 0 on success, error otherwise. + */ +int rte_dwa_stop(rte_dwa_obj_t obj); + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_CORE_H */ diff --git a/lib/dwa/rte_dwa_dev.h b/lib/dwa/rte_dwa_dev.h new file mode 100644 index 0000000000..7dff9be5b9 --- /dev/null +++ b/lib/dwa/rte_dwa_dev.h @@ -0,0 +1,154 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_DEV_H +#define RTE_DWA_DEV_H + +/** + * @file + * + * @warning + * @b EXPERIMENTAL: + * All functions in this file may be changed or removed without prior notice. + * + * RTE DWA Device API + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#include + +/* Device utils */ + +/** + * Check if dev_id of DWA device is valid. + * + * @param dev_id + * DWA device id. + * + * @return + * true if device is valid, false otherwise. + */ +bool +rte_dwa_dev_is_valid(uint16_t dev_id); + +/** + * Get the total number of DWA devices that have been successfully + * initialised. + * + * @return + * The total number of usable DWA devices. + */ +uint16_t +rte_dwa_dev_count(void); + +/* Discovery */ + +/** + * Get the list of profiles available in a DWA device. + * + * @param dev_id + * DWA device id. + * + * @param [out] pfs + * An rte_dwa_tag_profile array to be filled with available profiles. + * If set to NULL, this function returns the number of available profiles. + * + * @return + * Number of profiles available. + */ +int +rte_dwa_dev_disc_profiles(uint16_t dev_id, enum rte_dwa_tag_profile *pfs); + +/* Attach */ + +/** + * Attach a list of profiles on a DWA device. + * + * Upon successful attach operation, devices moves to `ATTACHED` state. + * `TYPE_ATTACHED` and `TYPE_STOPPED` types of TLV message are valid + * in this state. + * + * @param dev_id + * DWA device id. + * + * @param name + * Unique name for getting DWA object on secondary process. + * @see rte_dwa_dev_lookup() + * @param pfs + * An array profiles as enum rte_dwa_tag_profile to be attached. + * @param nb_pfs + * Number of profiles to be attached. + * + * @return + * DWA object. + */ +rte_dwa_obj_t +rte_dwa_dev_attach(uint16_t dev_id, const char *name, + enum rte_dwa_tag_profile pfs[], uint16_t nb_pfs); + +/* Lookup */ + +/** + * Search the DWA object from its name. + * + * @param dev_id + * DWA device id. + * + * @param name + * The name provided in rte_dwa_dev_attach(). + * + * @return + * DWA object or NULL if not found. + */ +rte_dwa_obj_t +rte_dwa_dev_lookup(uint16_t dev_id, const char *name); + +/* Detach */ + +/** + * Detach all profiles from the given DWA device. + * + * Detach all profile and move the DWA device to `DETACHED` state. + * The device and profile must be in the `STOPPED` state prior to invoking the + * this API. @see rte_dwa_stop() + * + * @param dev_id + * DWA device id. + + * @param obj + * DWA object. + * + * @return + * 0 on success, error otherwise. + */ +int +rte_dwa_dev_detach(uint16_t dev_id, rte_dwa_obj_t obj); + +/* Close */ + +/** + * Close a DWA device. The device cannot be restarted! + * The device and profile must be in the `DETACHED` state prior to invoking + * this API. @see rte_dwa_dev_detach() + * + * @param dev_id + * DWA device id. + * + * @return + * 0 on success, error otherwise. + */ +int +rte_dwa_dev_close(uint16_t dev_id); + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_DEV_H */ diff --git a/lib/dwa/rte_dwa_port_dwa_ethernet.h b/lib/dwa/rte_dwa_port_dwa_ethernet.h new file mode 100644 index 0000000000..5ada6d0335 --- /dev/null +++ b/lib/dwa/rte_dwa_port_dwa_ethernet.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_PORT_DWA_ETHERNET_H +#define RTE_DWA_PORT_DWA_ETHERNET_H + +/** + * @file + * + * @warning + * @b EXPERIMENTAL: + * All functions in this file may be changed or removed without prior notice. + * + * RTE API related to DWA ethernet based port. + * + */ +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Payload of RTE_DWA_STAG_PORT_DWA_ETHERNET_D2H_INFO message. + */ +struct rte_dwa_port_dwa_ethernet_d2h_info { + uint16_t nb_ports; /**< Number of available ports. */ + uint16_t avail_ports[]; /**< Array of available port of size nb_ports */ +} __rte_packed; + +/** + * Enumerates the stag list for RTE_DWA_TAG_PORT_DWA_ETHERNET tag. + */ +enum rte_dwa_stag_port_dwa_ethernet { + /** + * Attribute | Value + * ----------|--------- + * Tag | RTE_DWA_TAG_PORT_DWA_ETHERNET + * Stag | RTE_DWA_STAG_PORT_DWA_ETHERNET_H2D_INFO + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | NA + * Pair TLV | RTE_DWA_STAG_PORT_DWA_ETHERNET_D2H_INFO + * + * Request DWA ethernet port information. + */ + RTE_DWA_STAG_PORT_DWA_ETHERNET_H2D_INFO, + /** + * Attribute | Value + * ----------|--------- + * Tag | RTE_DWA_TAG_PORT_DWA_ETHERNET + * Stag | RTE_DWA_STAG_PORT_DWA_ETHERNET_D2H_INFO + * Direction | D2H + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_port_dwa_ethernet_d2h_info + * Pair TLV | RTE_DWA_STAG_PORT_DWA_ETHERNET_H2D_INFO + * + * Response for DWA ethernet port information. + */ + RTE_DWA_STAG_PORT_DWA_ETHERNET_D2H_INFO, + RTE_DWA_STAG_PORT_DWA_ETHERNET_MAX = UINT16_MAX, + /**< Max stags for RTE_DWA_TAG_PORT_DWA_ETHERNET tag*/ +}; + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_PORT_DWA_ETHERNET_H */ diff --git a/lib/dwa/rte_dwa_port_host_ethernet.h b/lib/dwa/rte_dwa_port_host_ethernet.h new file mode 100644 index 0000000000..afcd5a9fd5 --- /dev/null +++ b/lib/dwa/rte_dwa_port_host_ethernet.h @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_PORT_HOST_ETHERNET_H +#define RTE_DWA_PORT_HOST_ETHERNET_H + +/** + * @file + * + * @warning + * @b EXPERIMENTAL: + * All functions in this file may be changed or removed without prior notice. + * + * RTE API related to host ethernet based port. + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Payload of RTE_DWA_STAG_PORT_HOST_ETHERNET_D2H_INFO message. + */ +struct rte_dwa_port_host_ethernet_d2h_info { + uint16_t nb_rx_queues; /**< Number of Rx queues available */ + uint16_t nb_tx_queues; /**< Number of Tx queues available */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_CONFIG message. + */ +struct rte_dwa_port_host_ethernet_config { + uint16_t nb_rx_queues; /**< Number of Rx queues to configure */ + uint16_t nb_tx_queues; /**< Number of Tx queues to configure */ + uint16_t max_burst; /**< Max burst size */ + RTE_STD_C11 + union { + struct rte_mempool *pkt_pool; + /**< Packet pool to allocate packets */ + uint64_t pkt_pool_u64; + /**< uint64_t representation of packet pool */ + }; + RTE_STD_C11 + union { + struct rte_mempool *tlv_pool; + /**< TLV pool to allocate TLVs */ + uint64_t tlv_pool_u64; + /**< uint64_t representation of TLV pool */ + }; +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_QUEUE_CONFIG message. + */ +struct rte_dwa_port_host_ethernet_queue_config { + uint16_t id; + uint8_t enable; + uint8_t is_tx; + uint16_t depth; +} __rte_packed; + +/** + * Enumerates the stag list for RTE_DWA_TAG_PORT_HOST_ETHERNET tag. + */ +enum rte_dwa_port_host_ethernet { + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PORT_HOST_ETHERNET + * Stag | RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_INFO + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | NA + * Pair TLV | RTE_DWA_STAG_PORT_HOST_ETHERNET_D2H_INFO + * + * Request DWA host ethernet port information. + */ + RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_INFO, + /** + * Attribute | Value + * ----------|--------- + * Tag | RTE_DWA_TAG_PORT_HOST_ETHERNET + * Stag | RTE_DWA_STAG_PORT_HOST_ETHERNET_D2H_INFO + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_port_host_ethernet_d2h_info + * Pair TLV | RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_INFO + * + * Response for DWA host ethernet port information. + */ + RTE_DWA_STAG_PORT_HOST_ETHERNET_D2H_INFO, + /** + * Attribute | Value + * ----------|--------- + * Tag | RTE_DWA_TAG_PORT_HOST_ETHERNET + * Stag | RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_CONFIG + * Direction | H2D + * Type | TYPE_STOPPED + * Payload | struct rte_dwa_port_host_ethernet_config + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request DWA host ethernet port configuration. + */ + RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_CONFIG, + /** + * Attribute | Value + * ----------|--------- + * Tag | RTE_DWA_TAG_PORT_HOST_ETHERNET + * Stag | RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_QUEUE_CONFIG + * Direction | H2D + * Type | TYPE_STOPPED + * Payload | struct rte_dwa_port_host_ethernet_queue_config + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request DWA host ethernet port queue configuration. + * + * @note RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_CONFIG must be called + * before invoking this message. + */ + RTE_DWA_STAG_PORT_HOST_ETHERNET_H2D_QUEUE_CONFIG, + RTE_DWA_STAG_PORT_HOST_ETHERNET_MAX = UINT16_MAX, + /**< Max stags for RTE_DWA_TAG_PORT_HOST_ETHERNET tag*/ +}; + +/** + * Transmit a burst of TLVs of type `TYPE_USER_PLANE` on the Tx queue + * designated by its *queue_id* of DWA object *obj*. + * + * @param obj + * DWA object. + * @param queue_id + * The identifier of Tx queue id. The queue id should in the range of + * [0 to rte_dwa_port_host_ethernet_config::nb_tx_queues]. + * @param[out] tlvs + * Points to an array of *nb_tlvs* tlvs of type *rte_dwa_tlv* structure + * to be transmitted. + * @param nb_tlvs + * The maximum number of TLVs to transmit. + * + * @return + * The number of TLVs actually transmitted on the Tx queue. The return + * value can be less than the value of the *nb_tlvs* parameter when the + * Tx queue is full. + */ +uint16_t rte_dwa_port_host_ethernet_tx(rte_dwa_obj_t obj, uint16_t queue_id, + struct rte_dwa_tlv **tlvs, uint16_t nb_tlvs); +/** + * Receive a burst of TLVs of type `TYPE_USER_PLANE` from the Rx queue + * designated by its *queue_id* of DWA object *obj*. + * + * @param obj + * DWA object. + * @param queue_id + * The identifier of Rx queue id. The queue id should in the range of + * [0 to rte_dwa_port_host_ethernet_config::nb_rx_queues]. + * @param[out] tlvs + * Points to an array of *nb_tlvs* tlvs of type *rte_dwa_tlv* structure + * to be received. + * @param nb_tlvs + * The maximum number of TLVs to received. + * + * @return + * The number of TLVs actually received on the Rx queue. The return + * value can be less than the value of the *nb_tlvs* parameter when the + * Rx queue is not full. + */ +uint16_t rte_dwa_port_host_ethernet_rx(rte_dwa_obj_t obj, uint16_t queue_id, + struct rte_dwa_tlv **tlvs, uint16_t nb_tlvs); + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_PORT_HOST_ETHERNET_H */ diff --git a/lib/dwa/rte_dwa_profile_admin.h b/lib/dwa/rte_dwa_profile_admin.h new file mode 100644 index 0000000000..9443a049fb --- /dev/null +++ b/lib/dwa/rte_dwa_profile_admin.h @@ -0,0 +1,85 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_PROFIE_ADMIN_H +#define RTE_DWA_PROFIE_ADMIN_H + +/** + * @file + * + * @warning + * @b EXPERIMENTAL: + * All functions in this file may be changed or removed without prior notice. + * + * RTE API related to admin profile which includes administrative functions + * such as FW updates, resource partitioning in a DWA and items in global in + * nature that is applicable for all DWA device under the DWA. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * Payload of RTE_DWA_STAG_PROFILE_ADMIN_H2D_ATTACH message. + */ +struct rte_dwa_profile_admin_h2d_attach { + rte_uuid_t uuid; /**< uuid to validate the integrity of actor */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_ADMIN_H2D_FW_UPDATE message. + */ +struct rte_dwa_profile_admin_h2d_fw_update { + char fw[PATH_MAX]; /**< Firmware filename to update */ +} __rte_packed; + +/** + * Enumerates the stag list for RTE_DWA_TAG_PROFILE_ADMIN tag. + * + * @note A successful RTE_DWA_STAG_PROFILE_ADMIN_H2D_ATTACH operation + * must be prerequisite for all the admin operation. + */ +enum rte_dwa_profile_admin { + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_ADMIN + * Stag | RTE_DWA_STAG_PROFILE_ADMIN_H2D_ATTACH + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_profile_admin_h2d_attach + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request to attach DWA for administrative operation. + * A universally unique identifier (UUID) used to validate + * the validate the actor. + */ + RTE_DWA_STAG_PROFILE_ADMIN_H2D_ATTACH, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_ADMIN + * Stag | RTE_DWA_STAG_PROFILE_ADMIN_H2D_FW_UPDATE + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_profile_admin_h2d_fw_update + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request DWA host ethernet port information. + */ + RTE_DWA_STAG_PROFILE_ADMIN_H2D_FW_UPDATE, + RTE_DWA_STAG_PROFILE_ADMIN_MAX = UINT16_MAX, + /**< Max stags for RTE_DWA_TAG_PROFILE_ADMIN tag*/ +}; + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_PROFILE_ADMIN_H */ diff --git a/lib/dwa/rte_dwa_profile_l3fwd.h b/lib/dwa/rte_dwa_profile_l3fwd.h new file mode 100644 index 0000000000..29b4e493e5 --- /dev/null +++ b/lib/dwa/rte_dwa_profile_l3fwd.h @@ -0,0 +1,378 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2021 Marvell. + */ + +#ifndef RTE_DWA_PROFILE_L3FWD_H +#define RTE_DWA_PROFILE_L3FWD_H + +/** + * @file + * + * L3FWD Profile + * + * \code{.c} + * +-------------->--[1]--------------+ + * | | + * +-----------|----------+ | + * | | | | + * | +--------|-------+ | | + * | | | | | + * | | L3FWD Profile | | | + * \ | | | | | + *<====\========>| +----------------+ | | + * DWA \Port0 | Lookup Table | +---------|----------+ + * \ | +----------------+ | | DPDK DWA|Device[0] | + * \ | | IP | Dport | | Host Port | +-------|--------+ | + * \ | +----------------+ |<===========>| | | | | + * +~[3]~~~|~~~~~~~|~~~~~~~~|~~~~~~~~~~~~~~~~~>|->L3FWD Profile | | + *<=============>| +----------------+ | | | | | + * DWA Port1 | | | | | Control Port| +-|---------|----+ | + * | +----------------+ |<===========>| | | | + * ~~~>~~[5]~~~~|~~|~~~+ | | | +---|---------|------+ + * | +---+------------+ | | | + * ~~~<~~~~~~~~~|~~|~~~+ | |<-|------[2]--------+ | + * | +----------------+<-|------[4]------------------+ + * | Dataplane | + *<=============>| Workload | + * DWA PortN | Accelerator | + * | (HW/FW/SW) | + * +----------------------+ + * \endcode + * + * L3FWD profile offloads Layer-3 forwarding between the DWA Ethernet ports. + * + * The above diagram depicts the profile and application programming sequence. + * + * -# DWA device attaches the L3FWD profile using rte_dwa_dev_attach(). + * -# Configure the L3FWD profile: + * - The application requests L3FWD profile capabilities of the DWA + * by using RTE_DWA_STAG_PROFILE_L3FWD_H2D_INFO, On response, the + * RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO returns the lookup modes supported, + * max rules supported, and available host ports for this profile. + * - The application configures a set of DWA ports to use a + * lookup mode(EM, LPM, or FIB) via RTE_DWA_STAG_PROFILE_L3FWD_H2D_CONFIG. + * - The application configures a valid host port to receive exception + * packets. + * -# The exception that is not matching forwarding table entry comes as + * RTE_DWA_STAG_PROFILE_L3FWD_D2H_EXCEPTION_PACKETS TLV to host. DWA stores the + * exception packet send back destination ports after completing step (4). + * -# Parse the exception packet and add rules to the FWD table using + * RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_ADD. If the application knows the rules + * beforehand, it can add the rules in step 2. + * -# When DWA ports receive the matching flows in the lookup table, DWA + * forwards to DWA Ethernet ports without host CPU intervention. + * + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +/** + * Enumerates L3FWD profile lookup modes. + */ +enum rte_dwa_profile_l3fwd_lookup_mode { + RTE_DWA_PROFILE_L3FWD_MODE_EM = 1U << 0, /**< Exact match mode. */ + RTE_DWA_PROFILE_L3FWD_MODE_LPM = 1U << 1, + /**< Longest prefix match mode. */ + RTE_DWA_PROFILE_L3FWD_MODE_FIB = 1U << 2, + /**< Forwarding information base mode. */ + RTE_DWA_PROFILE_L3FWD_MODE_MAX = 1U << 15, /**< Max modes. */ +}; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO message. + */ +struct rte_dwa_profile_l3fwd_d2h_info { + uint32_t max_lookup_rules; + /**< Maximum Supported lookup rules. */ + uint16_t modes_supported; + /**< Each bit enabled represents a mode supported in + * enum rte_dwa_profile_l3fwd_lookup_mode + */ + uint16_t nb_host_ports; + /**< Number of host ports in the host_ports. */ + uint16_t host_ports[]; + /**< Array of available host port of type enum rte_dwa_tag_port_host + * of size nb_host_ports. + */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_H2D_CONFIG message. + */ +struct rte_dwa_profile_l3fwd_h2d_config { + uint16_t mode; + /**< L3FWD profile mode. + * @see enum rte_dwa_profile_l3fwd_modes + */ + uint16_t nb_eth_ports; + /**< Number of DWA ethernet ports in the eth_ports list. */ + uint16_t eth_ports[]; + /**< List of DWA ethernet ports to apply the profile on.*/ +} __rte_packed; + +/** L3FWD profile IPv4 rule attributes. */ +struct rte_dwa_profile_l3fwd_v4_5tpl { + uint32_t ip_dst; + /**< IPv4 destination address. */ + uint32_t ip_src; + /**< IPv4 source address. */ + uint16_t port_dst; + /**< Destination port. */ + uint16_t port_src; + /**< Source port. */ + uint8_t proto; + /**< Protocol. */ +} __rte_packed; + +/** L3FWD profile IPv4 rule prefix. */ +struct rte_dwa_profile_l3fwd_v4_prefix { + uint32_t ip_dst; + /**< IPv4 destination address. */ + uint8_t depth; + /**< LPM depth. */ +} __rte_packed; + +/** L3FWD profile IPv4 rule. */ +struct rte_dwa_profile_l3fwd_v4_rule { + RTE_STD_C11 + union { + struct rte_dwa_profile_l3fwd_v4_5tpl match; + /**< Match data. */ + struct rte_dwa_profile_l3fwd_v4_prefix prefix; + /**< Prefix data. */ + }; +} __rte_packed; + +/* IPv6 rule attributes */ + +/** L3FWD profile IPV6 address length */ +#define RTE_DWA_PROFILE_L3FWD_IPV6_ADDR_LEN 16 + +/** L3FWD profile IPv6 rule attributes. */ +struct rte_dwa_profile_l3fwd_v6_5tpl { + uint8_t ip_dst[RTE_DWA_PROFILE_L3FWD_IPV6_ADDR_LEN]; + /**< IPv6 destination address. */ + uint8_t ip_src[RTE_DWA_PROFILE_L3FWD_IPV6_ADDR_LEN]; + /**< IPv6 source address. */ + uint16_t port_dst; + /**< Destination port. */ + uint16_t port_src; + /**< Source port. */ + uint8_t proto; + /**< Protocol. */ +} __rte_packed; + +/** L3FWD profile IPv6 rule prefix. */ +struct rte_dwa_profile_l3fwd_v6_prefix { + uint8_t ip_dst[RTE_DWA_PROFILE_L3FWD_IPV6_ADDR_LEN]; + /**< IPv6 destination address. */ + uint8_t depth; + /**< LPM depth. */ +} __rte_packed; + +/** L3FWD profile IPv6 rule. */ +struct rte_dwa_profile_l3fwd_v6_rule { + RTE_STD_C11 + union { + struct rte_dwa_profile_l3fwd_v6_5tpl match; + /**< Match data. */ + struct rte_dwa_profile_l3fwd_v6_prefix prefix; + /**< Prefix data. */ + }; +} __rte_packed; + +/** L3FWD profile rule type. */ +enum rte_dwa_profile_l3fwd_rule_type { + RTE_DWA_PROFILE_L3FWD_RULE_TYPE_IPV4 = 1U << 0, + /**< Rule type IPv4. */ + RTE_DWA_PROFILE_L3FWD_RULE_TYPE_IPV6 = 1U << 1, + /**< Rule type IPv6. */ +}; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_ADD message. + */ +struct rte_dwa_profile_l3fwd_h2d_lookup_add { + enum rte_dwa_profile_l3fwd_rule_type rule_type; + /**< Rule type that is being added. */ + struct rte_dwa_profile_l3fwd_v4_rule v4_rule; + /**< IPv4 rule. */ + struct rte_dwa_profile_l3fwd_v6_rule v6_rule; + /**< IPv6 rule. */ + uint16_t eth_port_dst; + /**< Destination lookup port. */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_D2H_LOOKUP_ADD message. + */ +struct rte_dwa_profile_l3fwd_d2h_lookup_add { + uint64_t handle; /**< Lookup rule handle. */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_UPDATE message. + */ +struct rte_dwa_profile_l3fwd_h2d_lookup_update { + uint64_t handle; + /**< Rule handle to update a rule. + * @see rte_dwa_profile_l3fwd_d2h_lookup_add + */ + uint16_t eth_port_dst; + /**< Destination lookup port to update. */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_DEL message. + */ +struct rte_dwa_profile_l3fwd_h2d_lookup_delete { + uint64_t handle; + /**< Rule handle to delete a rule. + * @see rte_dwa_profile_l3fwd_d2h_lookup_add + */ +} __rte_packed; + +/** + * Payload of RTE_DWA_STAG_PROFILE_L3FWD_D2H_EXCEPTION_PACKETS message. + */ +struct rte_dwa_profile_l3fwd_d2h_exception_pkts { + uint16_t nb_pkts; + /**< Number of packets in the variable size array.*/ + uint16_t rsvd16; + /**< Reserved field to make pkts[0] to be 64bit aligned.*/ + uint32_t rsvd32; + /**< Reserved field to make pkts[0] to be 64bit aligned.*/ + struct rte_mbuf *pkts[0]; + /**< Array of rte_mbufs of size nb_pkts. */ +} __rte_packed; + +/** + * Enumerates the stag list for RTE_DWA_TAG_PROFILE_L3FWD tag. + * + */ +enum rte_dwa_profile_l3fwd { + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_H2D_INFO + * Direction | H2D + * Type | TYPE_ATTACHED + * Payload | NA + * Pair TLV | RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO + * + * Request to L3FWD profile information. + */ + RTE_DWA_STAG_PROFILE_L3FWD_H2D_INFO, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO + * Direction | D2H + * Type | TYPE_ATTACHED + * Payload | struct rte_dwa_profile_l3fwd_d2h_info + * Pair TLV | RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO + * + * Response for L3FWD profile information. + */ + RTE_DWA_STAG_PROFILE_L3FWD_D2H_INFO, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_H2D_CONFIG + * Direction | H2D + * Type | TYPE_STOPPED + * Payload | struct rte_dwa_profile_l3fwd_h2d_config + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request to configure L3FWD profile. + */ + RTE_DWA_STAG_PROFILE_L3FWD_H2D_CONFIG, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_ADD + * Direction | H2D + * Type | TYPE_STOPPED + * ^ | TYPE_STARTED + * Payload | struct rte_dwa_profile_l3fwd_h2d_lookup_add + * Pair TLV | RTE_DWA_STAG_PROFILE_L3FWD_D2H_LOOKUP_ADD + * + * Request to add rule in L3FWD profile. + */ + RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_ADD, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_D2H_LOOKUP_ADD + * Direction | D2H + * Type | TYPE_STOPPED + * ^ | TYPE_STARTED + * Payload | struct rte_dwa_profile_l3fwd_d2h_lookup_add + * Pair TLV | RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_ADD + * + * Response for L3FWD profile rule add. + * It contains the handle for further operation on this rule. + */ + RTE_DWA_STAG_PROFILE_L3FWD_D2H_LOOKUP_ADD, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_UPDATE + * Direction | H2D + * Type | TYPE_STOPPED + * ^ | TYPE_STARTED + * Payload | struct rte_dwa_profile_l3fwd_h2d_lookup_update + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request to update the rule in L3FWD profile. + */ + RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_UPDATE, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_DEL + * Direction | H2D + * Type | TYPE_STOPPED + * ^ | TYPE_STARTED + * Payload | struct rte_dwa_profile_l3fwd_h2d_lookup_delete + * Pair TLV | RTE_DWA_STAG_COMMON_D2H_SUCCESS + * ^ | RTE_DWA_STAG_COMMON_D2H_ERR + * + * Request to delete the rule in L3FWD profile. + */ + RTE_DWA_STAG_PROFILE_L3FWD_H2D_LOOKUP_DEL, + /** + * Attribute | Value + * ----------|-------- + * Tag | RTE_DWA_TAG_PROFILE_L3FWD + * Stag | RTE_DWA_STAG_PROFILE_L3FWD_D2H_EXCEPTION_PACKETS + * Direction | D2H + * Type | TYPE_USER_PLANE + * Payload | struct rte_dwa_profile_l3fwd_d2h_exception_pkts + * Pair TLV | NA + * + * Response from DWA of exception packets. + */ + RTE_DWA_STAG_PROFILE_L3FWD_D2H_EXECPTION_PACKETS, + RTE_DWA_STAG_PROFILE_L3FWD_MAX = UINT16_MAX, + /**< Max stags for RTE_DWA_TAG_PROFILE_L3FWD tag*/ +}; + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_DWA_PROFILE_L3FWD_H */ diff --git a/lib/dwa/version.map b/lib/dwa/version.map new file mode 100644 index 0000000000..33c1b976f1 --- /dev/null +++ b/lib/dwa/version.map @@ -0,0 +1,3 @@ +EXPERIMENTAL { + local: *; +}; diff --git a/lib/meson.build b/lib/meson.build index 3b8b099820..f211557560 100644 --- a/lib/meson.build +++ b/lib/meson.build @@ -61,6 +61,7 @@ libraries = [ 'bpf', 'graph', 'node', + 'dwa', ] if is_windows