From patchwork Tue Oct 26 04:13:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Radha Chintakuntla X-Patchwork-Id: 102833 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BDB89A0C47; Tue, 26 Oct 2021 06:13:39 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EE43841165; Tue, 26 Oct 2021 06:13:28 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 4A9934003E for ; Tue, 26 Oct 2021 06:13:25 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19PLKxk4012626; Mon, 25 Oct 2021 21:13:24 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=XQWb/lUaVV1PzDd6epL19wGdhH4pegCUDEVaOoeIyzg=; b=Z0CRRQMN3XEisXXmZVc2lJy+Arma99WRu/OiF1+OoR5vWCVMQjOP+NduaB0n6sZl53Fm u0g8wLB82BLKjHWWBKRcgHz/2CttKI19cTWorPDIxWVjLVKn6ssDmxfpwtmywEoaRUo6 86Ah2BLvFaBGFfPCpPgaFbSV5ntDYqUxXxg6hbl9abxKS/WBExWZJc9iMO/PJxt2uevc D0MaKPZ6y8bj1ERm/75GXG9eNYWRTG7OymlxcxM/IQVbclnKwgQlEaPhk7L+LEx+GZqw YtK+38rVrxBN4GYrD2vBKGN69cOi+V0eH4+vhsdpo42mVwgnH4Bmvy2bxlh4/aYfGvpy Jg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3bx4dx196y-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 25 Oct 2021 21:13:24 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 25 Oct 2021 21:13:22 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 25 Oct 2021 21:13:22 -0700 Received: from rchintakuntla-lnx3.caveonetworks.com (unknown [10.111.140.81]) by maili.marvell.com (Postfix) with ESMTP id 495F63F7095; Mon, 25 Oct 2021 21:13:22 -0700 (PDT) From: Radha Mohan Chintakuntla To: , , , , , , , CC: , Radha Mohan Chintakuntla Date: Mon, 25 Oct 2021 21:13:00 -0700 Message-ID: <20211026041300.28924-4-radhac@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211026041300.28924-1-radhac@marvell.com> References: <20211026041300.28924-1-radhac@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: VzZqqq5zKHODq1TaOEC0Lmn58_gr81G_ X-Proofpoint-ORIG-GUID: VzZqqq5zKHODq1TaOEC0Lmn58_gr81G_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-25_08,2021-10-25_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH 4/4] dma/cnxk: add copy_sg function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the copy_sg function that will do the multiple DMA transfers of different sizes and different source/destination as well. Signed-off-by: Radha Mohan Chintakuntla --- drivers/dma/cnxk/cnxk_dmadev.c | 80 +++++++++++++++++++++++++++++++++- 1 file changed, 79 insertions(+), 1 deletion(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index 8434579aa2..f15ea16c5f 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -29,7 +29,7 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev, dev_info->nb_vchans = 1; dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM | - RTE_DMA_CAPA_OPS_COPY; + RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG; dev_info->max_desc = DPI_MAX_DESC; dev_info->min_desc = 1; dev_info->max_sges = DPI_MAX_POINTER; @@ -294,6 +294,83 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, return cnt; } +static int +cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, + const struct rte_dma_sge *src, + const struct rte_dma_sge *dst, + uint16_t nb_src, uint16_t nb_dst, uint64_t flags) +{ + uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; + union dpi_instr_hdr_s *header = (union dpi_instr_hdr_s *)&cmd[0]; + struct cnxk_dpi_vf_s *dpivf = dev_private; + const struct rte_dma_sge *fptr, *lptr; + struct cnxk_dpi_compl_s *comp_ptr; + int num_words = 0; + int i, rc; + + RTE_SET_USED(vchan); + + header->s.xtype = dpivf->conf.direction; + header->s.pt = DPI_HDR_PT_ZBW_CA; + header->s.grp = 0; + header->s.tag = 0; + header->s.tt = 0; + header->s.func = 0; + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail]; + comp_ptr->cdata = DPI_REQ_CDATA; + header->s.ptr = (uint64_t)comp_ptr; + STRM_INC(dpivf->conf.c_desc); + + /* pvfs should be set for inbound and outbound only */ + if (header->s.xtype <= 1) + header->s.pvfe = 1; + num_words += 4; + + /* + * For inbound case, src pointers are last pointers. + * For all other cases, src pointers are first pointers. + */ + if (header->s.xtype == DPI_XTYPE_INBOUND) { + header->s.nfst = nb_dst & 0xf; + header->s.nlst = nb_src & 0xf; + fptr = &dst[0]; + lptr = &src[0]; + header->s.fport = dpivf->conf.dst_port & 0x3; + header->s.lport = dpivf->conf.src_port & 0x3; + } else { + header->s.nfst = nb_src & 0xf; + header->s.nlst = nb_dst & 0xf; + fptr = &src[0]; + lptr = &dst[0]; + header->s.fport = dpivf->conf.src_port & 0x3; + header->s.lport = dpivf->conf.dst_port & 0x3; + } + + for (i = 0; i < header->s.nfst; i++) { + cmd[num_words++] = (uint64_t)fptr->length; + cmd[num_words++] = fptr->addr; + fptr++; + } + + for (i = 0; i < header->s.nlst; i++) { + cmd[num_words++] = (uint64_t)lptr->length; + cmd[num_words++] = lptr->addr; + lptr++; + } + + rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words); + if (!rc) { + if (flags & RTE_DMA_OP_FLAG_SUBMIT) { + rte_wmb(); + plt_write64(num_words, + dpivf->rdpi.rbase + DPI_VDMA_DBELL); + } + dpivf->num_words = num_words; + } + + return rc; +} + static uint16_t cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, uint16_t *last_idx, @@ -369,6 +446,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, dmadev->dev_ops = &cnxk_dmadev_ops; dmadev->fp_obj->copy = cnxk_dmadev_copy; + dmadev->fp_obj->copy_sg = cnxk_dmadev_copy_sg; dmadev->fp_obj->submit = cnxk_dmadev_submit; dmadev->fp_obj->completed = cnxk_dmadev_completed; dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;