diff mbox series

[05/17] net/dpaa2: fix timestamping for IEEE1588

Message ID 20211206121824.3493-6-nipun.gupta@nxp.com (mailing list archive)
State Superseded
Delegated to: Ferruh Yigit
Headers show
Series features and fixes on NXP eth devices | expand

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nipun Gupta Dec. 6, 2021, 12:18 p.m. UTC
From: Vanshika Shukla <vanshika.shukla@nxp.com>

The current implementation of DPAA2 driver code is such
that it records Rx and Tx timestamp for PTP without checking
if they are PTP packets or not. Packets for which
RTE_MBUF_F_RX_IEEE1588_TMST and RTE_MBUF_F_TX_IEEE1588_TMST
is not set, Rx and Tx timestamp should not be recorded.

This patch fixes this issue by checking if the required
flags are set in the mbuf before recording timestamps.

Also this change defines separate values for
DPAA2_TX_CONF_ENABLE and DPAA2_NO_PREFETCH_RX

Fixes: e806bf878c17 ("net/dpaa2: support timestamp")
Cc: stable@dpdk.org

Signed-off-by: Vanshika Shukla <vanshika.shukla@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.h |  2 +-
 drivers/net/dpaa2/dpaa2_ptp.c    |  8 ++++---
 drivers/net/dpaa2/dpaa2_rxtx.c   | 39 +++++++++++++++++++++++++-------
 3 files changed, 37 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index c5e9267bf0..c21571e63d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -62,7 +62,7 @@ 
 /* Disable RX tail drop, default is enable */
 #define DPAA2_RX_TAILDROP_OFF	0x04
 /* Tx confirmation enabled */
-#define DPAA2_TX_CONF_ENABLE	0x08
+#define DPAA2_TX_CONF_ENABLE	0x06
 
 #define DPAA2_RSS_OFFLOAD_ALL ( \
 	RTE_ETH_RSS_L2_PAYLOAD | \
diff --git a/drivers/net/dpaa2/dpaa2_ptp.c b/drivers/net/dpaa2/dpaa2_ptp.c
index 8d79e39244..3a4536dd69 100644
--- a/drivers/net/dpaa2/dpaa2_ptp.c
+++ b/drivers/net/dpaa2/dpaa2_ptp.c
@@ -111,10 +111,12 @@  int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 
-	if (priv->next_tx_conf_queue)
-		dpaa2_dev_tx_conf(priv->next_tx_conf_queue);
-	else
+	if (priv->next_tx_conf_queue) {
+		while (!priv->tx_timestamp)
+			dpaa2_dev_tx_conf(priv->next_tx_conf_queue);
+	} else {
 		return -1;
+	}
 	*timestamp = rte_ns_to_timespec(priv->tx_timestamp);
 
 	return 0;
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index c65589a5f3..ee3ed1b152 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -140,8 +140,10 @@  dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 			annotation->word3, annotation->word4);
 
 #if defined(RTE_LIBRTE_IEEE1588)
-	if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP))
+	if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP)) {
 		mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP;
+		mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_TMST;
+	}
 #endif
 
 	if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
@@ -769,7 +771,10 @@  dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		else
 			bufs[num_rx] = eth_fd_to_mbuf(fd, eth_data->port_id);
 #if defined(RTE_LIBRTE_IEEE1588)
-		priv->rx_timestamp = *dpaa2_timestamp_dynfield(bufs[num_rx]);
+		if (bufs[num_rx]->ol_flags & PKT_RX_IEEE1588_TMST) {
+			priv->rx_timestamp =
+				*dpaa2_timestamp_dynfield(bufs[num_rx]);
+		}
 #endif
 
 		if (eth_data->dev_conf.rxmode.offloads &
@@ -986,6 +991,13 @@  dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 				bufs[num_rx] = eth_fd_to_mbuf(fd,
 							eth_data->port_id);
 
+#if defined(RTE_LIBRTE_IEEE1588)
+		if (bufs[num_rx]->ol_flags & PKT_RX_IEEE1588_TMST) {
+			priv->rx_timestamp =
+				*dpaa2_timestamp_dynfield(bufs[num_rx]);
+		}
+#endif
+
 		if (eth_data->dev_conf.rxmode.offloads &
 				RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
 			rte_vlan_strip(bufs[num_rx]);
@@ -1021,6 +1033,8 @@  uint16_t dpaa2_dev_tx_conf(void *queue)
 	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
 	struct dpaa2_dev_priv *priv = eth_data->dev_private;
 	struct dpaa2_annot_hdr *annotation;
+	void *v_addr;
+	struct rte_mbuf *mbuf;
 #endif
 
 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
@@ -1105,10 +1119,16 @@  uint16_t dpaa2_dev_tx_conf(void *queue)
 			num_tx_conf++;
 			num_pulled++;
 #if defined(RTE_LIBRTE_IEEE1588)
-			annotation = (struct dpaa2_annot_hdr *)((size_t)
-				DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
-				DPAA2_FD_PTA_SIZE);
-			priv->tx_timestamp = annotation->word2;
+			v_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
+			mbuf = DPAA2_INLINE_MBUF_FROM_BUF(v_addr,
+				rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
+
+			if (mbuf->ol_flags & PKT_TX_IEEE1588_TMST) {
+				annotation = (struct dpaa2_annot_hdr *)((size_t)
+					DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+					DPAA2_FD_PTA_SIZE);
+				priv->tx_timestamp = annotation->word2;
+			}
 #endif
 		} while (pending);
 
@@ -1184,8 +1204,11 @@  dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	 * corresponding to last packet transmitted for reading
 	 * the timestamp
 	 */
-	priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue;
-	dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
+	if ((*bufs)->ol_flags & PKT_TX_IEEE1588_TMST) {
+		priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue;
+		dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
+		priv->tx_timestamp = 0;
+	}
 #endif
 
 	/*Prepare enqueue descriptor*/