diff mbox series

[v2,2/2] app/testpmd: add queue based pfc CLI options

Message ID 20220113102718.3167282-2-jerinj@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Ferruh Yigit
Headers show
Series [v2,1/2] ethdev: support queue-based priority flow control | expand

Checks

Context Check Description
ci/intel-Testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/checkpatch success coding style OK

Commit Message

Jerin Jacob Kollanukkaran Jan. 13, 2022, 10:27 a.m. UTC 
From: Sunil Kumar Kori <skori@marvell.com>

Patch adds command line options to configure queue based
priority flow control.

- Syntax command is given as below:

set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
	tx <on|off> <rx_qid> <rx_tc> <pause_time>

- Example command to configure queue based priority flow control
  on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
  time 2047

testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
---
 app/test-pmd/cmdline.c                      | 122 ++++++++++++++++++++
 doc/guides/testpmd_app_ug/testpmd_funcs.rst |  22 ++++
 2 files changed, 144 insertions(+)

Comments

Ferruh Yigit Jan. 25, 2022, 5:36 p.m. UTC | #1 
On 1/13/2022 10:27 AM, jerinj@marvell.com wrote:
> From: Sunil Kumar Kori <skori@marvell.com>
> 
> Patch adds command line options to configure queue based
> priority flow control.
> 
> - Syntax command is given as below:
> 
> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
> 	tx <on|off> <rx_qid> <rx_tc> <pause_time>
> 

Isn't the order of the paramters odd, it is mixing Rx/Tx config,
what about ordering Rx and Tx paramters?

> - Example command to configure queue based priority flow control
>    on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
>    time 2047
> 
> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047
> 
> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>

<...>
Sunil Kumar Kori Jan. 27, 2022, 7:13 a.m. UTC | #2 
>-----Original Message-----
>From: Ferruh Yigit <ferruh.yigit@intel.com>
>Sent: Tuesday, January 25, 2022 11:07 PM
>To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org; Xiaoyun
>Li <xiaoyun.li@intel.com>; Aman Singh <aman.deep.singh@intel.com>; Yuying
>Zhang <yuying.zhang@intel.com>
>Cc: thomas@monjalon.net; ajit.khaparde@broadcom.com;
>aboyer@pensando.io; andrew.rybchenko@oktetlabs.ru;
>beilei.xing@intel.com; bruce.richardson@intel.com; chas3@att.com;
>chenbo.xia@intel.com; ciara.loftus@intel.com; Devendra Singh Rawat
><dsinghrawat@marvell.com>; ed.czeck@atomicrules.com;
>evgenys@amazon.com; grive@u256.net; g.singh@nxp.com;
>zhouguoyang@huawei.com; haiyue.wang@intel.com; Harman Kalra
><hkalra@marvell.com>; heinrich.kuhn@corigine.com;
>hemant.agrawal@nxp.com; hyonkim@cisco.com; igorch@amazon.com; Igor
>Russkikh <irusskikh@marvell.com>; jgrajcia@cisco.com;
>jasvinder.singh@intel.com; jianwang@trustnetic.com;
>jiawenwu@trustnetic.com; jingjing.wu@intel.com; johndale@cisco.com;
>john.miller@atomicrules.com; linville@tuxdriver.com; keith.wiles@intel.com;
>Kiran Kumar Kokkilagadda <kirankumark@marvell.com>;
>oulijun@huawei.com; Liron Himi <lironh@marvell.com>;
>longli@microsoft.com; mw@semihalf.com; spinler@cesnet.cz;
>matan@nvidia.com; matt.peters@windriver.com;
>maxime.coquelin@redhat.com; mk@semihalf.com; humin29@huawei.com;
>Pradeep Kumar Nalla <pnalla@marvell.com>; Nithin Kumar Dabilpuram
><ndabilpuram@marvell.com>; qiming.yang@intel.com; qi.z.zhang@intel.com;
>Radha Chintakuntla <radhac@marvell.com>; rahul.lakkireddy@chelsio.com;
>Rasesh Mody <rmody@marvell.com>; rosen.xu@intel.com;
>sachin.saxena@oss.nxp.com; Satha Koteswara Rao Kottidi
><skoteshwar@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>;
>shaibran@amazon.com; shepard.siegel@atomicrules.com;
>asomalap@amd.com; somnath.kotur@broadcom.com;
>sthemmin@microsoft.com; steven.webster@windriver.com; Sunil Kumar Kori
><skori@marvell.com>; mtetsuyah@gmail.com; Veerasenareddy Burru
><vburru@marvell.com>; viacheslavo@nvidia.com; xiao.w.wang@intel.com;
>cloud.wangxiaoyun@huawei.com; yisen.zhuang@huawei.com;
>yongwang@vmware.com; xuanziyang2@huawei.com
>Subject: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue based
>pfc CLI options
>
>External Email
>
>----------------------------------------------------------------------
>On 1/13/2022 10:27 AM, jerinj@marvell.com wrote:
>> From: Sunil Kumar Kori <skori@marvell.com>
>>
>> Patch adds command line options to configure queue based priority flow
>> control.
>>
>> - Syntax command is given as below:
>>
>> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
>> 	tx <on|off> <rx_qid> <rx_tc> <pause_time>
>>
>
>Isn't the order of the paramters odd, it is mixing Rx/Tx config, what about
>ordering Rx and Tx paramters?
>
It's been kept like this to portray config for rx_pause and tx_pause separately i.e. mode and corresponding config.

>> - Example command to configure queue based priority flow control
>>    on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
>>    time 2047
>>
>> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047
>>
>> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
>
><...>
Ferruh Yigit Jan. 27, 2022, 10:40 a.m. UTC | #3 
On 1/27/2022 7:13 AM, Sunil Kumar Kori wrote:
> 
>> -----Original Message-----
>> From: Ferruh Yigit <ferruh.yigit@intel.com>
>> Sent: Tuesday, January 25, 2022 11:07 PM
>> To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org; Xiaoyun
>> Li <xiaoyun.li@intel.com>; Aman Singh <aman.deep.singh@intel.com>; Yuying
>> Zhang <yuying.zhang@intel.com>
>> Cc: thomas@monjalon.net; ajit.khaparde@broadcom.com;
>> aboyer@pensando.io; andrew.rybchenko@oktetlabs.ru;
>> beilei.xing@intel.com; bruce.richardson@intel.com; chas3@att.com;
>> chenbo.xia@intel.com; ciara.loftus@intel.com; Devendra Singh Rawat
>> <dsinghrawat@marvell.com>; ed.czeck@atomicrules.com;
>> evgenys@amazon.com; grive@u256.net; g.singh@nxp.com;
>> zhouguoyang@huawei.com; haiyue.wang@intel.com; Harman Kalra
>> <hkalra@marvell.com>; heinrich.kuhn@corigine.com;
>> hemant.agrawal@nxp.com; hyonkim@cisco.com; igorch@amazon.com; Igor
>> Russkikh <irusskikh@marvell.com>; jgrajcia@cisco.com;
>> jasvinder.singh@intel.com; jianwang@trustnetic.com;
>> jiawenwu@trustnetic.com; jingjing.wu@intel.com; johndale@cisco.com;
>> john.miller@atomicrules.com; linville@tuxdriver.com; keith.wiles@intel.com;
>> Kiran Kumar Kokkilagadda <kirankumark@marvell.com>;
>> oulijun@huawei.com; Liron Himi <lironh@marvell.com>;
>> longli@microsoft.com; mw@semihalf.com; spinler@cesnet.cz;
>> matan@nvidia.com; matt.peters@windriver.com;
>> maxime.coquelin@redhat.com; mk@semihalf.com; humin29@huawei.com;
>> Pradeep Kumar Nalla <pnalla@marvell.com>; Nithin Kumar Dabilpuram
>> <ndabilpuram@marvell.com>; qiming.yang@intel.com; qi.z.zhang@intel.com;
>> Radha Chintakuntla <radhac@marvell.com>; rahul.lakkireddy@chelsio.com;
>> Rasesh Mody <rmody@marvell.com>; rosen.xu@intel.com;
>> sachin.saxena@oss.nxp.com; Satha Koteswara Rao Kottidi
>> <skoteshwar@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>;
>> shaibran@amazon.com; shepard.siegel@atomicrules.com;
>> asomalap@amd.com; somnath.kotur@broadcom.com;
>> sthemmin@microsoft.com; steven.webster@windriver.com; Sunil Kumar Kori
>> <skori@marvell.com>; mtetsuyah@gmail.com; Veerasenareddy Burru
>> <vburru@marvell.com>; viacheslavo@nvidia.com; xiao.w.wang@intel.com;
>> cloud.wangxiaoyun@huawei.com; yisen.zhuang@huawei.com;
>> yongwang@vmware.com; xuanziyang2@huawei.com
>> Subject: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue based
>> pfc CLI options
>>
>> External Email
>>
>> ----------------------------------------------------------------------
>> On 1/13/2022 10:27 AM, jerinj@marvell.com wrote:
>>> From: Sunil Kumar Kori <skori@marvell.com>
>>>
>>> Patch adds command line options to configure queue based priority flow
>>> control.
>>>
>>> - Syntax command is given as below:
>>>
>>> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
>>> 	tx <on|off> <rx_qid> <rx_tc> <pause_time>
>>>
>>
>> Isn't the order of the paramters odd, it is mixing Rx/Tx config, what about
>> ordering Rx and Tx paramters?
>>
> It's been kept like this to portray config for rx_pause and tx_pause separately i.e. mode and corresponding config.
> 

What do you mean 'separately'? You need to provide all arguments anyway, right?

I was thinking first have the Rx arguments, later Tx, like:

rx <on|off> <rx_qid> <rx_tc> tx <on|off> <tx_qid> <tx_tc> <pause_time>

Am I missing something, is there a benefit of what you did in this patch?

>>> - Example command to configure queue based priority flow control
>>>     on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
>>>     time 2047
>>>
>>> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047
>>>
>>> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
>>
>> <...>
Ajit Khaparde Jan. 27, 2022, 4:56 p.m. UTC | #4 
On Thu, Jan 27, 2022 at 2:40 AM Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 1/27/2022 7:13 AM, Sunil Kumar Kori wrote:
> >
> >> -----Original Message-----
> >> From: Ferruh Yigit <ferruh.yigit@intel.com>
> >> Sent: Tuesday, January 25, 2022 11:07 PM
> >> To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org; Xiaoyun
> >> Li <xiaoyun.li@intel.com>; Aman Singh <aman.deep.singh@intel.com>; Yuying
> >> Zhang <yuying.zhang@intel.com>
> >> Cc: thomas@monjalon.net; ajit.khaparde@broadcom.com;
> >> aboyer@pensando.io; andrew.rybchenko@oktetlabs.ru;
> >> beilei.xing@intel.com; bruce.richardson@intel.com; chas3@att.com;
> >> chenbo.xia@intel.com; ciara.loftus@intel.com; Devendra Singh Rawat
> >> <dsinghrawat@marvell.com>; ed.czeck@atomicrules.com;
> >> evgenys@amazon.com; grive@u256.net; g.singh@nxp.com;
> >> zhouguoyang@huawei.com; haiyue.wang@intel.com; Harman Kalra
> >> <hkalra@marvell.com>; heinrich.kuhn@corigine.com;
> >> hemant.agrawal@nxp.com; hyonkim@cisco.com; igorch@amazon.com; Igor
> >> Russkikh <irusskikh@marvell.com>; jgrajcia@cisco.com;
> >> jasvinder.singh@intel.com; jianwang@trustnetic.com;
> >> jiawenwu@trustnetic.com; jingjing.wu@intel.com; johndale@cisco.com;
> >> john.miller@atomicrules.com; linville@tuxdriver.com; keith.wiles@intel.com;
> >> Kiran Kumar Kokkilagadda <kirankumark@marvell.com>;
> >> oulijun@huawei.com; Liron Himi <lironh@marvell.com>;
> >> longli@microsoft.com; mw@semihalf.com; spinler@cesnet.cz;
> >> matan@nvidia.com; matt.peters@windriver.com;
> >> maxime.coquelin@redhat.com; mk@semihalf.com; humin29@huawei.com;
> >> Pradeep Kumar Nalla <pnalla@marvell.com>; Nithin Kumar Dabilpuram
> >> <ndabilpuram@marvell.com>; qiming.yang@intel.com; qi.z.zhang@intel.com;
> >> Radha Chintakuntla <radhac@marvell.com>; rahul.lakkireddy@chelsio.com;
> >> Rasesh Mody <rmody@marvell.com>; rosen.xu@intel.com;
> >> sachin.saxena@oss.nxp.com; Satha Koteswara Rao Kottidi
> >> <skoteshwar@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>;
> >> shaibran@amazon.com; shepard.siegel@atomicrules.com;
> >> asomalap@amd.com; somnath.kotur@broadcom.com;
> >> sthemmin@microsoft.com; steven.webster@windriver.com; Sunil Kumar Kori
> >> <skori@marvell.com>; mtetsuyah@gmail.com; Veerasenareddy Burru
> >> <vburru@marvell.com>; viacheslavo@nvidia.com; xiao.w.wang@intel.com;
> >> cloud.wangxiaoyun@huawei.com; yisen.zhuang@huawei.com;
> >> yongwang@vmware.com; xuanziyang2@huawei.com
> >> Subject: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue based
> >> pfc CLI options
> >>
> >> External Email
> >>
> >> ----------------------------------------------------------------------
> >> On 1/13/2022 10:27 AM, jerinj@marvell.com wrote:
> >>> From: Sunil Kumar Kori <skori@marvell.com>
> >>>
> >>> Patch adds command line options to configure queue based priority flow
> >>> control.
> >>>
> >>> - Syntax command is given as below:
> >>>
> >>> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
> >>>     tx <on|off> <rx_qid> <rx_tc> <pause_time>
> >>>
> >>
> >> Isn't the order of the paramters odd, it is mixing Rx/Tx config, what about
> >> ordering Rx and Tx paramters?
> >>
> > It's been kept like this to portray config for rx_pause and tx_pause separately i.e. mode and corresponding config.
> >
>
> What do you mean 'separately'? You need to provide all arguments anyway, right?
>
> I was thinking first have the Rx arguments, later Tx, like:
>
> rx <on|off> <rx_qid> <rx_tc> tx <on|off> <tx_qid> <tx_tc> <pause_time>
I think this grouping is better.

>
> Am I missing something, is there a benefit of what you did in this patch?

>
> >>> - Example command to configure queue based priority flow control
> >>>     on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
> >>>     time 2047
> >>>
> >>> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047
> >>>
> >>> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
> >>
> >> <...>
>
Sunil Kumar Kori Jan. 31, 2022, 1:03 p.m. UTC | #5 
-----Original Message-----
From: Ajit Khaparde <ajit.khaparde@broadcom.com> 
Sent: Thursday, January 27, 2022 10:27 PM
To: Ferruh Yigit <ferruh.yigit@intel.com>
Cc: Sunil Kumar Kori <skori@marvell.com>; Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org; Xiaoyun Li <xiaoyun.li@intel.com>; Aman Singh <aman.deep.singh@intel.com>; Yuying Zhang <yuying.zhang@intel.com>; thomas@monjalon.net; aboyer@pensando.io; andrew.rybchenko@oktetlabs.ru; beilei.xing@intel.com; bruce.richardson@intel.com; chas3@att.com; chenbo.xia@intel.com; ciara.loftus@intel.com; Devendra Singh Rawat <dsinghrawat@marvell.com>; ed.czeck@atomicrules.com; evgenys@amazon.com; grive@u256.net; g.singh@nxp.com; zhouguoyang@huawei.com; haiyue.wang@intel.com; Harman Kalra <hkalra@marvell.com>; heinrich.kuhn@corigine.com; hemant.agrawal@nxp.com; hyonkim@cisco.com; igorch@amazon.com; Igor Russkikh <irusskikh@marvell.com>; jgrajcia@cisco.com; jasvinder.singh@intel.com; jianwang@trustnetic.com; jiawenwu@trustnetic.com; jingjing.wu@intel.com; johndale@cisco.com; john.miller@atomicrules.com; linville@tuxdriver.com; keith.wiles@intel.com; Kiran Kumar Kokkilagadda <kirankumark@marvell.com>; oulijun@huawei.com; Liron Himi <lironh@marvell.com>; longli@microsoft.com; mw@semihalf.com; spinler@cesnet.cz; matan@nvidia.com; matt.peters@windriver.com; maxime.coquelin@redhat.com; mk@semihalf.com; humin29@huawei.com; Pradeep Kumar Nalla <pnalla@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; qiming.yang@intel.com; qi.z.zhang@intel.com; Radha Chintakuntla <radhac@marvell.com>; rahul.lakkireddy@chelsio.com; Rasesh Mody <rmody@marvell.com>; rosen.xu@intel.com; sachin.saxena@oss.nxp.com; Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>; Shahed Shaikh <shshaikh@marvell.com>; shaibran@amazon.com; shepard.siegel@atomicrules.com; asomalap@amd.com; somnath.kotur@broadcom.com; sthemmin@microsoft.com; steven.webster@windriver.com; mtetsuyah@gmail.com; Veerasenareddy Burru <vburru@marvell.com>; viacheslavo@nvidia.com; xiao.w.wang@intel.com; cloud.wangxiaoyun@huawei.com; yisen.zhuang@huawei.com; yongwang@vmware.com; xuanziyang2@huawei.com
Subject: Re: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue based pfc CLI options

On Thu, Jan 27, 2022 at 2:40 AM Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 1/27/2022 7:13 AM, Sunil Kumar Kori wrote:
> >
> >> -----Original Message-----
> >> From: Ferruh Yigit <ferruh.yigit@intel.com>
> >> Sent: Tuesday, January 25, 2022 11:07 PM
> >> To: Jerin Jacob Kollanukkaran <jerinj@marvell.com>; dev@dpdk.org; 
> >> Xiaoyun Li <xiaoyun.li@intel.com>; Aman Singh 
> >> <aman.deep.singh@intel.com>; Yuying Zhang <yuying.zhang@intel.com>
> >> Cc: thomas@monjalon.net; ajit.khaparde@broadcom.com; 
> >> aboyer@pensando.io; andrew.rybchenko@oktetlabs.ru; 
> >> beilei.xing@intel.com; bruce.richardson@intel.com; chas3@att.com; 
> >> chenbo.xia@intel.com; ciara.loftus@intel.com; Devendra Singh Rawat 
> >> <dsinghrawat@marvell.com>; ed.czeck@atomicrules.com; 
> >> evgenys@amazon.com; grive@u256.net; g.singh@nxp.com; 
> >> zhouguoyang@huawei.com; haiyue.wang@intel.com; Harman Kalra 
> >> <hkalra@marvell.com>; heinrich.kuhn@corigine.com; 
> >> hemant.agrawal@nxp.com; hyonkim@cisco.com; igorch@amazon.com; Igor 
> >> Russkikh <irusskikh@marvell.com>; jgrajcia@cisco.com; 
> >> jasvinder.singh@intel.com; jianwang@trustnetic.com; 
> >> jiawenwu@trustnetic.com; jingjing.wu@intel.com; johndale@cisco.com; 
> >> john.miller@atomicrules.com; linville@tuxdriver.com; 
> >> keith.wiles@intel.com; Kiran Kumar Kokkilagadda 
> >> <kirankumark@marvell.com>; oulijun@huawei.com; Liron Himi 
> >> <lironh@marvell.com>; longli@microsoft.com; mw@semihalf.com; 
> >> spinler@cesnet.cz; matan@nvidia.com; matt.peters@windriver.com; 
> >> maxime.coquelin@redhat.com; mk@semihalf.com; humin29@huawei.com; 
> >> Pradeep Kumar Nalla <pnalla@marvell.com>; Nithin Kumar Dabilpuram 
> >> <ndabilpuram@marvell.com>; qiming.yang@intel.com; 
> >> qi.z.zhang@intel.com; Radha Chintakuntla <radhac@marvell.com>; 
> >> rahul.lakkireddy@chelsio.com; Rasesh Mody <rmody@marvell.com>; 
> >> rosen.xu@intel.com; sachin.saxena@oss.nxp.com; Satha Koteswara Rao 
> >> Kottidi <skoteshwar@marvell.com>; Shahed Shaikh 
> >> <shshaikh@marvell.com>; shaibran@amazon.com; 
> >> shepard.siegel@atomicrules.com; asomalap@amd.com; 
> >> somnath.kotur@broadcom.com; sthemmin@microsoft.com; 
> >> steven.webster@windriver.com; Sunil Kumar Kori <skori@marvell.com>; 
> >> mtetsuyah@gmail.com; Veerasenareddy Burru <vburru@marvell.com>; 
> >> viacheslavo@nvidia.com; xiao.w.wang@intel.com; 
> >> cloud.wangxiaoyun@huawei.com; yisen.zhuang@huawei.com; 
> >> yongwang@vmware.com; xuanziyang2@huawei.com
> >> Subject: [EXT] Re: [dpdk-dev] [PATCH v2 2/2] app/testpmd: add queue 
> >> based pfc CLI options
> >>
> >> External Email
> >>
> >> -------------------------------------------------------------------
> >> --- On 1/13/2022 10:27 AM, jerinj@marvell.com wrote:
> >>> From: Sunil Kumar Kori <skori@marvell.com>
> >>>
> >>> Patch adds command line options to configure queue based priority 
> >>> flow control.
> >>>
> >>> - Syntax command is given as below:
> >>>
> >>> set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> \
> >>>     tx <on|off> <rx_qid> <rx_tc> <pause_time>
> >>>
> >>
> >> Isn't the order of the paramters odd, it is mixing Rx/Tx config, 
> >> what about ordering Rx and Tx paramters?
> >>
> > It's been kept like this to portray config for rx_pause and tx_pause separately i.e. mode and corresponding config.
> >
>
> What do you mean 'separately'? You need to provide all arguments anyway, right?
>
> I was thinking first have the Rx arguments, later Tx, like:
>
> rx <on|off> <rx_qid> <rx_tc> tx <on|off> <tx_qid> <tx_tc> <pause_time>
I think this grouping is better.

>
> Am I missing something, is there a benefit of what you did in this patch?

Mentioned syntax takes input as per below config structure:
struct rte_eth_pfc_queue_conf {
        enum rte_eth_fc_mode mode; /**< Link flow control mode */

        struct {
                uint16_t tx_qid; /**< Tx queue ID */
                uint8_t tc; /**< Traffic class as per PFC (802.1Qbb) spec */
        } rx_pause; /* Valid when (mode == FC_RX_PAUSE || mode == FC_FULL) */

        struct {
                uint16_t pause_time; /**< Pause quota in the Pause frame */
                uint16_t rx_qid;     /**< Rx queue ID */
                uint8_t tc; /**< Traffic class as per PFC (802.1Qbb) spec */
        } tx_pause; /* Valid when (mode == FC_TX_PAUSE || mode == FC_FULL) */
};

First part represent first structure information and later part represent second structure information.
For the next version, I am keeping this syntax as it is and will be fixing some ethdev changes.

>
> >>> - Example command to configure queue based priority flow control
> >>>     on rx and tx side for port 0, Rx queue 0, Tx queue 0 with pause
> >>>     time 2047
> >>>
> >>> testpmd> set pfc_queue_ctrl 0 rx on 0 0 tx on 0 0 2047
> >>>
> >>> Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
> >>
> >> <...>
>
diff mbox series

Patch

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index e626b1c7d9..19dbcea4f1 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -544,6 +544,11 @@  static void cmd_help_long_parsed(void *parsed_result,
 			"    Set the priority flow control parameter on a"
 			" port.\n\n"
 
+			"set pfc_queue_ctrl (port_id) rx (on|off) (tx_qid)"
+			" (tx_tc) tx (on|off) (rx_qid) (rx_tc) (pause_time)\n"
+			"    Set the queue priority flow control parameter on a"
+			" given Rx and Tx queues of a port.\n\n"
+
 			"set stat_qmap (tx|rx) (port_id) (queue_id) (qmapping)\n"
 			"    Set statistics mapping (qmapping 0..15) for RX/TX"
 			" queue on port.\n"
@@ -7690,6 +7695,122 @@  cmdline_parse_inst_t cmd_priority_flow_control_set = {
 	},
 };
 
+struct cmd_queue_priority_flow_ctrl_set_result {
+	cmdline_fixed_string_t set;
+	cmdline_fixed_string_t pfc_queue_ctrl;
+	portid_t port_id;
+	cmdline_fixed_string_t rx;
+	cmdline_fixed_string_t rx_pfc_mode;
+	uint16_t tx_qid;
+	uint8_t  tx_tc;
+	cmdline_fixed_string_t tx;
+	cmdline_fixed_string_t tx_pfc_mode;
+	uint16_t rx_qid;
+	uint8_t  rx_tc;
+	uint16_t pause_time;
+};
+
+static void
+cmd_queue_priority_flow_ctrl_set_parsed(void *parsed_result,
+					__rte_unused struct cmdline *cl,
+					__rte_unused void *data)
+{
+	struct cmd_queue_priority_flow_ctrl_set_result *res = parsed_result;
+	struct rte_eth_pfc_queue_conf pfc_queue_conf;
+	int rx_fc_enable, tx_fc_enable;
+	int ret;
+
+	/*
+	 * Rx on/off, flow control is enabled/disabled on RX side. This can
+	 * indicate the RTE_ETH_FC_TX_PAUSE, Transmit pause frame at the Rx
+	 * side. Tx on/off, flow control is enabled/disabled on TX side. This
+	 * can indicate the RTE_ETH_FC_RX_PAUSE, Respond to the pause frame at
+	 * the Tx side.
+	 */
+	static enum rte_eth_fc_mode rx_tx_onoff_2_mode[2][2] = {
+		{RTE_ETH_FC_NONE, RTE_ETH_FC_TX_PAUSE},
+		{RTE_ETH_FC_RX_PAUSE, RTE_ETH_FC_FULL}
+	};
+
+	memset(&pfc_queue_conf, 0, sizeof(struct rte_eth_pfc_queue_conf));
+	rx_fc_enable = (!strncmp(res->rx_pfc_mode, "on", 2)) ? 1 : 0;
+	tx_fc_enable = (!strncmp(res->tx_pfc_mode, "on", 2)) ? 1 : 0;
+	pfc_queue_conf.mode = rx_tx_onoff_2_mode[rx_fc_enable][tx_fc_enable];
+	pfc_queue_conf.rx_pause.tc  = res->tx_tc;
+	pfc_queue_conf.rx_pause.tx_qid = res->tx_qid;
+	pfc_queue_conf.tx_pause.tc  = res->rx_tc;
+	pfc_queue_conf.tx_pause.rx_qid  = res->rx_qid;
+	pfc_queue_conf.tx_pause.pause_time = res->pause_time;
+
+	ret = rte_eth_dev_priority_flow_ctrl_queue_set(res->port_id,
+						       &pfc_queue_conf);
+	if (ret != 0) {
+		fprintf(stderr,
+			"bad queue priority flow control parameter, rc = %d\n",
+			ret);
+	}
+}
+
+cmdline_parse_token_string_t cmd_q_pfc_set_set =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				set, "set");
+cmdline_parse_token_string_t cmd_q_pfc_set_flow_ctrl =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				pfc_queue_ctrl, "pfc_queue_ctrl");
+cmdline_parse_token_num_t cmd_q_pfc_set_portid =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				port_id, RTE_UINT16);
+cmdline_parse_token_string_t cmd_q_pfc_set_rx =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				rx, "rx");
+cmdline_parse_token_string_t cmd_q_pfc_set_rx_mode =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				rx_pfc_mode, "on#off");
+cmdline_parse_token_num_t cmd_q_pfc_set_tx_qid =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				tx_qid, RTE_UINT16);
+cmdline_parse_token_num_t cmd_q_pfc_set_tx_tc =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				tx_tc, RTE_UINT8);
+cmdline_parse_token_string_t cmd_q_pfc_set_tx =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				tx, "tx");
+cmdline_parse_token_string_t cmd_q_pfc_set_tx_mode =
+	TOKEN_STRING_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				tx_pfc_mode, "on#off");
+cmdline_parse_token_num_t cmd_q_pfc_set_rx_qid =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				rx_qid, RTE_UINT16);
+cmdline_parse_token_num_t cmd_q_pfc_set_rx_tc =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				rx_tc, RTE_UINT8);
+cmdline_parse_token_num_t cmd_q_pfc_set_pause_time =
+	TOKEN_NUM_INITIALIZER(struct cmd_queue_priority_flow_ctrl_set_result,
+				pause_time, RTE_UINT16);
+
+cmdline_parse_inst_t cmd_queue_priority_flow_control_set = {
+	.f = cmd_queue_priority_flow_ctrl_set_parsed,
+	.data = NULL,
+	.help_str = "set pfc_queue_ctrl <port_id> rx <on|off> <tx_qid> <tx_tc> "
+		"tx <on|off> <rx_qid> <rx_tc> <pause_time>: "
+		"Configure the Ethernet queue priority flow control",
+	.tokens = {
+		(void *)&cmd_q_pfc_set_set,
+		(void *)&cmd_q_pfc_set_flow_ctrl,
+		(void *)&cmd_q_pfc_set_portid,
+		(void *)&cmd_q_pfc_set_rx,
+		(void *)&cmd_q_pfc_set_rx_mode,
+		(void *)&cmd_q_pfc_set_tx_qid,
+		(void *)&cmd_q_pfc_set_tx_tc,
+		(void *)&cmd_q_pfc_set_tx,
+		(void *)&cmd_q_pfc_set_tx_mode,
+		(void *)&cmd_q_pfc_set_rx_qid,
+		(void *)&cmd_q_pfc_set_rx_tc,
+		(void *)&cmd_q_pfc_set_pause_time,
+		NULL,
+	},
+};
+
 /* *** RESET CONFIGURATION *** */
 struct cmd_reset_result {
 	cmdline_fixed_string_t reset;
@@ -17765,6 +17886,7 @@  cmdline_parse_ctx_t main_ctx[] = {
 	(cmdline_parse_inst_t *)&cmd_link_flow_control_set_autoneg,
 	(cmdline_parse_inst_t *)&cmd_link_flow_control_show,
 	(cmdline_parse_inst_t *)&cmd_priority_flow_control_set,
+	(cmdline_parse_inst_t *)&cmd_queue_priority_flow_control_set,
 	(cmdline_parse_inst_t *)&cmd_config_dcb,
 	(cmdline_parse_inst_t *)&cmd_read_reg,
 	(cmdline_parse_inst_t *)&cmd_read_reg_bit_field,
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index 94792d88cc..82333d518e 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -1561,6 +1561,28 @@  Where:
 
 * ``priority`` (0-7): VLAN User Priority.
 
+set pfc_queue_ctrl
+~~~~~~~~~~~~~~~~~~
+
+Set the priority flow control parameter on a given Rx and Tx queue of a port::
+
+   testpmd> set pfc_queue_ctrl <port_id> rx (on|off) <tx_qid> <tx_tc> \
+            tx (on|off) <rx_qid> <rx_tc> <pause_time>
+
+Where:
+
+* ``tx_qid`` (integer): Tx qid for which ``tx_tc`` will be applied and traffic
+  will be paused when PFC frame is received with ``tx_tc`` enabled.
+
+* ``tx_tc`` (0-15): TC for which traffic is to be paused for xmit.
+
+* ``rx_qid`` (integer): Rx qid for which threshold will be applied and PFC
+  frame will be generated with ``tx_tc`` when exceeds the threshold.
+
+* ``rx_tc`` (0-15): TC filled in PFC frame for which remote Tx is to be paused.
+
+* ``pause_time`` (integer): Pause quota filled in the PFC frame.
+
 set stat_qmap
 ~~~~~~~~~~~~~