From patchwork Thu Jan 20 16:26:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 106134 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 05FEDA034E; Thu, 20 Jan 2022 17:26:51 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C4A984270E; Thu, 20 Jan 2022 17:26:50 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 66A2F4270E for ; Thu, 20 Jan 2022 17:26:48 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20KAA8mY026190; Thu, 20 Jan 2022 08:26:46 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=WLJsdwbCUxvt3jhJ6NDBDZ924bBzSwMR7wM+INKTBgw=; b=Gmcm9/m46wZ6qHM+gjvGKIiVfeOPG/CYyV8LsUZQdIICXGoAHV/0F7IjYGTqez0xKo4M Tqnhx/DSHDF+DerqO3aiyrZP9693GYkrGyBo+DuSdbY+nswmxm0pJYW1FYDXYStfnVBR iuUObF4j1E5PQ+Jhh2lS25XUPWYNIXRLoqKKmMaKZeroCwBglL16JAliUuQg8ORWR5Pe 8o2IPCOJSOtyXyQxvvDSWIfVPV0GxATvwggNXhrUFTMcaPagnVuIj/eSIpSMnAW+RdYu JCVTEV78altJLcAeEp6hK/E1+bK/GyGMz3Kh659tR9Gd/HfR2bI/3IidgbeTRdkYxFp5 jA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dq5re1csw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Jan 2022 08:26:46 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 20 Jan 2022 08:26:45 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 20 Jan 2022 08:26:45 -0800 Received: from localhost.localdomain (unknown [10.28.48.55]) by maili.marvell.com (Postfix) with ESMTP id E2A0D3F705A; Thu, 20 Jan 2022 08:26:40 -0800 (PST) From: Akhil Goyal To: CC: , , , , , , , , , , , , "Akhil Goyal" Subject: [PATCH v2 1/4] ethdev: introduce IP reassembly offload Date: Thu, 20 Jan 2022 21:56:24 +0530 Message-ID: <20220120162627.4155695-2-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220120162627.4155695-1-gakhil@marvell.com> References: <20220103150813.1694888-1-gakhil@marvell.com> <20220120162627.4155695-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: qKPnHakZqnTdYqQonf2pFlVnY9b8C8GQ X-Proofpoint-ORIG-GUID: qKPnHakZqnTdYqQonf2pFlVnY9b8C8GQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-20_06,2022-01-20_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org IP Reassembly is a costly operation if it is done in software. The operation becomes even more costlier if IP fragments are encrypted. However, if it is offloaded to HW, it can considerably save application cycles. Hence, a new offload RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY is introduced in ethdev for devices which can attempt reassembly of packets in hardware. rte_eth_dev_info is updated with the reassembly capabilities which a device can support. The resulting reassembled packet would be a typical segmented mbuf in case of success. And if reassembly of fragments is failed or is incomplete (if fragments do not come before the reass_timeout), the mbuf ol_flags can be updated. This is updated in a subsequent patch. Signed-off-by: Akhil Goyal Acked-by: Konstantin Ananyev --- devtools/libabigail.abignore | 5 +++++ doc/guides/nics/features.rst | 11 +++++++++++ lib/ethdev/rte_ethdev.c | 1 + lib/ethdev/rte_ethdev.h | 32 +++++++++++++++++++++++++++++++- 4 files changed, 48 insertions(+), 1 deletion(-) diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore index 4b676f317d..90f449c43a 100644 --- a/devtools/libabigail.abignore +++ b/devtools/libabigail.abignore @@ -11,3 +11,8 @@ ; Ignore generated PMD information strings [suppress_variable] name_regexp = _pmd_info$ + +; Ignore fields inserted in place of reserved_64s of rte_eth_dev_info +[suppress_type] + name = rte_eth_dev_info + has_data_member_inserted_between = {offset_of(reserved_64s), end} diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index 27be2d2576..b45bce4a78 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -602,6 +602,17 @@ Supports inner packet L4 checksum. ``tx_offload_capa,tx_queue_offload_capa:RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM``. +.. _nic_features_ip_reassembly: + +IP reassembly +------------- + +Supports IP reassembly in hardware. + +* **[uses] rte_eth_rxconf,rte_eth_rxmode**: ``offloads:RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY``. +* **[provides] rte_eth_dev_info**: ``reass_capa``. + + .. _nic_features_shared_rx_queue: Shared Rx queue diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c index a1d475a292..d9a03f12f9 100644 --- a/lib/ethdev/rte_ethdev.c +++ b/lib/ethdev/rte_ethdev.c @@ -126,6 +126,7 @@ static const struct { RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), RTE_RX_OFFLOAD_BIT2STR(RSS_HASH), RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT), + RTE_RX_OFFLOAD_BIT2STR(IP_REASSEMBLY), }; #undef RTE_RX_OFFLOAD_BIT2STR diff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h index fa299c8ad7..11427b2e4d 100644 --- a/lib/ethdev/rte_ethdev.h +++ b/lib/ethdev/rte_ethdev.h @@ -1586,6 +1586,7 @@ struct rte_eth_conf { #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19) #define DEV_RX_OFFLOAD_RSS_HASH RTE_ETH_RX_OFFLOAD_RSS_HASH #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20) +#define RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY RTE_BIT64(21) #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \ RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \ @@ -1781,6 +1782,33 @@ enum rte_eth_representor_type { RTE_ETH_REPRESENTOR_PF, /**< representor of Physical Function. */ }; +/* Flag to offload IP reassembly for IPv4 packets. */ +#define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0)) +/* Flag to offload IP reassembly for IPv6 packets. */ +#define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1)) +/** + * @warning + * @b EXPERIMENTAL: this structure may change without prior notice. + * + * A structure used to set IP reassembly configuration. + * + * If RTE_ETH_RX_OFFLOAD_IP_REASSEMBLY flag is set in offloads field, + * the PMD will attempt IP reassembly for the received packets as per + * properties defined in this structure: + * + */ +struct rte_eth_ip_reass_params { + /** Maximum time in ms which PMD can wait for other fragments. */ + uint32_t reass_timeout; + /** Maximum number of fragments that can be reassembled. */ + uint16_t max_frags; + /** + * Flags to enable reassembly of packet types - + * RTE_ETH_DEV_REASSEMBLY_F_xxx. + */ + uint16_t flags; +}; + /** * A structure used to retrieve the contextual information of * an Ethernet device, such as the controlling driver of the @@ -1841,8 +1869,10 @@ struct rte_eth_dev_info { * embedded managed interconnect/switch. */ struct rte_eth_switch_info switch_info; + /** IP reassembly offload capabilities that a device can support. */ + struct rte_eth_ip_reass_params reass_capa; - uint64_t reserved_64s[2]; /**< Reserved for future fields */ + uint64_t reserved_64s[1]; /**< Reserved for future fields */ void *reserved_ptrs[2]; /**< Reserved for future fields */ };