From patchwork Mon Jan 24 06:56:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Wang X-Patchwork-Id: 106327 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7F37DA04A6; Mon, 24 Jan 2022 07:57:07 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6CE78427B2; Mon, 24 Jan 2022 07:57:07 +0100 (CET) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mails.dpdk.org (Postfix) with ESMTP id 0A59340040 for ; Mon, 24 Jan 2022 07:57:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1643007425; x=1674543425; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j5jHoUNN2EEcMT6c+vQf1smkU+WUhbZ52pjlqoc0f+A=; b=mCizo2lKBWfTI4EcX9cuom5lJo9ehauQdT0CMtS5AlGB9EDDdf9Uqa8r 8O3qI+XcZwPnRWtws1fFYrQUSfg8QYLunp3CpYuU+lY5RZM1uH5iHiD9s rTseMGZJxG62kMBAF0fPF4pLoMtqIBhsu+/vyO4QkGz3cJW2xki4RA15d CqJdJ7aldK8rbFRz4mIfmyTGIs/WvAf7Se8jmQimhsx0+3PN351rhIGzM xFzwZKsfviSy/f7LjyjV+ho8OayWoyXvanIo/LzlZ2uggwT2w3JMrtYlR MlcA4lxduqbzoAPQD92oMyARoJnDToWO7TIjOBVo+W0On5ZT0yf5FBaFe A==; X-IronPort-AV: E=McAfee;i="6200,9189,10236"; a="226651774" X-IronPort-AV: E=Sophos;i="5.88,311,1635231600"; d="scan'208";a="226651774" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2022 22:57:04 -0800 X-IronPort-AV: E=Sophos;i="5.88,311,1635231600"; d="scan'208";a="478959532" Received: from intel-cd-odc-gavin.cd.intel.com ([10.240.178.183]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Jan 2022 22:57:00 -0800 From: Jie Wang To: dev@dpdk.org Cc: stevex.yang@intel.com, orika@nvidia.com, aman.deep.singh@intel.com, ferruh.yigit@intel.com, thomas@monjalon.net, andrew.rybchenko@oktetlabs.ru, jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com, Jie Wang Subject: [PATCH 2/6] net: fix L2TPv2 common header Date: Mon, 24 Jan 2022 14:56:09 +0800 Message-Id: <20220124065613.2197436-3-jie1x.wang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220124065613.2197436-1-jie1x.wang@intel.com> References: <20220124065613.2197436-1-jie1x.wang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The fields of L2TPv2 common header were reversed in big endian and little endian. This patch fixes this error to ensure L2TPv2 can be parsed correctly. Fixes: 3a929df1f286 ("ethdev: support L2TPv2 and PPP procotol") Signed-off-by: Jie Wang --- lib/net/rte_l2tpv2.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/lib/net/rte_l2tpv2.h b/lib/net/rte_l2tpv2.h index b90e36cf12..398e53bc46 100644 --- a/lib/net/rte_l2tpv2.h +++ b/lib/net/rte_l2tpv2.h @@ -89,16 +89,6 @@ struct rte_l2tpv2_common_hdr { __extension__ struct { #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN - uint16_t t:1; /**< message Type */ - uint16_t l:1; /**< length option bit */ - uint16_t res1:2; /**< reserved */ - uint16_t s:1; /**< ns/nr option bit */ - uint16_t res2:1; /**< reserved */ - uint16_t o:1; /**< offset option bit */ - uint16_t p:1; /**< priority option bit */ - uint16_t res3:4; /**< reserved */ - uint16_t ver:4; /**< protocol version */ -#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN uint16_t ver:4; /**< protocol version */ uint16_t res3:4; /**< reserved */ uint16_t p:1; /**< priority option bit */ @@ -108,6 +98,16 @@ struct rte_l2tpv2_common_hdr { uint16_t res1:2; /**< reserved */ uint16_t l:1; /**< length option bit */ uint16_t t:1; /**< message Type */ +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint16_t t:1; /**< message Type */ + uint16_t l:1; /**< length option bit */ + uint16_t res1:2; /**< reserved */ + uint16_t s:1; /**< ns/nr option bit */ + uint16_t res2:1; /**< reserved */ + uint16_t o:1; /**< offset option bit */ + uint16_t p:1; /**< priority option bit */ + uint16_t res3:4; /**< reserved */ + uint16_t ver:4; /**< protocol version */ #endif }; };