From patchwork Wed Feb 23 12:51:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 108169 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 363E8A034C; Wed, 23 Feb 2022 13:51:15 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 221E041226; Wed, 23 Feb 2022 13:51:15 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CA085411B2 for ; Wed, 23 Feb 2022 13:51:12 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21N9eMXr003766 for ; Wed, 23 Feb 2022 04:51:12 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=DSP05GV8Kv5YSPGnUG+tgO2BJN53fEgRlWcuavHO35c=; b=LgqPNCWeJJvrZk9ZiZof8TE9zNZTxqtgANug96IZm0xNn7On01KSrXf2w3fMb4DFqOsG 69eZ0k/j7yFOkkox/m8ZcbH9jW0P9OA1dqUUrRMEG1FowKq2Vjq2No6sMJQEUe50Wda9 mdrUqDec4VKEK+yYnHo3VO5JtyDj7gwgwwKuDbtmDNtwkow1fwGI5xuFTAgbugxz/IjL XfeDQcNg//MPY6Wem7QCAGLii2ai4bi9ecsyoZRjLKQCGeN2v/DJ1voOT5WpUJ70NLPd /McqN49NQrcNjhRU+5jvCskC9icvnS1NBJHGUenu3fOBxGypF0QKt5uEViW8BQOLyRYZ SA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3edjga0qrm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 23 Feb 2022 04:51:11 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 23 Feb 2022 04:51:10 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 23 Feb 2022 04:51:10 -0800 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 1A6EA3F7090; Wed, 23 Feb 2022 04:51:07 -0800 (PST) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH] common/cnxk: adds cn10k specific xstats Date: Wed, 23 Feb 2022 18:21:04 +0530 Message-ID: <20220223125104.254210-1-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: moC8wFPZIaG7naX5_UPR_spozzpwVACk X-Proofpoint-GUID: moC8wFPZIaG7naX5_UPR_spozzpwVACk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-23_05,2022-02-23_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This adds cn10k specific rx xstats of bpf, cpt and ipsecd counters. Signed-off-by: Rahul Bhansali Acked-by: Jerin Jacob --- drivers/common/cnxk/hw/nix.h | 1 + drivers/common/cnxk/roc_nix_stats.c | 14 ++++++++++++++ drivers/common/cnxk/roc_nix_xstats.h | 20 +++++++++++++++++++- 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h index 6931f1d1d2..1cc0c8dfb8 100644 --- a/drivers/common/cnxk/hw/nix.h +++ b/drivers/common/cnxk/hw/nix.h @@ -419,6 +419,7 @@ #define NIX_STAT_LF_RX_RX_RC_OCTS_DROP (0x16ull) /* [CN10K, .) */ #define NIX_STAT_LF_RX_RX_RC_PKTS_DROP (0x17ull) /* [CN10K, .) */ #define NIX_STAT_LF_RX_RX_CPT_DROP_PKTS (0x18ull) /* [CN10K, .) */ +#define NIX_STAT_LF_RX_RX_IPSECD_DROP_PKTS (0x19ull) /* [CN10K, .) */ #define CGX_RX_PKT_CNT (0x0ull) /* [CN9K, CN10K) */ #define CGX_RX_OCT_CNT (0x1ull) /* [CN9K, CN10K) */ diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c index 756111fb1c..946cda114d 100644 --- a/drivers/common/cnxk/roc_nix_stats.c +++ b/drivers/common/cnxk/roc_nix_stats.c @@ -353,6 +353,13 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct roc_nix_xstat *xstats, xstats[count].id = count; count++; } + + for (i = 0; i < CNXK_NIX_NUM_CN10K_RX_XSTATS; i++) { + xstats[count].value = + NIX_RX_STATS(nix_cn10k_rx_xstats[i].offset); + xstats[count].id = count; + count++; + } } return count; @@ -422,6 +429,13 @@ roc_nix_xstats_names_get(struct roc_nix *roc_nix, nix_tx_xstats_rpm[i].name); count++; } + + for (i = 0; i < CNXK_NIX_NUM_CN10K_RX_XSTATS; i++) { + snprintf(xstats_names[count].name, + sizeof(xstats_names[count].name), "%s", + nix_cn10k_rx_xstats[i].name); + count++; + } } } diff --git a/drivers/common/cnxk/roc_nix_xstats.h b/drivers/common/cnxk/roc_nix_xstats.h index b0eaab78e7..c0a6f693f2 100644 --- a/drivers/common/cnxk/roc_nix_xstats.h +++ b/drivers/common/cnxk/roc_nix_xstats.h @@ -34,6 +34,23 @@ static const struct cnxk_nix_xstats_name nix_rx_xstats[] = { {"rx_drp_l3mcast", NIX_STAT_LF_RX_RX_DRP_L3MCAST}, }; +static const struct cnxk_nix_xstats_name nix_cn10k_rx_xstats[] = { + {"rx_gc_octs_pass", NIX_STAT_LF_RX_RX_GC_OCTS_PASSED}, + {"rx_gc_pkts_pass", NIX_STAT_LF_RX_RX_GC_PKTS_PASSED}, + {"rx_yc_octs_pass", NIX_STAT_LF_RX_RX_YC_OCTS_PASSED}, + {"rx_yc_pkts_pass", NIX_STAT_LF_RX_RX_YC_PKTS_PASSED}, + {"rx_rc_octs_pass", NIX_STAT_LF_RX_RX_RC_OCTS_PASSED}, + {"rx_rc_pkts_pass", NIX_STAT_LF_RX_RX_RC_PKTS_PASSED}, + {"rx_gc_octs_drop", NIX_STAT_LF_RX_RX_GC_OCTS_DROP}, + {"rx_gc_pkts_drop", NIX_STAT_LF_RX_RX_GC_PKTS_DROP}, + {"rx_yc_octs_drop", NIX_STAT_LF_RX_RX_YC_OCTS_DROP}, + {"rx_yc_pkts_drop", NIX_STAT_LF_RX_RX_YC_PKTS_DROP}, + {"rx_rc_octs_drop", NIX_STAT_LF_RX_RX_RC_OCTS_DROP}, + {"rx_rc_pkts_drop", NIX_STAT_LF_RX_RX_RC_PKTS_DROP}, + {"rx_cpt_pkts_drop", NIX_STAT_LF_RX_RX_CPT_DROP_PKTS}, + {"rx_ipsecd_pkts_drop", NIX_STAT_LF_RX_RX_IPSECD_DROP_PKTS}, +}; + static const struct cnxk_nix_xstats_name nix_q_xstats[] = { {"rq_op_re_pkts", NIX_LF_RQ_OP_RE_PKTS}, }; @@ -173,6 +190,7 @@ static const struct cnxk_nix_xstats_name nix_tx_xstats_cgx[] = { #define CNXK_NIX_NUM_TX_XSTATS_CGX PLT_DIM(nix_tx_xstats_cgx) #define CNXK_NIX_NUM_RX_XSTATS_RPM PLT_DIM(nix_rx_xstats_rpm) #define CNXK_NIX_NUM_TX_XSTATS_RPM PLT_DIM(nix_tx_xstats_rpm) +#define CNXK_NIX_NUM_CN10K_RX_XSTATS PLT_DIM(nix_cn10k_rx_xstats) #define CNXK_NIX_NUM_XSTATS_REG \ (CNXK_NIX_NUM_RX_XSTATS + CNXK_NIX_NUM_TX_XSTATS + \ @@ -182,7 +200,7 @@ static const struct cnxk_nix_xstats_name nix_tx_xstats_cgx[] = { CNXK_NIX_NUM_TX_XSTATS_CGX) #define CNXK_NIX_NUM_XSTATS_RPM \ (CNXK_NIX_NUM_XSTATS_REG + CNXK_NIX_NUM_RX_XSTATS_RPM + \ - CNXK_NIX_NUM_TX_XSTATS_RPM) + CNXK_NIX_NUM_TX_XSTATS_RPM + CNXK_NIX_NUM_CN10K_RX_XSTATS) static inline uint64_t roc_nix_num_rx_xstats(void)