From patchwork Wed Jul 6 21:46:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy McDaniel X-Patchwork-Id: 113760 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2E2C1A0540; Wed, 6 Jul 2022 23:46:40 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8D33D410E5; Wed, 6 Jul 2022 23:46:35 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mails.dpdk.org (Postfix) with ESMTP id E0D5840691; Wed, 6 Jul 2022 23:46:33 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657143994; x=1688679994; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8f9wOG+qDRJiXYCdJlWokBxU8GSbEGGxlm4YEUZX8us=; b=D5fCn9aPEiMMTsuoDcp/BWYStFgbbjYEw8qbiN7voG0xu0qjtAuA3K8w CWAYxyR0jbd3aCQnGu7peisWK3lwo+6PuFCIfvQQCqzGJZDm5VYoLfbC0 hMdUy6QBmXIUJ70su9DM30S2JhtygFHmEik8pYZNvMmNjQgUl1Scm1t1P nxad6zF8R3pi0l8niSm+ndSh0iSGYGG6P30IXdqsqKnCGyAok7kFXDhwN 0P3lerLAnXP4vY1oyyEGp36/Gb/Y3QAVvJ211FPYLlVCmE243TEtLC6Vg ZfTcw+WBgKzZs/cf4looZK1ZHTKW/lCHWQio+kGKCnU6lzkOvkDYTAzsI w==; X-IronPort-AV: E=McAfee;i="6400,9594,10400"; a="347859735" X-IronPort-AV: E=Sophos;i="5.92,251,1650956400"; d="scan'208";a="347859735" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2022 14:46:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,251,1650956400"; d="scan'208";a="650855397" Received: from txanpdk03.an.intel.com ([10.123.117.78]) by fmsmga008.fm.intel.com with ESMTP; 06 Jul 2022 14:46:31 -0700 From: Timothy McDaniel To: timothy.mcdaniel@intel.com Cc: dev@dpdk.org, jerinj@marvell.com, jerinjacobk@gmail.com, stable@dpdk.org Subject: [PATCH v2 1/2] event/dlb2: fix cq_weight array overflow Date: Wed, 6 Jul 2022 16:46:27 -0500 Message-Id: <20220706214628.2375117-2-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20220706214628.2375117-1-timothy.mcdaniel@intel.com> References: <20220706213141.2374006-2-timothy.mcdaniel@intel.com> <20220706214628.2375117-1-timothy.mcdaniel@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The cq_weight array must be sized for the maximum number of eventdev ports, not the maximum number of DLB2 load balanced ports. This commit fixes the above array sizing bug and resultant coverity warning. Coverity issue: 379234 Fixes: ffa46fc4a2b5 ("event/dlb2: support CQ weight") Cc: stable@dpdk.org Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/dlb2.c | 4 ++-- drivers/event/dlb2/dlb2_priv.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 26af75beb8..93bf215762 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -137,7 +137,7 @@ set_cq_weight(const char *key __rte_unused, */ if (sscanf(value, "all:%d", &weight) == 1) { first = 0; - last = DLB2_MAX_NUM_LDB_PORTS - 1; + last = DLB2_MAX_NUM_PORTS_ALL - 1; } else if (sscanf(value, "%d-%d:%d", &first, &last, &weight) == 3) { /* we have everything we need */ } else if (sscanf(value, "%d:%d", &first, &weight) == 2) { @@ -148,7 +148,7 @@ set_cq_weight(const char *key __rte_unused, } if (first > last || first < 0 || - last >= DLB2_MAX_NUM_LDB_PORTS) { + last >= DLB2_MAX_NUM_PORTS_ALL) { DLB2_LOG_ERR("Error parsing ldb port qe weight arg, invalid port value\n"); return -EINVAL; } diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h index 1edea83a5b..db431f7d8b 100644 --- a/drivers/event/dlb2/dlb2_priv.h +++ b/drivers/event/dlb2/dlb2_priv.h @@ -641,7 +641,7 @@ struct dlb2_qid_depth_thresholds { }; struct dlb2_cq_weight { - int limit[DLB2_MAX_NUM_LDB_PORTS]; + int limit[DLB2_MAX_NUM_PORTS_ALL]; }; struct dlb2_port_cos {