From patchwork Tue Aug 9 18:48:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 114773 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9EE67A04FD; Tue, 9 Aug 2022 20:50:41 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CF6FA42BF7; Tue, 9 Aug 2022 20:50:36 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 3DAA542BE7 for ; Tue, 9 Aug 2022 20:50:35 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 279D67Gw016173 for ; Tue, 9 Aug 2022 11:50:34 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=hFBz7uChYlGWuyc+tpRoUvNxwFxcOQCJ74e+3XenxXY=; b=DTEd93jij3vhKk4mUlSg3idVcVew1BvzjBBnxtMr0axyU5aHI1VeYc/tDJ6k8b0UYNlf oOUyzZwVNiwM/QYvILyIYmrJ8BYTU7uxw/ali1JclUu8O4VClB1HjW38i3E+fiD87bJT k+yFfx1wxM7K4x9DTIeno2iImp5nu/CJvZzKp90ob25HeYyPUyZXmzVDF8M2Vgy/qFQ3 itAki+N4gyae1RlYxFaecKcE7nwh5bCeR143GFsC3EOC2KYSkRX6Vc5jvN7Q9C3eb4YT blDIOBe5a8jFVkOZCcV16PsqfaSmSy9KuoP0DSPSkyB5nzrfcovIeWfWKmS0eJ0tL9EW RA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3huds2ukvd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Aug 2022 11:50:34 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 9 Aug 2022 11:50:32 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 9 Aug 2022 11:50:32 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id D89705B69B2; Tue, 9 Aug 2022 11:50:25 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 15/23] common/cnxk: enable aging on CN10K platform Date: Wed, 10 Aug 2022 00:18:59 +0530 Message-ID: <20220809184908.24030-15-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220809184908.24030-1-ndabilpuram@marvell.com> References: <20220809184908.24030-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: DQYCiN8WVNzykjJL2Gg0V_dmn4axhPDW X-Proofpoint-GUID: DQYCiN8WVNzykjJL2Gg0V_dmn4axhPDW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao This patch set enables aging on CNF105 variant of CN10K platform. Enables aging statistics while dumping/reset SQ statistics. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_errata.h | 3 +-- drivers/common/cnxk/roc_nix_debug.c | 19 +++++++++---------- drivers/common/cnxk/roc_nix_stats.c | 2 ++ 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/common/cnxk/roc_errata.h b/drivers/common/cnxk/roc_errata.h index 8dc372f..d3b32f1 100644 --- a/drivers/common/cnxk/roc_errata.h +++ b/drivers/common/cnxk/roc_errata.h @@ -30,8 +30,7 @@ roc_errata_npa_has_no_fc_stype_ststp(void) static inline bool roc_errata_nix_has_no_drop_aging(void) { - return (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() || - roc_model_is_cnf10kb_a0()); + return (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0()); } /* Errata IPBUNIXRX-40130 */ diff --git a/drivers/common/cnxk/roc_nix_debug.c b/drivers/common/cnxk/roc_nix_debug.c index efac7e5..bd7a5d3 100644 --- a/drivers/common/cnxk/roc_nix_debug.c +++ b/drivers/common/cnxk/roc_nix_debug.c @@ -472,22 +472,21 @@ nix_lf_sq_dump(__io struct nix_cn10k_sq_ctx_s *ctx, uint32_t *sqb_aura_p) nix_dump("W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb); nix_dump("W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb); - nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d", - ctx->vfi_lso_vld, ctx->vfi_lso_vlan1_ins_ena); + nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d", ctx->vfi_lso_vld, + ctx->vfi_lso_vlan1_ins_ena); nix_dump("W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d", ctx->vfi_lso_vlan0_ins_ena, ctx->vfi_lso_mps); - nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d", - ctx->vfi_lso_sb, ctx->vfi_lso_sizem1); + nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9: vfi_lso_sizem1\t\t%d", ctx->vfi_lso_sb, + ctx->vfi_lso_sizem1); nix_dump("W9: vfi_lso_total\t\t%d", ctx->vfi_lso_total); - nix_dump("W10: scm_lso_rem \t\t0x%" PRIx64 "", - (uint64_t)ctx->scm_lso_rem); + nix_dump("W10: scm_lso_rem \t\t0x%" PRIx64 "", (uint64_t)ctx->scm_lso_rem); nix_dump("W11: octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->octs); nix_dump("W12: pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->pkts); - nix_dump("W14: dropped_octs \t\t0x%" PRIx64 "", - (uint64_t)ctx->drop_octs); - nix_dump("W15: dropped_pkts \t\t0x%" PRIx64 "", - (uint64_t)ctx->drop_pkts); + nix_dump("W13: aged_drop_pkts \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_pkts); + nix_dump("W13: aged_drop_octs \t\t\t0x%" PRIx64 "", (uint64_t)ctx->aged_drop_octs); + nix_dump("W14: dropped_octs \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_octs); + nix_dump("W15: dropped_pkts \t\t0x%" PRIx64 "", (uint64_t)ctx->drop_pkts); *sqb_aura_p = ctx->sqb_aura; } diff --git a/drivers/common/cnxk/roc_nix_stats.c b/drivers/common/cnxk/roc_nix_stats.c index 8fd5c71..2e5071e 100644 --- a/drivers/common/cnxk/roc_nix_stats.c +++ b/drivers/common/cnxk/roc_nix_stats.c @@ -238,6 +238,8 @@ nix_stat_tx_queue_reset(struct nix *nix, uint16_t qid) aq->sq_mask.pkts = ~(aq->sq_mask.pkts); aq->sq_mask.drop_octs = ~(aq->sq_mask.drop_octs); aq->sq_mask.drop_pkts = ~(aq->sq_mask.drop_pkts); + aq->sq_mask.aged_drop_octs = ~(aq->sq_mask.aged_drop_octs); + aq->sq_mask.aged_drop_pkts = ~(aq->sq_mask.aged_drop_pkts); } rc = mbox_process(mbox);