From patchwork Tue Dec 20 14:32:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejasree Kondoj X-Patchwork-Id: 121081 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1A237A0545; Tue, 20 Dec 2022 15:33:33 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E415B42D30; Tue, 20 Dec 2022 15:32:59 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 81FBC42D2D for ; Tue, 20 Dec 2022 15:32:58 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BKEOarI019236 for ; Tue, 20 Dec 2022 06:32:57 -0800 DKIM-Signature: v=1; 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Tue, 20 Dec 2022 06:32:55 -0800 Received: from hyd1554.marvell.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 4E5673F704C; Tue, 20 Dec 2022 06:32:53 -0800 (PST) From: Tejasree Kondoj To: Akhil Goyal CC: Vidya Sagar Velumuri , Anoob Joseph , Gowrishankar Muthukrishnan , Volodymyr Fialko , Aakash Sasidharan , Subject: [PATCH 07/17] crypto/cnxk: update crypto completion code handling Date: Tue, 20 Dec 2022 20:02:22 +0530 Message-ID: <20221220143232.2519650-8-ktejasree@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221220143232.2519650-1-ktejasree@marvell.com> References: <20221220143232.2519650-1-ktejasree@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: Qebon3xLLMmJh_8Wqz4gRgI2zihkDTXC X-Proofpoint-ORIG-GUID: Qebon3xLLMmJh_8Wqz4gRgI2zihkDTXC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-20_05,2022-12-20_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vidya Sagar Velumuri Update crypto and IPsec completion handling as per microcode version OCPT-04-IE-IPSEC-MC-30-01-28-00 ci: skip_checkformat Signed-off-by: Vidya Sagar Velumuri --- drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 18 +++++++++--------- drivers/crypto/cnxk/cn10k_ipsec.c | 7 +++++-- drivers/crypto/cnxk/cn10k_ipsec.h | 1 + drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 1 + 4 files changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c index 1caa321112..5a098ffcf2 100644 --- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c +++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c @@ -801,13 +801,11 @@ cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *re struct rte_mbuf *mbuf = cop->sym->m_src; const uint16_t m_len = res->rlen; - mbuf->data_len = m_len; - mbuf->pkt_len = m_len; - switch (res->uc_compcode) { case ROC_IE_OT_UCC_SUCCESS: break; case ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM: + mbuf->ol_flags &= ~RTE_MBUF_F_RX_IP_CKSUM_GOOD; mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD; break; case ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM: @@ -819,15 +817,17 @@ cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *re RTE_MBUF_F_RX_IP_CKSUM_GOOD; break; case ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM: - mbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD; break; case ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST: + case ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN: cop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY; break; default: - plt_dp_err("Success with unknown microcode completion code"); - break; + cop->status = RTE_CRYPTO_OP_STATUS_ERROR; + return; } + mbuf->data_len = m_len; + mbuf->pkt_len = m_len; } static inline void @@ -843,7 +843,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC && cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) { - if (likely(compcode == CPT_COMP_WARN)) { + if (likely(compcode == CPT_COMP_GOOD || compcode == CPT_COMP_WARN)) { /* Success with additional info */ cn10k_cpt_sec_post_process(cop, res); } else { @@ -860,7 +860,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, return; } - if (likely(compcode == CPT_COMP_GOOD || compcode == CPT_COMP_WARN)) { + if (likely(compcode == CPT_COMP_GOOD)) { if (unlikely(uc_compcode)) { if (uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE) cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED; @@ -964,7 +964,7 @@ cn10k_cpt_crypto_adapter_vector_dequeue(uintptr_t get_work1) #ifdef CNXK_CRYPTODEV_DEBUG res.u64[0] = __atomic_load_n(&vec_infl_req->res.u64[0], __ATOMIC_RELAXED); - PLT_ASSERT(res.cn10k.compcode == CPT_COMP_WARN); + PLT_ASSERT(res.cn10k.compcode == CPT_COMP_GOOD); PLT_ASSERT(res.cn10k.uc_compcode == 0); #endif diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c index 1740a73c36..aafd461436 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.c +++ b/drivers/crypto/cnxk/cn10k_ipsec.c @@ -200,9 +200,12 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf, /* Disable IP checksum verification by default */ param1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_DISABLE; + /* Set the ip chksum flag in mbuf before enqueue. + * Reset the flag in post process in case of errors + */ if (ipsec_xfrm->options.ip_csum_enable) { - param1.s.ip_csum_disable = - ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE; + param1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE; + sec_sess->ip_csum = RTE_MBUF_F_RX_IP_CKSUM_GOOD; } /* Disable L4 checksum verification by default */ diff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h index 044fe33046..23d7a4fac4 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.h +++ b/drivers/crypto/cnxk/cn10k_ipsec.h @@ -33,6 +33,7 @@ struct cn10k_sec_session { uint16_t max_extended_len; uint16_t iv_offset; uint8_t iv_length; + uint8_t ip_csum; bool is_outbound; /** Queue pair */ struct cnxk_cpt_qp *qp; diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h index 084198b5bb..f2761a55a5 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h @@ -98,6 +98,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_sec_session *sess, struct inst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src); dptr = rte_pktmbuf_mtod(m_src, uint64_t); inst->dptr = dptr; + m_src->ol_flags |= (uint64_t)sess->ip_csum; return 0; }