From patchwork Mon Jan 16 09:39:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 122090 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2F19C423EE; Mon, 16 Jan 2023 10:41:34 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2FEAF42D31; Mon, 16 Jan 2023 10:41:10 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CB02142D2D for ; Mon, 16 Jan 2023 10:41:07 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 30G63V31032538 for ; Mon, 16 Jan 2023 01:41:07 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=0Ef0553sMITnqj257Wh0xpxNhVqxAhnXuPaYUO2xttA=; b=QayalglaBjj0agnaIJCevsnV1dB76pwz7zBPwpoTmRO55TEOzG9oqo88L8k6a5k50j4C b9s6nOOn5NfTfkNnFeUmgk0M8rCXeRAZleuajyyWCjxJpCtwrko9oNreX0pKrMkh9pB5 WiUPPNUKbuB3IQfQeFqwP/XqZP/ZEA1NbC2yMrymqCg0FK6YDhEOPYeJZWnzSeRdAFiB ue5lDaRX8xRMbbfKdtSX5HCRH5nnIxNAwlLkojHPHgCCEV+NIoKEGq/6unS+NByBlYrx /t1e4C8r1NyyL1SS+mZyAaqOnY45pLtEKql++X8F9t3dqTx/wkXCi48w7ex49Pu+sdwe ug== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3n3tmvkuk3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 16 Jan 2023 01:41:06 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 16 Jan 2023 01:41:05 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Mon, 16 Jan 2023 01:41:05 -0800 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 1630E3F7059; Mon, 16 Jan 2023 01:41:02 -0800 (PST) From: Nithin Dabilpuram To: , Nithin Dabilpuram , "Kiran Kumar K" , Sunil Kumar Kori , Satha Rao CC: , Srujana Challa Subject: [PATCH 7/9] common/cnxk: update CPT inbound inline IPsec mailbox Date: Mon, 16 Jan 2023 15:09:52 +0530 Message-ID: <20230116093954.172938-7-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230116093954.172938-1-ndabilpuram@marvell.com> References: <20230116093954.172938-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: B9PoeAKHFguafZXYyLNAKlfxIS4NHt5z X-Proofpoint-GUID: B9PoeAKHFguafZXYyLNAKlfxIS4NHt5z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.562,FMLib:17.11.122.1 definitions=2023-01-16_08,2023-01-13_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Srujana Challa Updates CPT inbound inline configuration mailbox message format to set CPT credit threshold and bpid, which are introduced for CN10KB. This patch also fixes inline inbound config read API. Fixes: 37da58509579 ("common/cnxk: update inbound inline IPsec config mailbox") Cc: schalla@marvell.com Signed-off-by: Srujana Challa --- drivers/common/cnxk/roc_cpt.c | 14 +++++++++++++- drivers/common/cnxk/roc_cpt.h | 14 ++++++++++++-- drivers/common/cnxk/roc_mbox.h | 6 +++++- 3 files changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index 48430096dc..6d3052c9be 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -268,9 +268,10 @@ roc_cpt_inline_ipsec_cfg(struct dev *cpt_dev, uint8_t lf_id, int roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, - struct nix_inline_ipsec_cfg *inb_cfg) + struct roc_cpt_inline_ipsec_inb_cfg *cfg) { struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt); + struct nix_inline_ipsec_cfg *inb_cfg; struct dev *dev = &cpt->dev; struct mbox *mbox = mbox_get(dev->mbox); struct msg_req *req; @@ -283,6 +284,17 @@ roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, } rc = mbox_process_msg(mbox, (void *)&inb_cfg); + if (rc) { + rc = -EIO; + goto exit; + } + cfg->cpt_credit = inb_cfg->cpt_credit; + cfg->egrp = inb_cfg->gen_cfg.egrp; + cfg->opcode = inb_cfg->gen_cfg.opcode; + cfg->param1 = inb_cfg->gen_cfg.param1; + cfg->param2 = inb_cfg->gen_cfg.param2; + cfg->bpid = inb_cfg->bpid; + cfg->credit_th = inb_cfg->credit_th; exit: mbox_put(mbox); return rc; diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index bc9cc19edd..96d066dee3 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -144,6 +144,16 @@ struct roc_cpt_rxc_time_cfg { uint16_t zombie_thres; }; +struct roc_cpt_inline_ipsec_inb_cfg { + uint32_t cpt_credit; + uint16_t opcode; + uint16_t param1; + uint16_t param2; + uint16_t bpid; + uint32_t credit_th; + uint8_t egrp; +}; + int __roc_api roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg); int __roc_api roc_cpt_dev_init(struct roc_cpt *roc_cpt); @@ -159,8 +169,8 @@ int __roc_api roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, void *cptr, int __roc_api roc_cpt_lf_ctx_reload(struct roc_cpt_lf *lf, void *cptr); int __roc_api roc_cpt_inline_ipsec_cfg(struct dev *dev, uint8_t slot, struct roc_nix *nix); -int __roc_api roc_cpt_inline_ipsec_inb_cfg_read( - struct roc_cpt *roc_cpt, struct nix_inline_ipsec_cfg *inb_cfg); +int __roc_api roc_cpt_inline_ipsec_inb_cfg_read(struct roc_cpt *roc_cpt, + struct roc_cpt_inline_ipsec_inb_cfg *cfg); int __roc_api roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1, uint16_t param2, uint16_t opcode); diff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h index b74eb71275..c1769567b5 100644 --- a/drivers/common/cnxk/roc_mbox.h +++ b/drivers/common/cnxk/roc_mbox.h @@ -266,7 +266,7 @@ struct mbox_msghdr { msg_rsp) \ M(NIX_RX_SW_SYNC, 0x8022, nix_rx_sw_sync, msg_req, msg_rsp) \ M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \ - msg_req, nix_inline_ipsec_cfg) \ + msg_req, nix_inline_ipsec_cfg) \ M(NIX_LF_INLINE_RQ_CFG, 0x8024, nix_lf_inline_rq_cfg, \ nix_rq_cpt_field_mask_cfg_req, msg_rsp) \ M(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \ @@ -1198,6 +1198,8 @@ struct nix_inline_ipsec_cfg { uint8_t __io cpt_slot; } inst_qsel; uint8_t __io enable; + uint16_t __io bpid; + uint32_t __io credit_th; }; /* Per NIX LF inline IPSec configuration */ @@ -1503,6 +1505,8 @@ struct cpt_rx_inline_lf_cfg_msg { uint16_t __io param2; uint16_t __io opcode; uint32_t __io credit; + uint32_t __io credit_th; + uint16_t __io bpid; uint32_t __io reserved; };