From patchwork Tue May 16 14:48:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 126891 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3678A42B24; Tue, 16 May 2023 16:48:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 108EE410EE; Tue, 16 May 2023 16:48:32 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 8A2AB40697 for ; Tue, 16 May 2023 16:48:30 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34G7SVRC021381 for ; Tue, 16 May 2023 07:48:29 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=TA60T84Jkq1/wXnK8HupklZLlHa3xPtgZNw84Eljt70=; b=G3YKbUr5v3fzqW9dj4H9uLVilQaiHUxGGrw1d/JCW0VjjDrkPfqmKBvZz6INq4Z/qQ3n LI19XLFl+V8EZNWlvjnQCIjCR/vxsWA/tDsLG4wLHa2UY1iWRcYi84ZWCoXjaunHHQMV 16zz1NjXNceT4aegDJnNX52jE9GtOdfN4p7Wjs9QP/XGNE3wC9Z/dn5LlatoMELSOQEd h7cfFGhRgxnCXsEQMA/xq/94APLrOGfbAWxdyzVicFGZKn9Ei5S6pcotyUM24QXt0gUJ K3XiLAVNe4/fvWEIMCRaA8B41FBQADbHQgHtVRqCUaCcrChZ/d0hxn7M4jfaCc2FOnY7 rQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qkvbmkt0p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 16 May 2023 07:48:29 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 16 May 2023 07:48:28 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 16 May 2023 07:48:28 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.122]) by maili.marvell.com (Postfix) with ESMTP id 68E5B3F7043; Tue, 16 May 2023 07:48:26 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH] event/cnxk: add get remaining ticks routine Date: Tue, 16 May 2023 20:18:24 +0530 Message-ID: <20230516144824.6732-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: 8ij7n0DWfPI-9sqc49rjZeR5Hne60AkB X-Proofpoint-ORIG-GUID: 8ij7n0DWfPI-9sqc49rjZeR5Hne60AkB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-16_07,2023-05-16_01,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Add support to get the remaining ticks to expire for a given event timer. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_worker.h | 6 +++++ drivers/event/cnxk/cn9k_worker.h | 4 ++++ drivers/event/cnxk/cnxk_tim_evdev.c | 1 + drivers/event/cnxk/cnxk_tim_evdev.h | 3 +++ drivers/event/cnxk/cnxk_tim_worker.c | 35 ++++++++++++++++++++++++++++ 5 files changed, 49 insertions(+) -- 2.25.1 diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index 06c71c6092..3907919135 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -5,7 +5,9 @@ #ifndef __CN10K_WORKER_H__ #define __CN10K_WORKER_H__ +#include #include + #include "cn10k_cryptodev_event_dp.h" #include "cn10k_rx.h" #include "cnxk_worker.h" @@ -213,6 +215,10 @@ cn10k_sso_hws_post_process(struct cn10k_sso_hws *ws, uint64_t *u64, /* Mark vector mempool object as get */ RTE_MEMPOOL_CHECK_COOKIES(rte_mempool_from_obj((void *)u64[1]), (void **)&u64[1], 1, 1); + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_TIMER) { + struct rte_event_timer *tim = (void *)u64[1]; + + tim->state = RTE_EVENT_TIMER_NOT_ARMED; } } diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index 1ce4b044e8..04be35de8a 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -215,6 +215,10 @@ cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mbuf, const uint32_t flags, if (flags & NIX_RX_OFFLOAD_TSTAMP_F) cn9k_sso_process_tstamp(u64[1], mbuf, tstamp[port]); u64[1] = mbuf; + } else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_TIMER) { + struct rte_event_timer *tim = (void *)u64[1]; + + tim->state = RTE_EVENT_TIMER_NOT_ARMED; } } diff --git a/drivers/event/cnxk/cnxk_tim_evdev.c b/drivers/event/cnxk/cnxk_tim_evdev.c index 121480df15..6d59fdf909 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.c +++ b/drivers/event/cnxk/cnxk_tim_evdev.c @@ -392,6 +392,7 @@ cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags, cnxk_tim_ops.start = cnxk_tim_ring_start; cnxk_tim_ops.stop = cnxk_tim_ring_stop; cnxk_tim_ops.get_info = cnxk_tim_ring_info_get; + cnxk_tim_ops.remaining_ticks_get = cnxk_tim_remaining_ticks_get; sso_set_priv_mem_fn = priv_mem_fn; if (dev->enable_stats) { diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h index 3a0b036cb4..b91fcb3aca 100644 --- a/drivers/event/cnxk/cnxk_tim_evdev.h +++ b/drivers/event/cnxk/cnxk_tim_evdev.h @@ -320,6 +320,9 @@ cnxk_tim_timer_cancel_burst(const struct rte_event_timer_adapter *adptr, struct rte_event_timer **tim, const uint16_t nb_timers); +int cnxk_tim_remaining_ticks_get(const struct rte_event_timer_adapter *adapter, + const struct rte_event_timer *evtim, uint64_t *ticks_remaining); + int cnxk_tim_caps_get(const struct rte_eventdev *dev, uint64_t flags, uint32_t *caps, const struct event_timer_adapter_ops **ops, diff --git a/drivers/event/cnxk/cnxk_tim_worker.c b/drivers/event/cnxk/cnxk_tim_worker.c index 923a72093b..d1dab0552f 100644 --- a/drivers/event/cnxk/cnxk_tim_worker.c +++ b/drivers/event/cnxk/cnxk_tim_worker.c @@ -171,3 +171,38 @@ cnxk_tim_timer_cancel_burst(const struct rte_event_timer_adapter *adptr, return index; } + +int +cnxk_tim_remaining_ticks_get(const struct rte_event_timer_adapter *adapter, + const struct rte_event_timer *evtim, uint64_t *ticks_remaining) +{ + struct cnxk_tim_ring *tim_ring = adapter->data->adapter_priv; + struct cnxk_tim_bkt *bkt, *current_bkt; + struct cnxk_tim_ent *entry; + uint64_t bkt_cyc, bucket; + uint64_t sema; + + if (evtim->impl_opaque[1] == 0 || evtim->impl_opaque[0] == 0) + return -ENOENT; + + entry = (struct cnxk_tim_ent *)(uintptr_t)evtim->impl_opaque[0]; + if (entry->wqe != evtim->ev.u64) + return -ENOENT; + + if (evtim->state != RTE_EVENT_TIMER_ARMED) + return -ENOENT; + + bkt = (struct cnxk_tim_bkt *)evtim->impl_opaque[1]; + sema = __atomic_load_n(&bkt->w1, __ATOMIC_ACQUIRE); + if (cnxk_tim_bkt_get_hbt(sema) || !cnxk_tim_bkt_get_nent(sema)) + return -ENOENT; + + bkt_cyc = tim_ring->tick_fn(tim_ring->tbase) - tim_ring->ring_start_cyc; + bucket = rte_reciprocal_divide_u64(bkt_cyc, &tim_ring->fast_div); + current_bkt = &tim_ring->bkt[bucket]; + + *ticks_remaining = RTE_MAX(bkt, current_bkt) - RTE_MIN(bkt, current_bkt); + /* Assume that the current bucket is yet to expire */ + *ticks_remaining += 1; + return 0; +}