From patchwork Thu May 25 09:58:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 127416 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1E17C42B9A; Thu, 25 May 2023 12:11:23 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B80CE42DA9; Thu, 25 May 2023 12:10:17 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id BC14B42D82 for ; Thu, 25 May 2023 12:10:14 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34PA2W0M020284 for ; Thu, 25 May 2023 03:10:14 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=FPvW2ZCf8hMabLK14AvQKjf76l7c1JJ/ZzmnBFoHcu4=; b=FPuvdbJfiO8NHMGDJWqfuVWjiOp1GVzXcE1Jc/R3hD/ZzdhPy+3MtashwaBVfuy6GR/5 wz44uZIjrVuf7cy97vGaRXvgAP6yJb+HUcOWwPFXvqNE/TYA8aMEKYvbGt6eZZeNeX1T xF7UrsrHSLKp0Ypmf+Sh5tf4Gwh1u6P3bhshNI4WpceEhNQGZai0TKcZ/oUN6exznntE 6tAoNRi00tPQgc+VvZnQdbz+Ts8oZGLuVvu0gbFSBzVao0wrLTg+lr3fNZtyBIKg7oii Ev9F1BmtfHZDGnk9hZnyH+zpF9FP6z+A8ihoP/KFMKou3Es8jEaPIX7n9E5cNm/rilQd Xw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qt5jng0pa-12 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 25 May 2023 03:10:13 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 25 May 2023 03:09:48 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 25 May 2023 03:09:48 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id C5E865B6E97; Thu, 25 May 2023 03:00:31 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH v3 25/32] common/cnxk: avoid inline dev CPT lf detach multiple times Date: Thu, 25 May 2023 15:28:57 +0530 Message-ID: <20230525095904.3967080-25-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230525095904.3967080-1-ndabilpuram@marvell.com> References: <20230411091144.1087887-1-ndabilpuram@marvell.com> <20230525095904.3967080-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: -zmVLmeMutmf2KHrfw7O5KEnYOe2mZY0 X-Proofpoint-GUID: -zmVLmeMutmf2KHrfw7O5KEnYOe2mZY0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-25_06,2023-05-24_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org CPT LF detach is done along with all other LF's of inline device. Hence remove it from nix_inl_cpt_release(). Also provide ROC API for setup and release of CPT LF separately. Signed-off-by: Nithin Dabilpuram --- drivers/common/cnxk/roc_nix_inl.h | 2 + drivers/common/cnxk/roc_nix_inl_dev.c | 59 ++++++++++++++++++++------- drivers/common/cnxk/version.map | 2 + 3 files changed, 48 insertions(+), 15 deletions(-) diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h index 885d95335e..ab1e9c0f98 100644 --- a/drivers/common/cnxk/roc_nix_inl.h +++ b/drivers/common/cnxk/roc_nix_inl.h @@ -158,6 +158,8 @@ void __roc_api roc_nix_inl_dev_unlock(void); int __roc_api roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle); int __roc_api roc_nix_inl_dev_stats_get(struct roc_nix_stats *stats); uint16_t __roc_api roc_nix_inl_dev_pffunc_get(void); +int __roc_api roc_nix_inl_dev_cpt_setup(bool use_inl_dev_sso); +int __roc_api roc_nix_inl_dev_cpt_release(void); /* NIX Inline Inbound API */ int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix); diff --git a/drivers/common/cnxk/roc_nix_inl_dev.c b/drivers/common/cnxk/roc_nix_inl_dev.c index ca948d3bc7..d76158e30d 100644 --- a/drivers/common/cnxk/roc_nix_inl_dev.c +++ b/drivers/common/cnxk/roc_nix_inl_dev.c @@ -172,7 +172,7 @@ nix_inl_nix_ipsec_cfg(struct nix_inl_dev *inl_dev, bool ena) } static int -nix_inl_cpt_setup(struct nix_inl_dev *inl_dev) +nix_inl_cpt_setup(struct nix_inl_dev *inl_dev, bool inl_dev_sso) { struct roc_cpt_lf *lf = &inl_dev->cpt_lf; struct dev *dev = &inl_dev->dev; @@ -186,7 +186,7 @@ nix_inl_cpt_setup(struct nix_inl_dev *inl_dev) eng_grpmask = (1ULL << ROC_CPT_DFLT_ENG_GRP_SE | 1ULL << ROC_CPT_DFLT_ENG_GRP_SE_IE | 1ULL << ROC_CPT_DFLT_ENG_GRP_AE); - rc = cpt_lfs_alloc(dev, eng_grpmask, RVU_BLOCK_ADDR_CPT0, false); + rc = cpt_lfs_alloc(dev, eng_grpmask, RVU_BLOCK_ADDR_CPT0, inl_dev_sso); if (rc) { plt_err("Failed to alloc CPT LF resources, rc=%d", rc); return rc; @@ -218,7 +218,7 @@ nix_inl_cpt_release(struct nix_inl_dev *inl_dev) { struct roc_cpt_lf *lf = &inl_dev->cpt_lf; struct dev *dev = &inl_dev->dev; - int rc, ret = 0; + int rc; if (!inl_dev->attach_cptlf) return 0; @@ -228,17 +228,11 @@ nix_inl_cpt_release(struct nix_inl_dev *inl_dev) /* Free LF resources */ rc = cpt_lfs_free(dev); - if (rc) + if (!rc) + lf->dev = NULL; + else plt_err("Failed to free CPT LF resources, rc=%d", rc); - ret |= rc; - - /* Detach LF */ - rc = cpt_lfs_detach(dev); - if (rc) - plt_err("Failed to detach CPT LF, rc=%d", rc); - ret |= rc; - - return ret; + return rc; } static int @@ -940,7 +934,7 @@ roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev) goto nix_release; /* Setup CPT LF */ - rc = nix_inl_cpt_setup(inl_dev); + rc = nix_inl_cpt_setup(inl_dev, false); if (rc) goto sso_release; @@ -1035,8 +1029,11 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev) /* Flush Inbound CTX cache entries */ nix_inl_cpt_ctx_cache_sync(inl_dev); + /* Release CPT */ + rc = nix_inl_cpt_release(inl_dev); + /* Release SSO */ - rc = nix_inl_sso_release(inl_dev); + rc |= nix_inl_sso_release(inl_dev); /* Release NIX */ rc |= nix_inl_nix_release(inl_dev); @@ -1052,3 +1049,35 @@ roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev) idev->nix_inl_dev = NULL; return 0; } + +int +roc_nix_inl_dev_cpt_setup(bool use_inl_dev_sso) +{ + struct idev_cfg *idev = idev_get_cfg(); + struct nix_inl_dev *inl_dev = NULL; + + if (!idev || !idev->nix_inl_dev) + return -ENOENT; + inl_dev = idev->nix_inl_dev; + + if (inl_dev->cpt_lf.dev != NULL) + return -EBUSY; + + return nix_inl_cpt_setup(inl_dev, use_inl_dev_sso); +} + +int +roc_nix_inl_dev_cpt_release(void) +{ + struct idev_cfg *idev = idev_get_cfg(); + struct nix_inl_dev *inl_dev = NULL; + + if (!idev || !idev->nix_inl_dev) + return -ENOENT; + inl_dev = idev->nix_inl_dev; + + if (inl_dev->cpt_lf.dev == NULL) + return 0; + + return nix_inl_cpt_release(inl_dev); +} diff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map index c76564b46e..e1335e9068 100644 --- a/drivers/common/cnxk/version.map +++ b/drivers/common/cnxk/version.map @@ -174,6 +174,8 @@ INTERNAL { roc_nix_inl_cb_register; roc_nix_inl_cb_unregister; roc_nix_inl_ctx_write; + roc_nix_inl_dev_cpt_setup; + roc_nix_inl_dev_cpt_release; roc_nix_inl_dev_dump; roc_nix_inl_dev_fini; roc_nix_inl_dev_init;