From patchwork Thu May 25 23:23:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 127512 X-Patchwork-Delegate: maxime.coquelin@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id A2CCC42BA1; Fri, 26 May 2023 01:29:23 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BA16442D38; Fri, 26 May 2023 01:29:04 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 3C02E42BD9 for ; Fri, 26 May 2023 01:28:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685057340; x=1716593340; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jI8mV/s+Kvg2t+9n/4A4M5LROdM7BCoqr+9a6C2fDJ0=; b=epcrI3sG+fvPH5W8XOlyPDx+UCdhntymqMsdMZaJMGSlryFzHMMWJBdy ZGW8jDxnBn++C75TtyUgg+oo2F/xW5R4qDI3SyQ1NSutrZZhhHJCW6DJO QITqGNgJSpyH8h1z7rXn9LqXqL04/iSHDDZhEhx/2h+6TfeAmfs8Rv4C2 clrlUUFfYDBiL3/1UysrTcjO/FoE3WKjLtIVwm2L+EP5Y0PdOWfCwzRp6 22YxVe3Pqq5O4wBoq2fguSnylAnvrqcgYC7+2dgITgaUIlUSBHirvaT8P KzbxRZrO9khyxeitExDFBPJpv3cvZnAtUEMl7NDSfZEhdeCVoXcRtNORY A==; X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="338653654" X-IronPort-AV: E=Sophos;i="6.00,192,1681196400"; d="scan'208";a="338653654" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 May 2023 16:28:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10721"; a="655428636" X-IronPort-AV: E=Sophos;i="6.00,192,1681196400"; d="scan'208";a="655428636" Received: from spr-npg-bds1-eec2.sn.intel.com (HELO spr-npg-bds1-eec2..) ([10.233.181.123]) by orsmga003.jf.intel.com with ESMTP; 25 May 2023 16:28:42 -0700 From: Nicolas Chautru To: dev@dpdk.org, maxime.coquelin@redhat.com Cc: trix@redhat.com, hemant.agrawal@nxp.com, david.marchand@redhat.com, hernan.vargas@intel.com, Nicolas Chautru Subject: [PATCH v1 3/4] bbdev: add new capability for FEC 5G UL processing Date: Thu, 25 May 2023 23:23:30 +0000 Message-Id: <20230525232331.34645-4-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230525232331.34645-1-nicolas.chautru@intel.com> References: <20230525232331.34645-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Extending existing LDPC UL operation for new capability. Option to compress HARQ memory to 4 bits per LLR. Signed-off-by: Nicolas Chautru --- doc/guides/prog_guide/bbdev.rst | 6 ++++++ lib/bbdev/rte_bbdev_op.h | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst index d5c7522f79..8dd7b866ad 100644 --- a/doc/guides/prog_guide/bbdev.rst +++ b/doc/guides/prog_guide/bbdev.rst @@ -903,6 +903,12 @@ given below. |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK | | Set if a device supports loopback access to HARQ internal memory | +--------------------------------------------------------------------+ +|RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS | +| Set if a device includes LLR filler bits in HARQ circular buffer | ++--------------------------------------------------------------------+ +|RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION | +|Set if a device supports input/output 4 bits HARQ compression | ++--------------------------------------------------------------------+ The structure passed for each LDPC decode operation is given below, with the operation flags forming a bitmask in the ``op_flags`` field. diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h index 682e265327..a4a2ae1440 100644 --- a/lib/bbdev/rte_bbdev_op.h +++ b/lib/bbdev/rte_bbdev_op.h @@ -203,7 +203,9 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks { * for HARQ memory. If not set, it is assumed the filler bits are not * in HARQ memory and handled directly by the LDPC decoder. */ - RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19) + RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19), + /** Set if a device supports input/output HARQ 4bits compression. */ + RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION = (1ULL << 20) }; /** Flags for LDPC encoder operation and capability structure */