From patchwork Sat May 27 08:58:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anoob Joseph X-Patchwork-Id: 127595 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2C56342BB3; Sat, 27 May 2023 11:50:35 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A919641141; Sat, 27 May 2023 11:50:34 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id A80034021D for ; Sat, 27 May 2023 11:50:33 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34R9PkET018670; Sat, 27 May 2023 02:50:31 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=bS9Asp1DjGr5Dm7D6LPLNyWdMwXO2OLPZlW/LdIhnyI=; b=RPLMYkbmFb1EBBgk9BWgH7jeIblZRg+tPY52vkktUJxxPVROKS9Fq/kk0o3o2ZLT+kC9 hAnije83fnrTY0/32t+Ukk7h+buZ85kiT/VPT9dB1i7yDOudaHMyuULkRPvqQrQMrFgC 8Z8q+4GSkbjUjRL215MxeHOIex+NHD/8itWPN8BfAU9ubCQmxevHJKZVpRI3YW3Kti7w n7NveGSmThj+ddO2xXATcbf7hBvLTY7rfcTn8PvbGp/DYkdAiP/x1VbQZ8nX70COtoa4 3WOP/g3Few5KXNzmeC3pYcvuVWApa4mgzG+tz7IXor6fBzqfM680pVoCasCDUd5hSUsG CA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3quf7p81de-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sat, 27 May 2023 02:50:31 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sat, 27 May 2023 02:50:10 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sat, 27 May 2023 02:50:10 -0700 Received: from BG-LT92004.corp.innovium.com (unknown [10.193.65.175]) by maili.marvell.com (Postfix) with ESMTP id 04A685E72CC; Sat, 27 May 2023 01:59:19 -0700 (PDT) From: Anoob Joseph To: Thomas Monjalon , Akhil Goyal , Jerin Jacob , Konstantin Ananyev CC: Volodymyr Fialko , Hemant Agrawal , =?utf-8?q?Mattias_R=C3=B6nnblom?= , Kiran Kumar K , , Olivier Matz , Stephen Hemminger Subject: [PATCH v5 01/21] net: add PDCP header Date: Sat, 27 May 2023 14:28:50 +0530 Message-ID: <20230527085910.972-2-anoobj@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230527085910.972-1-anoobj@marvell.com> References: <20230526210214.617-1-anoobj@marvell.com> <20230527085910.972-1-anoobj@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: LO_QKNP-C4whkDpxz9Wg3qHc9YDQvqal X-Proofpoint-ORIG-GUID: LO_QKNP-C4whkDpxz9Wg3qHc9YDQvqal X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-27_06,2023-05-25_03,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Volodymyr Fialko Add PDCP protocol header to be used for supporting PDCP protocol processing. Signed-off-by: Anoob Joseph Signed-off-by: Kiran Kumar K Signed-off-by: Volodymyr Fialko Acked-by: Akhil Goyal --- doc/api/doxy-api-index.md | 3 +- lib/net/meson.build | 1 + lib/net/rte_pdcp_hdr.h | 147 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 150 insertions(+), 1 deletion(-) create mode 100644 lib/net/rte_pdcp_hdr.h diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index c709fd48ad..debbe4134f 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -127,7 +127,8 @@ The public API headers are grouped by topics: [Geneve](@ref rte_geneve.h), [eCPRI](@ref rte_ecpri.h), [L2TPv2](@ref rte_l2tpv2.h), - [PPP](@ref rte_ppp.h) + [PPP](@ref rte_ppp.h), + [PDCP hdr](@ref rte_pdcp_hdr.h) - **QoS**: [metering](@ref rte_meter.h), diff --git a/lib/net/meson.build b/lib/net/meson.build index 379d161ee0..bd56f91c22 100644 --- a/lib/net/meson.build +++ b/lib/net/meson.build @@ -22,6 +22,7 @@ headers = files( 'rte_geneve.h', 'rte_l2tpv2.h', 'rte_ppp.h', + 'rte_pdcp_hdr.h', ) sources = files( diff --git a/lib/net/rte_pdcp_hdr.h b/lib/net/rte_pdcp_hdr.h new file mode 100644 index 0000000000..72ae9a66cb --- /dev/null +++ b/lib/net/rte_pdcp_hdr.h @@ -0,0 +1,147 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2023 Marvell. + */ + +#ifndef RTE_PDCP_HDR_H +#define RTE_PDCP_HDR_H + +/** + * @file + * + * PDCP-related defines + * + * Based on - ETSI TS 138 323 V17.1.0 (2022-08) + * https://www.etsi.org/deliver/etsi_ts/138300_138399/138323/17.01.00_60/ts_138323v170100p.pdf + */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * 4.3.1 + * + * Indicate the maximum supported size of a PDCP Control PDU. + */ +#define RTE_PDCP_CTRL_PDU_SIZE_MAX 9000u + +/** + * 6.3.4 MAC-I + * + * Indicate the size of MAC-I in PDCP PDU. + */ +#define RTE_PDCP_MAC_I_LEN 4 + +/** + * Indicate type of control information included in the corresponding PDCP + * Control PDU. + */ +enum rte_pdcp_ctrl_pdu_type { + RTE_PDCP_CTRL_PDU_TYPE_STATUS_REPORT = 0, + RTE_PDCP_CTRL_PDU_TYPE_ROHC_FEEDBACK = 1, + RTE_PDCP_CTRL_PDU_TYPE_EHC_FEEDBACK = 2, + RTE_PDCP_CRTL_PDU_TYPE_UDC_FEEDBACK = 3, +}; + +/** + * 6.3.7 D/C + * + * This field indicates whether the corresponding PDCP PDU is a + * PDCP Data PDU or a PDCP Control PDU. + */ +enum rte_pdcp_pdu_type { + RTE_PDCP_PDU_TYPE_CTRL = 0, + RTE_PDCP_PDU_TYPE_DATA = 1, +}; + +/** + * 6.2.2.1 Data PDU for SRBs + */ +__extension__ +struct rte_pdcp_cp_data_pdu_sn_12_hdr { +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ + uint8_t r : 4; /**< Reserved */ +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint8_t r : 4; /**< Reserved */ + uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ +#endif + uint8_t sn_7_0; /**< Sequence number bits 0-7 */ +} __rte_packed; + +/** + * 6.2.2.2 Data PDU for DRBs and MRBs with 12 bits PDCP SN + */ +__extension__ +struct rte_pdcp_up_data_pdu_sn_12_hdr { +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ + uint8_t r : 3; /**< Reserved */ + uint8_t d_c : 1; /**< D/C bit */ +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint8_t d_c : 1; /**< D/C bit */ + uint8_t r : 3; /**< Reserved */ + uint8_t sn_11_8 : 4; /**< Sequence number bits 8-11 */ +#endif + uint8_t sn_7_0; /**< Sequence number bits 0-7 */ +} __rte_packed; + +/** + * 6.2.2.3 Data PDU for DRBs and MRBs with 18 bits PDCP SN + */ +__extension__ +struct rte_pdcp_up_data_pdu_sn_18_hdr { +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */ + uint8_t r : 5; /**< Reserved */ + uint8_t d_c : 1; /**< D/C bit */ +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint8_t d_c : 1; /**< D/C bit */ + uint8_t r : 5; /**< Reserved */ + uint8_t sn_17_16 : 2; /**< Sequence number bits 16-17 */ +#endif + uint8_t sn_15_8; /**< Sequence number bits 8-15 */ + uint8_t sn_7_0; /**< Sequence number bits 0-7 */ +} __rte_packed; + +/** + * 6.2.3.1 Control PDU for PDCP status report + */ +__extension__ +struct rte_pdcp_up_ctrl_pdu_hdr { +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN + uint8_t r : 4; /**< Reserved */ + uint8_t pdu_type : 3; /**< Control PDU type */ + uint8_t d_c : 1; /**< D/C bit */ +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN + uint8_t d_c : 1; /**< D/C bit */ + uint8_t pdu_type : 3; /**< Control PDU type */ + uint8_t r : 4; /**< Reserved */ +#endif + /** + * 6.3.9 FMC + * + * First Missing COUNT. This field indicates the COUNT value of the + * first missing PDCP SDU within the reordering window, i.e. RX_DELIV. + */ + rte_be32_t fmc; + /** + * 6.3.10 Bitmap + * + * Length: Variable. The length of the bitmap field can be 0. + * + * This field indicates which SDUs are missing and which SDUs are + * correctly received in the receiving PDCP entity. The bit position of + * Nth bit in the Bitmap is N, i.e., the bit position of the first bit + * in the Bitmap is 1. + */ + uint8_t bitmap[]; +} __rte_packed; + +#ifdef __cplusplus +} +#endif + +#endif /* RTE_PDCP_HDR_H */