From patchwork Thu Aug 24 08:30:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Marchand X-Patchwork-Id: 130700 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B952A430EE; Thu, 24 Aug 2023 10:30:44 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4AA3F410EE; Thu, 24 Aug 2023 10:30:44 +0200 (CEST) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mails.dpdk.org (Postfix) with ESMTP id C154540EE1 for ; Thu, 24 Aug 2023 10:30:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1692865842; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=/WPbb2gyNQeb4nGYwG3EpEmEW/zcEyvvE12W7OudfQk=; b=HaAmSTK6+u2Rf2DbObLRW/VK/aVgkHGnNmcwieXWjk4vfEFVhu6ERyjv1mlBSL8CioRbBZ fHlss1+OkIYHc915SudUrLnFbVDRL5s32RprUrWzd4El2SgNQXKyBNfXZ/hmeTaySvv1gH qeG5K9dhuSvTmopVCEc9aiSP4WccxWg= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-290-ZeSLQ7AfPsyhYvUBevGZwA-1; Thu, 24 Aug 2023 04:30:38 -0400 X-MC-Unique: ZeSLQ7AfPsyhYvUBevGZwA-1 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.rdu2.redhat.com [10.11.54.2]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 6B365185A793; Thu, 24 Aug 2023 08:30:38 +0000 (UTC) Received: from dmarchan.redhat.com (unknown [10.45.225.147]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3D24F40D2839; Thu, 24 Aug 2023 08:30:37 +0000 (UTC) From: David Marchand To: dev@dpdk.org Cc: roretzla@linux.microsoft.com, Ruifeng Wang , David Christensen , Bruce Richardson , Konstantin Ananyev Subject: [PATCH] remove wrappers for GCC < 4.8 Date: Thu, 24 Aug 2023 10:30:34 +0200 Message-ID: <20230824083034.806773-1-david.marchand@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.2 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org As we made our move to C11, GCC requirements has been bumped. Wrappers for old versions of GCC can be dropped. Signed-off-by: David Marchand Acked-by: Bruce Richardson --- lib/eal/arm/include/rte_byteorder.h | 19 ------------------- lib/eal/arm/include/rte_vect.h | 12 ------------ lib/eal/include/generic/rte_byteorder.h | 2 -- lib/eal/include/rte_debug.h | 4 ---- lib/eal/ppc/include/rte_byteorder.h | 9 --------- lib/eal/x86/include/rte_byteorder.h | 8 -------- lib/eal/x86/include/rte_vect.h | 9 +-------- lib/log/rte_log.h | 4 ---- 8 files changed, 1 insertion(+), 66 deletions(-) diff --git a/lib/eal/arm/include/rte_byteorder.h b/lib/eal/arm/include/rte_byteorder.h index df2f1d87ba..ff02052f2e 100644 --- a/lib/eal/arm/include/rte_byteorder.h +++ b/lib/eal/arm/include/rte_byteorder.h @@ -17,25 +17,6 @@ extern "C" { #include #include "generic/rte_byteorder.h" -/* fix missing __builtin_bswap16 for gcc older then 4.8 */ -#if !(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)) - -static inline uint16_t rte_arch_bswap16(uint16_t _x) -{ - uint16_t x = _x; - - asm volatile ("rev16 %w0,%w1" - : "=r" (x) - : "r" (x) - ); - return x; -} - -#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \ - rte_constant_bswap16(x) : \ - rte_arch_bswap16(x))) -#endif - /* ARM architecture is bi-endian (both big and little). */ #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN diff --git a/lib/eal/arm/include/rte_vect.h b/lib/eal/arm/include/rte_vect.h index 4b705bac5f..8cfe4bddc1 100644 --- a/lib/eal/arm/include/rte_vect.h +++ b/lib/eal/arm/include/rte_vect.h @@ -83,18 +83,6 @@ vcopyq_laneq_u32(uint32x4_t a, const int lane_a, #if defined(RTE_ARCH_ARM64) #if RTE_CC_IS_GNU && (GCC_VERSION < 70000) -#if (GCC_VERSION < 40900) -typedef uint64_t poly64_t; -typedef uint64x2_t poly64x2_t; -typedef uint8_t poly128_t __attribute__((vector_size(16), aligned(16))); - -static inline uint32x4_t -vceqzq_u32(uint32x4_t a) -{ - return (a == 0); -} -#endif - /* NEON intrinsic vreinterpretq_u64_p128() is supported since GCC version 7 */ static inline uint64x2_t vreinterpretq_u64_p128(poly128_t x) diff --git a/lib/eal/include/generic/rte_byteorder.h b/lib/eal/include/generic/rte_byteorder.h index a67e1d70d9..03e9a24718 100644 --- a/lib/eal/include/generic/rte_byteorder.h +++ b/lib/eal/include/generic/rte_byteorder.h @@ -234,9 +234,7 @@ static uint64_t rte_be_to_cpu_64(rte_be64_t x); #endif /* __DOXYGEN__ */ #ifdef RTE_FORCE_INTRINSICS -#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) #define rte_bswap16(x) __builtin_bswap16(x) -#endif #define rte_bswap32(x) __builtin_bswap32(x) diff --git a/lib/eal/include/rte_debug.h b/lib/eal/include/rte_debug.h index 2c4b94a7c9..74593cd4d4 100644 --- a/lib/eal/include/rte_debug.h +++ b/lib/eal/include/rte_debug.h @@ -60,11 +60,7 @@ void rte_dump_stack(void); * documentation. */ void __rte_panic(const char *funcname , const char *format, ...) -#ifdef __GNUC__ -#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 2)) __rte_cold -#endif -#endif __rte_noreturn __rte_format_printf(2, 3); diff --git a/lib/eal/ppc/include/rte_byteorder.h b/lib/eal/ppc/include/rte_byteorder.h index 49f369f1e7..de94e2ad32 100644 --- a/lib/eal/ppc/include/rte_byteorder.h +++ b/lib/eal/ppc/include/rte_byteorder.h @@ -62,15 +62,6 @@ static inline uint64_t rte_arch_bswap64(uint64_t _x) #define rte_bswap64(x) ((uint64_t)(__builtin_constant_p(x) ? \ rte_constant_bswap64(x) : \ rte_arch_bswap64(x))) -#else -/* - * __builtin_bswap16 is only available gcc 4.8 and upwards - */ -#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8) -#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \ - rte_constant_bswap16(x) : \ - rte_arch_bswap16(x))) -#endif #endif /* Power 8 have both little endian and big endian mode diff --git a/lib/eal/x86/include/rte_byteorder.h b/lib/eal/x86/include/rte_byteorder.h index a2dfecc1f5..57253d356a 100644 --- a/lib/eal/x86/include/rte_byteorder.h +++ b/lib/eal/x86/include/rte_byteorder.h @@ -60,14 +60,6 @@ static inline uint32_t rte_arch_bswap32(uint32_t _x) rte_constant_bswap64(x) : \ rte_arch_bswap64(x))) #else -/* - * __builtin_bswap16 is only available gcc 4.8 and upwards - */ -#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8) -#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \ - rte_constant_bswap16(x) : \ - rte_arch_bswap16(x))) -#endif #endif #define rte_cpu_to_le_16(x) (x) diff --git a/lib/eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h index 2e40b77da9..560f9e4db3 100644 --- a/lib/eal/x86/include/rte_vect.h +++ b/lib/eal/x86/include/rte_vect.h @@ -16,20 +16,13 @@ #include #include "generic/rte_vect.h" -#if (defined(__ICC) || \ - (defined(_WIN64)) || \ - (__GNUC__ == 4 && __GNUC_MINOR__ < 4)) - +#if defined(__ICC) || defined(_WIN64) #include /* SSE4 */ - #if defined(__AVX__) #include #endif - #else - #include - #endif #ifdef __cplusplus diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h index bdefff2a59..f7a8405de9 100644 --- a/lib/log/rte_log.h +++ b/lib/log/rte_log.h @@ -277,11 +277,7 @@ void rte_log_dump(FILE *f); * - Negative on error. */ int rte_log(uint32_t level, uint32_t logtype, const char *format, ...) -#ifdef __GNUC__ -#if (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ > 2)) __rte_cold -#endif -#endif __rte_format_printf(3, 4); /**