[08/10] net/mlx5/hws: allow jump to TIR over FDB

Message ID 20231031122512.434686-9-getelson@nvidia.com (mailing list archive)
State Rejected
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5/hws: IPSEC reparse submission |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Gregory Etelson Oct. 31, 2023, 12:25 p.m. UTC
  From: Alex Vesker <valex@nvidia.com>

Current TIR action is allowed to be used only for NIC RX,
this will allow TIR action over FDB for RX traffic in case
of TX traffic packets will be dropped.

Signed-off-by: Alex Vesker <valex@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h       |  2 ++
 drivers/net/mlx5/hws/mlx5dr_action.c | 27 ++++++++++++++++++++++-----
 drivers/net/mlx5/hws/mlx5dr_cmd.c    |  4 ++++
 drivers/net/mlx5/hws/mlx5dr_cmd.h    |  1 +
 4 files changed, 29 insertions(+), 5 deletions(-)
  

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index 40e461cb82..bb2b990d5b 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -2418,6 +2418,8 @@  struct mlx5_ifc_wqe_based_flow_table_cap_bits {
 	u8 reserved_at_180[0x10];
 	u8 ste_format_gen_wqe[0x10];
 	u8 linear_match_definer_reg_c3[0x20];
+	u8 fdb_jump_to_tir_stc[0x1];
+	u8 reserved_at_1c1[0x1f];
 };
 
 union mlx5_ifc_hca_cap_union_bits {
diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c
index 1a6296a728..05b6e97576 100644
--- a/drivers/net/mlx5/hws/mlx5dr_action.c
+++ b/drivers/net/mlx5/hws/mlx5dr_action.c
@@ -445,6 +445,7 @@  mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
 		break;
 
 	case MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION:
+		/* Encrypt is allowed on RX side, requires mask in case of FDB */
 		if (fw_tbl_type == FS_FT_FDB_RX) {
 			fixup_stc_attr->action_type = MLX5_IFC_STC_ACTION_TYPE_NOP;
 			fixup_stc_attr->action_offset = stc_attr->action_offset;
@@ -454,6 +455,7 @@  mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
 		break;
 
 	case MLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION:
+		/* Decrypt is allowed on TX side, requires mask in case of FDB */
 		if (fw_tbl_type == FS_FT_FDB_TX) {
 			fixup_stc_attr->action_type = MLX5_IFC_STC_ACTION_TYPE_NOP;
 			fixup_stc_attr->action_offset = stc_attr->action_offset;
@@ -463,12 +465,10 @@  mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
 		break;
 
 	case MLX5_IFC_STC_ACTION_TYPE_TRAILER:
-		if (table_type != MLX5DR_TABLE_TYPE_FDB)
-			break;
-
+		/* Trailer has FDB limitations on RX and TX based on operation */
 		val = stc_attr->reformat_trailer.op;
-		if ((val == MLX5DR_ACTION_TRAILER_OP_INSERT && !is_mirror) ||
-		    (val == MLX5DR_ACTION_TRAILER_OP_REMOVE && is_mirror)) {
+		if ((val == MLX5DR_ACTION_TRAILER_OP_INSERT && fw_tbl_type == FS_FT_FDB_RX) ||
+		    (val == MLX5DR_ACTION_TRAILER_OP_REMOVE && fw_tbl_type == FS_FT_FDB_TX)) {
 			fixup_stc_attr->action_type = MLX5_IFC_STC_ACTION_TYPE_NOP;
 			fixup_stc_attr->action_offset = stc_attr->action_offset;
 			fixup_stc_attr->stc_offset = stc_attr->stc_offset;
@@ -476,6 +476,16 @@  mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,
 		}
 		break;
 
+	case MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_TIR:
+		/* TIR is allowed on RX side, requires mask in case of FDB */
+		if (fw_tbl_type == FS_FT_FDB_TX) {
+			fixup_stc_attr->action_type = MLX5_IFC_STC_ACTION_TYPE_DROP;
+			fixup_stc_attr->action_offset = MLX5DR_ACTION_OFFSET_HIT;
+			fixup_stc_attr->stc_offset = stc_attr->stc_offset;
+			use_fixup = true;
+		}
+		break;
+
 	default:
 		break;
 	}
@@ -976,6 +986,13 @@  mlx5dr_action_create_dest_tir(struct mlx5dr_context *ctx,
 		return NULL;
 	}
 
+	if ((flags & MLX5DR_ACTION_FLAG_ROOT_FDB) ||
+	    (flags & MLX5DR_ACTION_FLAG_HWS_FDB && !ctx->caps->fdb_tir_stc)) {
+		DR_LOG(ERR, "TIR action not support on FDB");
+		rte_errno = ENOTSUP;
+		return NULL;
+	}
+
 	if (!is_local) {
 		DR_LOG(ERR, "TIR should be created on local ibv_device, flags: 0x%x",
 		       flags);
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 0ba4774f08..135d31dca1 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -1275,6 +1275,10 @@  int mlx5dr_cmd_query_caps(struct ibv_context *ctx,
 		caps->supp_ste_format_gen_wqe = MLX5_GET(query_hca_cap_out, out,
 							 capability.wqe_based_flow_table_cap.
 							 ste_format_gen_wqe);
+
+		caps->fdb_tir_stc = MLX5_GET(query_hca_cap_out, out,
+					     capability.wqe_based_flow_table_cap.
+					     fdb_jump_to_tir_stc);
 	}
 
 	if (caps->eswitch_manager) {
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h
index c082157538..cb27212a5b 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h
@@ -241,6 +241,7 @@  struct mlx5dr_cmd_query_caps {
 	uint8_t log_header_modify_argument_granularity;
 	uint8_t log_header_modify_argument_max_alloc;
 	uint8_t sq_ts_format;
+	uint8_t fdb_tir_stc;
 	uint64_t definer_format_sup;
 	uint32_t trivial_match_definer;
 	uint32_t vhca_id;