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Thu, 25 Jan 2024 05:31:40 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH v2 21/23] net/mlx5: add GENEVE option support for group 0 Date: Thu, 25 Jan 2024 15:30:41 +0200 Message-ID: <20240125133043.575860-22-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240125133043.575860-1-michaelba@nvidia.com> References: <20231203112543.844014-1-michaelba@nvidia.com> <20240125133043.575860-1-michaelba@nvidia.com> MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3C:EE_|DM4PR12MB5358:EE_ X-MS-Office365-Filtering-Correlation-Id: 1a021e24-4af0-408a-0ce2-08dc1da9f806 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ykQXNKnfDvl9VbX3wlaS0o8GivugZqMFUhDjhBLhhdB/3ObiuzdTttfaVbRSYmwwHDJKawSIlYLJCLdLypPwG7NSxSgkB8PlAQd3oqVpAKLrmd/AvNw5Hfn0/1j2oty770KOGztwNm8KCmW08hHtUhWgV04+y46LgPnJWkvW6T5YSeM3hAnEWuz8XFcjmhX7/IYs/1JLb2MwMwpM7iZGPT13erqvu4lxNHqlzxvMvPzr0UwnLMbZlaHnkUbXkaNDwVbKU75QEzskVYVmIY1DbRkIuXH9YYBFyOtPhiNr3s/JgcUfolUpZ6Uat5cbf/FNCdYFDJYo/p5pSEPD5DS0eqEYRxJoroV0sch9JLo5qO4IkV3bx+8VOThIbTb2JXpFiPToxYLKkDqVKxWCrmthzGdHqvsFlgOECrgYMK7Einb9QKLQy3HOib3+rVHIt58+k++T/SVSJnqKxnenBwM6vzXk/JbOyGhrBYigSuxzwhxJ06O6SZ9hnGtp5byvqW6QNWCKHhuOPU101JcH+Snw9+ErNPK9TwzFY0NB7SxNIWeAkHIcq7XlsDIskyajkQzEl5YdZDpAuUbmnlMX3KbCFgKBdtv3CiHrOBm3I5GkS77p5wsIsVZzesYaRqqKWxPkY7lNXbkZXqawpi81GbnW+HBLiCUtozxhgRCwNhtYheGAP9DR/lm6GhYP9Fm+oBQ3E47I0+Du35suZUgDV8G5a+xDg0Nf17p80hBn0UnXs5YmLnIYsJL6pW9KbJi08ySq X-Forefront-Antispam-Report: CIP:216.228.118.232; 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Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5358 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for HWS GENEVE options for flex parser profile 0 and group 0. This patch avoids parser creation during matcher/flow preparation for HW steering (MLX5_SET_MATCHER_HS) and removes some logic done in "flow_dev_geneve_tlv_option_resource_*()" functions when dv_flow_en=2. After this change, those functions became static and they were removed from header file. Signed-off-by: Michael Baum Acked-by: Suanming Mou --- drivers/net/mlx5/mlx5.c | 8 +------- drivers/net/mlx5/mlx5_flow.h | 4 ---- drivers/net/mlx5/mlx5_flow_dv.c | 24 +++++++++++------------- 3 files changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 5f8af31aea..881c42a97a 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -2049,13 +2049,7 @@ mlx5_free_shared_dev_ctx(struct mlx5_dev_ctx_shared *sh) } while (++i <= sh->bond.n_port); if (sh->td) claim_zero(mlx5_devx_cmd_destroy(sh->td)); -#ifdef HAVE_MLX5_HWS_SUPPORT - /* HWS manages geneve_tlv_option resource as global. */ - if (sh->config.dv_flow_en == 2) - flow_dev_geneve_tlv_option_resource_release(sh); - else -#endif - MLX5_ASSERT(sh->geneve_tlv_option_resource == NULL); + MLX5_ASSERT(sh->geneve_tlv_option_resource == NULL); pthread_mutex_destroy(&sh->txpp.mutex); mlx5_lwm_unset(sh); mlx5_physical_device_destroy(sh->phdev); diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 0459472fe4..655e4d3d86 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -2832,10 +2832,6 @@ void flow_hw_grp_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry); struct mlx5_aso_age_action *flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx); -int flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev, - const struct rte_flow_item *item, - struct rte_flow_error *error); -void flow_dev_geneve_tlv_option_resource_release(struct mlx5_dev_ctx_shared *sh); void flow_release_workspace(void *data); int mlx5_flow_os_init_workspace_once(void); diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index ae10981165..857813368b 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -9998,7 +9998,7 @@ flow_dv_translate_item_geneve(void *key, const struct rte_flow_item *item, /** * Create Geneve TLV option resource. * - * @param dev[in, out] + * @param[in, out] dev * Pointer to rte_eth_dev structure. * @param[in] item * Flow pattern to translate. @@ -10008,8 +10008,7 @@ flow_dv_translate_item_geneve(void *key, const struct rte_flow_item *item, * @return * 0 on success otherwise -errno and errno is set. */ - -int +static int flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev, const struct rte_flow_item *item, struct rte_flow_error *error) @@ -10022,6 +10021,7 @@ flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev, const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec; int ret = 0; + MLX5_ASSERT(sh->config.dv_flow_en == 1); if (!geneve_opt_v) return -1; rte_spinlock_lock(&sh->geneve_tlv_opt_sl); @@ -10032,13 +10032,8 @@ flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev, geneve_opt_v->option_type && geneve_opt_resource->length == geneve_opt_v->option_len) { - /* - * We already have GENEVE TLV option obj allocated. - * Increasing refcnt only in SWS. HWS uses it as global. - */ - if (priv->sh->config.dv_flow_en == 1) - __atomic_fetch_add(&geneve_opt_resource->refcnt, 1, - __ATOMIC_RELAXED); + __atomic_fetch_add(&geneve_opt_resource->refcnt, 1, + __ATOMIC_RELAXED); } else { ret = rte_flow_error_set(error, ENOMEM, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, @@ -10117,8 +10112,11 @@ flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *key, return -1; MLX5_ITEM_UPDATE(item, key_type, geneve_opt_v, geneve_opt_m, &rte_flow_item_geneve_opt_mask); - /* Register resource requires item spec. */ - if (key_type & MLX5_SET_MATCHER_V) { + /* + * Register resource requires item spec for SW steering, + * for HW steering resources is registered explicitly by user. + */ + if (key_type & MLX5_SET_MATCHER_SW_V) { ret = flow_dev_geneve_tlv_option_resource_register(dev, item, error); if (ret) { @@ -15900,7 +15898,7 @@ flow_dv_dest_array_resource_release(struct rte_eth_dev *dev, &resource->entry); } -void +static void flow_dev_geneve_tlv_option_resource_release(struct mlx5_dev_ctx_shared *sh) { struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =