[v4,15/21] common/idpf: add wmb before tail

Message ID 20240618105722.2326987-16-soumyadeep.hore@intel.com (mailing list archive)
State Superseded
Delegated to: Bruce Richardson
Headers
Series Update MEV TS Base Driver |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Soumyadeep Hore June 18, 2024, 10:57 a.m. UTC
  Introduced through customer's feedback in their attempt to address some
bugs this introduces a memory barrier before posting ctlq tail. This
makes sure memory writes have a chance to take place before HW starts
messing with the descriptors.

Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/common/idpf/base/idpf_controlq.c | 2 ++
 1 file changed, 2 insertions(+)
  

Patch

diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c
index 65e5599614..4f47759a4f 100644
--- a/drivers/common/idpf/base/idpf_controlq.c
+++ b/drivers/common/idpf/base/idpf_controlq.c
@@ -604,6 +604,8 @@  int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq,
 			/* Wrap to end of end ring since current ntp is 0 */
 			cq->next_to_post = cq->ring_size - 1;
 
+		idpf_wmb();
+
 		wr32(hw, cq->reg.tail, cq->next_to_post);
 	}