Message ID | 20240814104933.14062-11-bruce.richardson@intel.com (mailing list archive) |
---|---|
State | New |
Delegated to: | Thomas Monjalon |
Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0CD49457C0; Wed, 14 Aug 2024 12:51:09 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D7C7D427AA; Wed, 14 Aug 2024 12:50:34 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id ADE7542D91 for <dev@dpdk.org>; Wed, 14 Aug 2024 12:50:31 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1723632632; x=1755168632; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rPDEjrW5CIProqAoRtk6UF4BP1CH+fFx0rYBbDb3rqE=; b=U9D6HCJPuaKgsc7tkoT+KUrISQQTpTgjwl/oJbvApG/bcVTqP6BQ+NKy f/UguXXTCm6f8DgSVWd6Bf9xH89Q69wZOa0MYxehN17M/RO33uAX/HyoI 2b5ytHE69YP1RT48VLyTG8VPthlKu/bitR3U2Al98yBojvBRf9AfT82wE W3KLZHVQdoyYmFtu9mMpDsx397f92eRO6cMJKLo+chwNheQVjMPwkNodk u6Bz4dGgDSkaMRlSzvCLqxghpHuFKf6Xv4xLUovahH3KJn4+PUUD9VAjx isZx6PNuV5g/xVewfGTvCuGz5QBol6MCh7S8GY1ipqlfKftv7D0c6RTpo A==; X-CSE-ConnectionGUID: 6vgI1teWQIu8P+ISinO/Zg== X-CSE-MsgGUID: 7rP1G8lzQ8SKQ0CHkJ0jQA== X-IronPort-AV: E=McAfee;i="6700,10204,11163"; a="44360301" X-IronPort-AV: E=Sophos;i="6.09,145,1716274800"; d="scan'208";a="44360301" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2024 03:50:31 -0700 X-CSE-ConnectionGUID: Tt8k5D+xS86ayqJ9mehVSg== X-CSE-MsgGUID: J4QulTf+TBm939VvWoGUDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,145,1716274800"; d="scan'208";a="96481713" Received: from unknown (HELO silpixa00401385.ir.intel.com) ([10.237.214.25]) by orviesa001.jf.intel.com with ESMTP; 14 Aug 2024 03:50:30 -0700 From: Bruce Richardson <bruce.richardson@intel.com> To: dev@dpdk.org Cc: ferruh.yigit@amd.com, thomas@monjalon.net, mb@smartsharesystems.com, Bruce Richardson <bruce.richardson@intel.com> Subject: [PATCH v3 10/26] net/af_xdp: use separate Rx and Tx queue limits Date: Wed, 14 Aug 2024 11:49:16 +0100 Message-ID: <20240814104933.14062-11-bruce.richardson@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240814104933.14062-1-bruce.richardson@intel.com> References: <20240812132910.162252-1-bruce.richardson@intel.com> <20240814104933.14062-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org |
Series |
add meson config options for queues per port
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Checks
Context | Check | Description |
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ci/checkpatch | success | coding style OK |
Commit Message
Bruce Richardson
Aug. 14, 2024, 10:49 a.m. UTC
Update driver to use the new defines RTE_MAX_ETHPORT_TX_QUEUES and RTE_MAX_ETHPORT_RX_QUEUES rather than the old define RTE_MAX_QUEUES_PER_PORT. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Acked-by: Morten Brørup <mb@smartsharesystems.com> --- drivers/net/af_xdp/rte_eth_af_xdp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/af_xdp/rte_eth_af_xdp.c b/drivers/net/af_xdp/rte_eth_af_xdp.c index 0bc0d9a55a..1cc8b40acc 100644 --- a/drivers/net/af_xdp/rte_eth_af_xdp.c +++ b/drivers/net/af_xdp/rte_eth_af_xdp.c @@ -185,7 +185,7 @@ struct pmd_internals { }; struct pmd_process_private { - int rxq_xsk_fds[RTE_MAX_QUEUES_PER_PORT]; + int rxq_xsk_fds[RTE_MAX_ETHPORT_RX_QUEUES]; }; #define ETH_AF_XDP_IFACE_ARG "iface"