diff mbox series

[v1,4/9] common/iavf: define the maximum MSIX index

Message ID 20240910101224.497044-5-soumyadeep.hore@intel.com (mailing list archive)
State Accepted
Delegated to: Bruce Richardson
Headers
Series Update IAVF Base Driver |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Soumyadeep Hore Sept. 10, 2024, 10:12 a.m. UTC 
From: Ahmed Zaki <ahmed.zaki@intel.com>

The iAVF 1.1 standard defines the maximum number of interrupts to be 64.
Following other defines in iavf_resgister.h, define the VFINT_DYN_MAX_INDEX
to be 63. This will allow us to check the maximum number of interrupts
that we can ask from the OS.

Signed-off-by: Ahmed Zaki <ahmed.zaki@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/common/iavf/iavf_register.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/common/iavf/iavf_register.h b/drivers/common/iavf/iavf_register.h
index 328100138d..96df411e06 100644
--- a/drivers/common/iavf/iavf_register.h
+++ b/drivers/common/iavf/iavf_register.h
@@ -51,7 +51,8 @@ 
 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_ENA_MASK  IAVF_MASK(1UL, IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_ENA_SHIFT)
 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_SHIFT     25
 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_MASK      IAVF_MASK(0x3, IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_SHIFT)
-#define IAVF_VFINT_DYN_CTLN1(_INTVF)               (0x00003800 + ((_INTVF) * 4)) /* _i=0...15 */ /* Reset: VFR */
+#define IAVF_VFINT_DYN_CTLN1_MAX_INDEX             63
+#define IAVF_VFINT_DYN_CTLN1(_INTVF)  (0x00003800 + ((_INTVF) * 4)) /* _i=0...63 */ /* Reset: VFR */
 #define IAVF_VFINT_DYN_CTLN1_INTENA_SHIFT          0
 #define IAVF_VFINT_DYN_CTLN1_INTENA_MASK           IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_INTENA_SHIFT)
 #define IAVF_VFINT_DYN_CTLN1_CLEARPBA_SHIFT        1