Message ID | 20240918134623.8441-4-viacheslavo@nvidia.com (mailing list archive) |
---|---|
State | Awaiting Upstream |
Delegated to: | Raslan Darawsheh |
Headers |
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Series |
net/mlx5: cumulative fix series for flex item
|
|
Checks
Context | Check | Description |
---|---|---|
ci/checkpatch | success | coding style OK |
Commit Message
Viacheslav Ovsiienko
Sept. 18, 2024, 1:46 p.m. UTC
The RTE flex item can represent the tunnel header and
split the inner and outer layer items. HWS did not
support this flex item specifics.
Fixes: 8c0ca7527bc8 ("net/mlx5/hws: support flex item matching")
Cc: stable@dpdk.org
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
Comments
> -----Original Message----- > From: Slava Ovsiienko <viacheslavo@nvidia.com> > Sent: Wednesday, September 18, 2024 15:46 > To: dev@dpdk.org > Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh > <rasland@nvidia.com>; Ori Kam <orika@nvidia.com>; Dariusz Sosnowski > <dsosnowski@nvidia.com>; stable@dpdk.org > Subject: [PATCH v2 3/9] net/mlx5/hws: fix flex item support as tunnel header > > The RTE flex item can represent the tunnel header and split the inner and outer > layer items. HWS did not support this flex item specifics. > > Fixes: 8c0ca7527bc8 ("net/mlx5/hws: support flex item matching") > Cc: stable@dpdk.org > > Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > --- > drivers/net/mlx5/hws/mlx5dr_definer.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c > b/drivers/net/mlx5/hws/mlx5dr_definer.c > index 51a3f7be4b..2dfcc5eba6 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_definer.c > +++ b/drivers/net/mlx5/hws/mlx5dr_definer.c > @@ -3267,8 +3267,17 @@ mlx5dr_definer_conv_items_to_hl(struct > mlx5dr_context *ctx, > break; > case RTE_FLOW_ITEM_TYPE_FLEX: > ret = mlx5dr_definer_conv_item_flex_parser(&cd, > items, i); > - item_flags |= cd.tunnel ? > MLX5_FLOW_ITEM_INNER_FLEX : > - > MLX5_FLOW_ITEM_OUTER_FLEX; > + if (ret == 0) { > + enum rte_flow_item_flex_tunnel_mode > tunnel_mode = > + > FLEX_TUNNEL_MODE_SINGLE; > + > + ret = mlx5_flex_get_tunnel_mode(items, > &tunnel_mode); > + if (tunnel_mode == > FLEX_TUNNEL_MODE_TUNNEL) > + item_flags |= > MLX5_FLOW_ITEM_FLEX_TUNNEL; > + else > + item_flags |= cd.tunnel ? > MLX5_FLOW_ITEM_INNER_FLEX : > + > MLX5_FLOW_ITEM_OUTER_FLEX; > + } > break; > case RTE_FLOW_ITEM_TYPE_MPLS: > ret = mlx5dr_definer_conv_item_mpls(&cd, items, i); > -- > 2.34.1 Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com> Resending the Ack for each patch separately, because patchwork assigned my Ack for the series to v1, not v2. Best regards, Dariusz Sosnowski
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c index 51a3f7be4b..2dfcc5eba6 100644 --- a/drivers/net/mlx5/hws/mlx5dr_definer.c +++ b/drivers/net/mlx5/hws/mlx5dr_definer.c @@ -3267,8 +3267,17 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, break; case RTE_FLOW_ITEM_TYPE_FLEX: ret = mlx5dr_definer_conv_item_flex_parser(&cd, items, i); - item_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_FLEX : - MLX5_FLOW_ITEM_OUTER_FLEX; + if (ret == 0) { + enum rte_flow_item_flex_tunnel_mode tunnel_mode = + FLEX_TUNNEL_MODE_SINGLE; + + ret = mlx5_flex_get_tunnel_mode(items, &tunnel_mode); + if (tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL) + item_flags |= MLX5_FLOW_ITEM_FLEX_TUNNEL; + else + item_flags |= cd.tunnel ? MLX5_FLOW_ITEM_INNER_FLEX : + MLX5_FLOW_ITEM_OUTER_FLEX; + } break; case RTE_FLOW_ITEM_TYPE_MPLS: ret = mlx5dr_definer_conv_item_mpls(&cd, items, i);