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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by DS2PEPF00003443.mail.protection.outlook.com (10.167.17.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7918.13 via Frontend Transport; Wed, 18 Sep 2024 13:47:07 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 18 Sep 2024 06:46:55 -0700 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Wed, 18 Sep 2024 06:46:53 -0700 From: Viacheslav Ovsiienko To: CC: , , , , Subject: [PATCH v2 4/9] net/mlx5: fix flex item tunnel mode handling Date: Wed, 18 Sep 2024 16:46:18 +0300 Message-ID: <20240918134623.8441-5-viacheslavo@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918134623.8441-1-viacheslavo@nvidia.com> References: <20240911160458.524732-1-viacheslavo@nvidia.com> <20240918134623.8441-1-viacheslavo@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003443:EE_|BY5PR12MB4306:EE_ X-MS-Office365-Filtering-Correlation-Id: b18a5041-9da1-47c7-ea6f-08dcd7e86351 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 13:47:07.6433 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b18a5041-9da1-47c7-ea6f-08dcd7e86351 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003443.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4306 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The RTE flex item can represent tunnel header itself, and split inner and outer items, it should be reflected in the item flags while PMD is processing the item array. Fixes: 8c0ca7527bc8 ("net/mlx5/hws: support flex item matching") Cc: stable@dpdk.org Signed-off-by: Viacheslav Ovsiienko Acked-by: Dariusz Sosnowski --- drivers/net/mlx5/mlx5_flow_hw.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 50888944a5..a275154d4b 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -558,6 +558,7 @@ flow_hw_matching_item_flags_get(const struct rte_flow_item items[]) uint64_t last_item = 0; for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { + enum rte_flow_item_flex_tunnel_mode tunnel_mode = FLEX_TUNNEL_MODE_SINGLE; int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); int item_type = items->type; @@ -606,6 +607,13 @@ flow_hw_matching_item_flags_get(const struct rte_flow_item items[]) case RTE_FLOW_ITEM_TYPE_COMPARE: last_item = MLX5_FLOW_ITEM_COMPARE; break; + case RTE_FLOW_ITEM_TYPE_FLEX: + mlx5_flex_get_tunnel_mode(items, &tunnel_mode); + last_item = tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ? + MLX5_FLOW_ITEM_FLEX_TUNNEL : + tunnel ? MLX5_FLOW_ITEM_INNER_FLEX : + MLX5_FLOW_ITEM_OUTER_FLEX; + break; default: break; }