[v3,1/3] crypto/ipsec_mb: add SM3 algorithm support

Message ID 20241003170513.1292339-1-brian.dooley@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series [v3,1/3] crypto/ipsec_mb: add SM3 algorithm support |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Dooley, Brian Oct. 3, 2024, 5:05 p.m. UTC
This patch introduces SM3 algorithm support to the AESNI_MB PMD.

Signed-off-by: Brian Dooley <brian.dooley@intel.com>
---
v3:
	Add ipsec mb version check
	Add documentation
---
 doc/guides/cryptodevs/aesni_mb.rst          |  1 +
 doc/guides/cryptodevs/features/aesni_mb.ini |  1 +
 doc/guides/rel_notes/release_24_11.rst      |  3 +++
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c      |  5 ++++
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h | 28 ++++++++++++++++++++-
 5 files changed, 37 insertions(+), 1 deletion(-)
  

Comments

De Lara Guarch, Pablo Oct. 4, 2024, 12:05 p.m. UTC | #1
> -----Original Message-----
> From: Dooley, Brian <brian.dooley@intel.com>
> Sent: Thursday, October 3, 2024 6:05 PM
> To: Ji, Kai <kai.ji@intel.com>; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>
> Cc: dev@dpdk.org; gakhil@marvell.com; Dooley, Brian
> <brian.dooley@intel.com>
> Subject: [PATCH v3 1/3] crypto/ipsec_mb: add SM3 algorithm support
> 
> This patch introduces SM3 algorithm support to the AESNI_MB PMD.
> 
> Signed-off-by: Brian Dooley <brian.dooley@intel.com>

Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
  
Akhil Goyal Oct. 9, 2024, 3:21 p.m. UTC | #2
> > -----Original Message-----
> > From: Dooley, Brian <brian.dooley@intel.com>
> > Sent: Thursday, October 3, 2024 6:05 PM
> > To: Ji, Kai <kai.ji@intel.com>; De Lara Guarch, Pablo
> > <pablo.de.lara.guarch@intel.com>
> > Cc: dev@dpdk.org; gakhil@marvell.com; Dooley, Brian
> > <brian.dooley@intel.com>
> > Subject: [PATCH v3 1/3] crypto/ipsec_mb: add SM3 algorithm support
> >
> > This patch introduces SM3 algorithm support to the AESNI_MB PMD.
> >
> > Signed-off-by: Brian Dooley <brian.dooley@intel.com>
> 
> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Series applied to dpdk-next-crypto
Thanks.
  

Patch

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 3c77d0f463..951f8a7ca8 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -56,6 +56,7 @@  Hash algorithms:
 * RTE_CRYPTO_AUTH_ZUC_EIA3
 * RTE_CRYPTO_AUTH_SNOW3G_UIA2
 * RTE_CRYPTO_AUTH_KASUMI_F9
+* RTE_CRYPTO_AUTH_SM3
 
 AEAD algorithms:
 
diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini
index 8df5fa2c85..abab926b36 100644
--- a/doc/guides/cryptodevs/features/aesni_mb.ini
+++ b/doc/guides/cryptodevs/features/aesni_mb.ini
@@ -64,6 +64,7 @@  AES GMAC     = Y
 ZUC EIA3     = Y
 SNOW3G UIA2  = Y
 KASUMI F9    = Y
+SM3          = Y
 
 ;
 ; Supported AEAD algorithms of the 'aesni_mb' crypto driver.
diff --git a/doc/guides/rel_notes/release_24_11.rst b/doc/guides/rel_notes/release_24_11.rst
index 0ff70d9057..cd49f605b4 100644
--- a/doc/guides/rel_notes/release_24_11.rst
+++ b/doc/guides/rel_notes/release_24_11.rst
@@ -55,6 +55,9 @@  New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Updated IPsec_MB crypto driver.**
+  * Added support for SM3 algorithm.
+
 
 Removed Items
 -------------
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index ef4228bd38..4711b7f590 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -377,6 +377,11 @@  aesni_mb_set_session_auth_parameters(IMB_MGR *mb_mgr,
 		sess->template_job.hash_alg = IMB_AUTH_SHA_512;
 		auth_precompute = 0;
 		break;
+#if IMB_VERSION(1, 5, 0) <= IMB_VERSION_NUM
+	case RTE_CRYPTO_AUTH_SM3:
+		sess->template_job.hash_alg = IMB_AUTH_SM3;
+		break;
+#endif
 	default:
 		IPSEC_MB_LOG(ERR,
 			"Unsupported authentication algorithm selection");
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index d6af2d4ded..50f78bc3ff 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -732,6 +732,29 @@  static const struct rte_cryptodev_capabilities aesni_mb_capabilities[] = {
 			}, }
 		}, }
 	},
+#if IMB_VERSION(1, 5, 0) <= IMB_VERSION_NUM
+	{	/* SM3 */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_SM3,
+				.block_size = 64,
+				.key_size = {
+					.min = 0,
+					.max = 0,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 32,
+					.max = 32,
+					.increment = 1
+				},
+				.iv_size = { 0 }
+			}, }
+		}, }
+	},
+#endif
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -840,7 +863,10 @@  static const unsigned int auth_digest_byte_lengths[] = {
 		[IMB_AUTH_SHA_512]		= 64,
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 4,
 		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4,
-		[IMB_AUTH_KASUMI_UIA1]		= 4
+		[IMB_AUTH_KASUMI_UIA1]		= 4,
+#if IMB_VERSION(1, 5, 0) <= IMB_VERSION_NUM
+		[IMB_AUTH_SM3]			= 32
+#endif
 	/**< Vector mode dependent pointer table of the multi-buffer APIs */
 
 };