diff mbox series

[v1,2/2] app/bbdev: add support for interrupt disable

Message ID 20241025175709.1415722-3-nicolas.chautru@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Maxime Coquelin
Headers
Series app/bbdev: minor application updates |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-unit-amd64-testing pending Testing pending
ci/iol-unit-arm64-testing warning Testing issues
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS

Commit Message

Nicolas Chautru Oct. 25, 2024, 5:57 p.m. UTC 
Adding support for calling the interrupt disable api
for coverage.

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 app/test-bbdev/test_bbdev_perf.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Hemant Agrawal Oct. 28, 2024, 9:38 a.m. UTC | #1 
Reviewed-by:  Hemant Agrawal <hemant.agrawal@nxp.com>

On 25-10-2024 23:27, Nicolas Chautru wrote:
> Adding support for calling the interrupt disable api
> for coverage.
>
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
>   app/test-bbdev/test_bbdev_perf.c | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
>
> diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
> index 405c22de44..6ee1ca34b2 100644
> --- a/app/test-bbdev/test_bbdev_perf.c
> +++ b/app/test-bbdev/test_bbdev_perf.c
> @@ -3535,6 +3535,10 @@ throughput_intr_lcore_ldpc_dec(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>   
> @@ -3629,6 +3633,10 @@ throughput_intr_lcore_dec(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>   
> @@ -3718,6 +3726,10 @@ throughput_intr_lcore_enc(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>   
> @@ -3810,6 +3822,10 @@ throughput_intr_lcore_ldpc_enc(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>   
> @@ -3901,6 +3917,10 @@ throughput_intr_lcore_fft(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>   
> @@ -3986,6 +4006,10 @@ throughput_intr_lcore_mldts(void *arg)
>   			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
>   	}
>   
> +	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
> +			"Failed to disable interrupts for dev: %u, queue_id: %u",
> +			tp->dev_id, queue_id);
> +
>   	return TEST_SUCCESS;
>   }
>
Maxime Coquelin Nov. 8, 2024, 9 a.m. UTC | #2 
On 10/25/24 19:57, Nicolas Chautru wrote:
> Adding support for calling the interrupt disable api
> for coverage.
> 
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
>   app/test-bbdev/test_bbdev_perf.c | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime
diff mbox series

Patch

diff --git a/app/test-bbdev/test_bbdev_perf.c b/app/test-bbdev/test_bbdev_perf.c
index 405c22de44..6ee1ca34b2 100644
--- a/app/test-bbdev/test_bbdev_perf.c
+++ b/app/test-bbdev/test_bbdev_perf.c
@@ -3535,6 +3535,10 @@  throughput_intr_lcore_ldpc_dec(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }
 
@@ -3629,6 +3633,10 @@  throughput_intr_lcore_dec(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }
 
@@ -3718,6 +3726,10 @@  throughput_intr_lcore_enc(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }
 
@@ -3810,6 +3822,10 @@  throughput_intr_lcore_ldpc_enc(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }
 
@@ -3901,6 +3917,10 @@  throughput_intr_lcore_fft(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }
 
@@ -3986,6 +4006,10 @@  throughput_intr_lcore_mldts(void *arg)
 			rte_atomic_store_explicit(&tp->nb_dequeued, 0, rte_memory_order_relaxed);
 	}
 
+	TEST_ASSERT_SUCCESS(rte_bbdev_queue_intr_disable(tp->dev_id, queue_id),
+			"Failed to disable interrupts for dev: %u, queue_id: %u",
+			tp->dev_id, queue_id);
+
 	return TEST_SUCCESS;
 }