diff mbox series

net/mlx5: fix GRE item translation for root table

Message ID 20241027123916.114037-1-getelson@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix GRE item translation for root table |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/github-robot: build success github build: passed
ci/iol-unit-arm64-testing success Testing PASS
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ci/iol-compile-arm64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS

Commit Message

Etelson, Gregory Oct. 27, 2024, 12:39 p.m. UTC 
Flow items translations for the root tables reuses DV code.

DV GRE item translation did not initiate item mask for HWS template.

Fixes: cd4ab742064a ("net/mlx5: split flow item matcher and value translation")

Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

Comments

Raslan Darawsheh Oct. 28, 2024, 1:13 p.m. UTC | #1 
Hi,

From: Gregory Etelson <getelson@nvidia.com>
Sent: Sunday, October 27, 2024 2:39 PM
To: dev@dpdk.org
Cc: Gregory Etelson; Maayan Kashani; Raslan Darawsheh; stable@dpdk.org; Suanming Mou; Dariusz Sosnowski; Slava Ovsiienko; Bing Zhao; Ori Kam; Matan Azrad
Subject: [PATCH] net/mlx5: fix GRE item translation for root table

Flow items translations for the root tables reuses DV code.

DV GRE item translation did not initiate item mask for HWS template.

Fixes: cd4ab742064a ("net/mlx5: split flow item matcher and value translation")

Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Suanming Mou <suanmingm@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 201e215e4b..7c3a1d537a 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9829,22 +9829,23 @@  flow_dv_translate_item_gre(void *key, const struct rte_flow_item *item,
 	} gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
 	uint16_t protocol_m, protocol_v;
 
-	if (key_type & MLX5_SET_MATCHER_M)
+	if (key_type & MLX5_SET_MATCHER_M) {
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, 0xff);
-	else
+		if (!gre_m)
+			gre_m = &rte_flow_item_gre_mask;
+		gre_v = gre_m;
+	} else {
 		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
 			 IPPROTO_GRE);
-	if (!gre_v) {
-		gre_v = &empty_gre;
-		gre_m = &empty_gre;
-	} else {
-		if (!gre_m)
+		if (!gre_v) {
+			gre_v = &empty_gre;
+			gre_m = &empty_gre;
+		} else if (!gre_m) {
 			gre_m = &rte_flow_item_gre_mask;
+		}
+		if (key_type == MLX5_SET_MATCHER_HS_V)
+			gre_m = gre_v;
 	}
-	if (key_type & MLX5_SET_MATCHER_M)
-		gre_v = gre_m;
-	else if (key_type == MLX5_SET_MATCHER_HS_V)
-		gre_m = gre_v;
 	gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
 	gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
 	MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,