[v3,1/2] net/ixgbe: increase the maximum of RX/TX descriptors
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Commit Message
Intel PMDs are capped by default to only 4096 RX/TX descriptors.
This can be limiting for applications requiring a bigger buffer
capabilities. By bufferring more packets with RX/TX
descriptors, the applications can better handle the processing
peaks.
Setting ixgbe max descriptors to 8192 as per datasheet:
Register name: RDLEN
Description: Descriptor Ring Length.
This register sets the number of bytes
allocated for descriptors in the circular descriptor buffer.
It must be 128B aligned (7 LS bit must be set to zero).
** Note: validated Lengths up to 128K (8K descriptors). **
Signed-off-by: Lukas Sismis <sismis@cesnet.cz>
---
doc/guides/nics/ixgbe.rst | 2 +-
drivers/net/ixgbe/ixgbe_ethdev.c | 2 +-
drivers/net/ixgbe/ixgbe_rxtx.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
Comments
> From: Lukas Sismis [mailto:sismis@cesnet.cz]
> Sent: Wednesday, 30 October 2024 16.43
>
> Intel PMDs are capped by default to only 4096 RX/TX descriptors.
> This can be limiting for applications requiring a bigger buffer
> capabilities. By bufferring more packets with RX/TX
> descriptors, the applications can better handle the processing
> peaks.
>
> Setting ixgbe max descriptors to 8192 as per datasheet:
> Register name: RDLEN
> Description: Descriptor Ring Length.
> This register sets the number of bytes
> allocated for descriptors in the circular descriptor buffer.
> It must be 128B aligned (7 LS bit must be set to zero).
> ** Note: validated Lengths up to 128K (8K descriptors). **
>
> Signed-off-by: Lukas Sismis <sismis@cesnet.cz>
> ---
Drivers should reflect hardware capabilities; it's not up to the driver to impose artificial limits on applications. Thank you for fixing this, Lukas.
Acked-by: Morten Brørup <mb@smartsharesystems.com>
On Wed, Oct 30, 2024 at 05:26:12PM +0100, Morten Brørup wrote:
> > From: Lukas Sismis [mailto:sismis@cesnet.cz]
> > Sent: Wednesday, 30 October 2024 16.43
> >
> > Intel PMDs are capped by default to only 4096 RX/TX descriptors.
> > This can be limiting for applications requiring a bigger buffer
> > capabilities. By bufferring more packets with RX/TX
> > descriptors, the applications can better handle the processing
> > peaks.
> >
> > Setting ixgbe max descriptors to 8192 as per datasheet:
> > Register name: RDLEN
> > Description: Descriptor Ring Length.
> > This register sets the number of bytes
> > allocated for descriptors in the circular descriptor buffer.
> > It must be 128B aligned (7 LS bit must be set to zero).
> > ** Note: validated Lengths up to 128K (8K descriptors). **
FYI: Don't think we need the full quote from the datasheet, reducing this to
a one-line summary on apply.
> >
> > Signed-off-by: Lukas Sismis <sismis@cesnet.cz>
> > ---
>
> Drivers should reflect hardware capabilities; it's not up to the driver to impose artificial limits on applications. Thank you for fixing this, Lukas.
>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
>
Series-acked-by: Bruce Richardson <bruce.richardson@intel.com>
Both patches applied to dpdk-next-net-intel tree.
Thanks,
/Bruce
@@ -76,7 +76,7 @@ Scattered packets are not supported in this mode.
If an incoming packet is greater than the maximum acceptable length of one "mbuf" data size (by default, the size is 2 KB),
vPMD for RX would be disabled.
-By default, IXGBE_MAX_RING_DESC is set to 4096 and RTE_PMD_IXGBE_RX_MAX_BURST is set to 32.
+By default, IXGBE_MAX_RING_DESC is set to 8192 and RTE_PMD_IXGBE_RX_MAX_BURST is set to 32.
Windows Prerequisites and Pre-conditions
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -73,7 +73,7 @@
#define IXGBE_MMW_SIZE_DEFAULT 0x4
#define IXGBE_MMW_SIZE_JUMBO_FRAME 0x14
-#define IXGBE_MAX_RING_DESC 4096 /* replicate define from rxtx */
+#define IXGBE_MAX_RING_DESC 8192 /* replicate define from rxtx */
/*
* Default values for RX/TX configuration
@@ -25,7 +25,7 @@
* (num_ring_desc * sizeof(rx/tx descriptor)) % 128 == 0
*/
#define IXGBE_MIN_RING_DESC 32
-#define IXGBE_MAX_RING_DESC 4096
+#define IXGBE_MAX_RING_DESC 8192
#define RTE_PMD_IXGBE_TX_MAX_BURST 32
#define RTE_PMD_IXGBE_RX_MAX_BURST 32