[v1,1/1] baseband/acc: fix ring memory allocation logic

Message ID 20241030185614.1605876-2-nicolas.chautru@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Maxime Coquelin
Headers
Series baseband/acc: fix ring memory allocation logic |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS

Commit Message

Chautru, Nicolas Oct. 30, 2024, 6:56 p.m. UTC
Allowing ring memory allocation whose end address is aligned with 64 MB.
Previous logic was off by one.

Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 drivers/baseband/acc/acc_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Maxime Coquelin Nov. 5, 2024, 1:55 p.m. UTC | #1
Hi Nicolas,

On 10/30/24 19:56, Nicolas Chautru wrote:
> Allowing ring memory allocation whose end address is aligned with 64 MB.
> Previous logic was off by one.
> 
> Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
>   drivers/baseband/acc/acc_common.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
> index 4c60b7896b..55b43bab4e 100644
> --- a/drivers/baseband/acc/acc_common.h
> +++ b/drivers/baseband/acc/acc_common.h
> @@ -800,7 +800,7 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d,
>   		/* Check if the end of the sw ring memory block is before the
>   		 * start of next 64MB aligned mem address
>   		 */
> -		if (sw_ring_iova_end_addr < next_64mb_align_addr_iova) {
> +		if (sw_ring_iova_end_addr <= next_64mb_align_addr_iova) {
>   			d->sw_rings_iova = sw_rings_base_iova;
>   			d->sw_rings = sw_rings_base;
>   			d->sw_rings_base = sw_rings_base;

IMHO, the proper fix would be to fix sw_ring_iova_end_addr to really
represent the last address of the block and not the start address ofthe
next one:

sw_ring_iova_end_addr = sw_rings_base_iova + dev_sw_ring_size - 1;

Regards,
Maxime
  

Patch

diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
index 4c60b7896b..55b43bab4e 100644
--- a/drivers/baseband/acc/acc_common.h
+++ b/drivers/baseband/acc/acc_common.h
@@ -800,7 +800,7 @@  alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d,
 		/* Check if the end of the sw ring memory block is before the
 		 * start of next 64MB aligned mem address
 		 */
-		if (sw_ring_iova_end_addr < next_64mb_align_addr_iova) {
+		if (sw_ring_iova_end_addr <= next_64mb_align_addr_iova) {
 			d->sw_rings_iova = sw_rings_base_iova;
 			d->sw_rings = sw_rings_base;
 			d->sw_rings_base = sw_rings_base;