diff mbox series

net/ice: enable link speed 200G

Message ID 20241031011819.2020557-1-mingjinx.ye@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Bruce Richardson
Headers
Series net/ice: enable link speed 200G |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS

Commit Message

Mingjin Ye Oct. 31, 2024, 1:18 a.m. UTC 
ICE Enable 200G link speed capability.

Fixes: 36afbc269081 ("net/ice: support link speed change")

Signed-off-by: Mingjin Ye <mingjinx.ye@intel.com>
---
 drivers/net/ice/ice_ethdev.c | 11 ++++++++++-
 drivers/net/ice/ice_ethdev.h | 12 ++++++++++++
 2 files changed, 22 insertions(+), 1 deletion(-)

Comments

Bruce Richardson Nov. 1, 2024, 10:42 a.m. UTC | #1 
On Thu, Oct 31, 2024 at 01:18:19AM +0000, Mingjin Ye wrote:
> ICE Enable 200G link speed capability.
> 
> Fixes: 36afbc269081 ("net/ice: support link speed change")

I don't think this is a fix, more new feature support, so will drop the
fixes line on apply.

> 
> Signed-off-by: Mingjin Ye <mingjinx.ye@intel.com>

Patch looks good to me, thanks.

Acked-by: Bruce Richardson <bruce.richardson@intel.com>

Applied to dpdk-next-net-intel

Thanks,
/Bruce
diff mbox series

Patch

diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index d5e94a6685..ce955ebbc2 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -4160,6 +4160,9 @@  ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 			ICE_PHY_TYPE_SUPPORT_100G_HIGH(phy_type_high))
 		dev_info->speed_capa |= RTE_ETH_LINK_SPEED_100G;
 
+	if (ICE_PHY_TYPE_SUPPORT_200G_HIGH(phy_type_high))
+		dev_info->speed_capa |= RTE_ETH_LINK_SPEED_200G;
+
 	dev_info->nb_rx_queues = dev->data->nb_rx_queues;
 	dev_info->nb_tx_queues = dev->data->nb_tx_queues;
 
@@ -4285,6 +4288,9 @@  ice_link_update(struct rte_eth_dev *dev, int wait_to_complete)
 	case ICE_AQ_LINK_SPEED_100GB:
 		link.link_speed = RTE_ETH_SPEED_NUM_100G;
 		break;
+	case ICE_AQ_LINK_SPEED_200GB:
+		link.link_speed = RTE_ETH_SPEED_NUM_200G;
+		break;
 	case ICE_AQ_LINK_SPEED_UNKNOWN:
 		PMD_DRV_LOG(ERR, "Unknown link speed");
 		link.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN;
@@ -4311,6 +4317,8 @@  ice_parse_link_speeds(uint16_t link_speeds)
 {
 	uint16_t link_speed = ICE_AQ_LINK_SPEED_UNKNOWN;
 
+	if (link_speeds & RTE_ETH_LINK_SPEED_200G)
+		link_speed |= ICE_AQ_LINK_SPEED_200GB;
 	if (link_speeds & RTE_ETH_LINK_SPEED_100G)
 		link_speed |= ICE_AQ_LINK_SPEED_100GB;
 	if (link_speeds & RTE_ETH_LINK_SPEED_50G)
@@ -4343,7 +4351,8 @@  ice_apply_link_speed(struct rte_eth_dev *dev)
 	struct rte_eth_conf *conf = &dev->data->dev_conf;
 
 	if (conf->link_speeds == RTE_ETH_LINK_SPEED_AUTONEG) {
-		conf->link_speeds = RTE_ETH_LINK_SPEED_100G |
+		conf->link_speeds = RTE_ETH_LINK_SPEED_200G |
+				    RTE_ETH_LINK_SPEED_100G |
 				    RTE_ETH_LINK_SPEED_50G  |
 				    RTE_ETH_LINK_SPEED_40G  |
 				    RTE_ETH_LINK_SPEED_25G  |
diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index 076cf595e8..61d8c275cf 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -741,6 +741,18 @@  ice_align_floor(int n)
 	((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC) || \
 	((phy_type) & ICE_PHY_TYPE_HIGH_100G_AUI2))
 
+#define ICE_PHY_TYPE_SUPPORT_200G_HIGH(phy_type) \
+	(((phy_type) & ICE_PHY_TYPE_HIGH_200G_CR4_PAM4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_SR4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_FR4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_LR4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_DR4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_KR4_PAM4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI4_AOC_ACC) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI4) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI8_AOC_ACC) || \
+	((phy_type) & ICE_PHY_TYPE_HIGH_200G_AUI8))
+
 __rte_experimental
 int rte_pmd_ice_dump_package(uint16_t port, uint8_t **buff, uint32_t *size);