@@ -555,12 +555,15 @@ bnxt_pmd_global_tunnel_set(uint16_t port_id, uint8_t type,
case BNXT_GLOBAL_REGISTER_TUNNEL_ECPRI:
hwtype = HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_ECPRI;
break;
+ case BNXT_GLOBAL_REGISTER_TUNNEL_VXLAN_GPE:
+ hwtype = HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_GPE;
+ break;
default:
BNXT_TF_DBG(ERR, "Tunnel Type (%d) invalid\n", type);
return -EINVAL;
}
- if (!udp_port && type != BNXT_GLOBAL_REGISTER_TUNNEL_ECPRI) {
+ if (!udp_port) {
/* Free based on the handle */
if (!handle) {
BNXT_TF_DBG(ERR, "Free with invalid handle\n");
@@ -20,6 +20,7 @@ enum bnxt_global_register_tunnel_type {
BNXT_GLOBAL_REGISTER_TUNNEL_UNUSED = 0,
BNXT_GLOBAL_REGISTER_TUNNEL_VXLAN,
BNXT_GLOBAL_REGISTER_TUNNEL_ECPRI,
+ BNXT_GLOBAL_REGISTER_TUNNEL_VXLAN_GPE,
BNXT_GLOBAL_REGISTER_TUNNEL_MAX
};
@@ -469,6 +469,7 @@ bnxt_ulp_cntxt_app_caps_init(struct bnxt *bp,
bnxt_ulp_ha_reg_set(ulp_ctx, info[i].ha_reg_state,
info[i].ha_reg_cnt);
ulp_ctx->cfg_data->ha_pool_id = info[i].ha_pool_id;
+ ulp_ctx->cfg_data->default_priority = info[i].default_priority;
}
if (!found) {
BNXT_TF_DBG(ERR, "APP ID %d, Device ID: 0x%x not supported.\n",
@@ -549,6 +550,16 @@ bnxt_ulp_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx)
return (unsigned int)ulp_ctx->cfg_data->vxlan_port;
}
+/* Function to retrieve the default app priority from the context. */
+unsigned int
+bnxt_ulp_default_app_priority_get(struct bnxt_ulp_context *ulp_ctx)
+{
+ if (!ulp_ctx || !ulp_ctx->cfg_data)
+ return 0;
+
+ return (unsigned int)ulp_ctx->cfg_data->default_priority;
+}
+
static inline uint32_t
bnxt_ulp_session_idx_get(enum bnxt_ulp_session_type session_type) {
if (session_type & BNXT_ULP_SESSION_TYPE_SHARED)
@@ -58,6 +58,7 @@
BNXT_ULP_APP_HA_DYNAMIC)
#define ULP_APP_CUST_VXLAN_SUPPORT(ctx) ((ctx)->cfg_data->vxlan_port != 0)
+#define ULP_APP_VXLAN_GPE_SUPPORT(ctx) ((ctx)->cfg_data->vxlan_gpe_port != 0)
#define ULP_APP_CUST_VXLAN_IP_SUPPORT(ctx) ((ctx)->cfg_data->vxlan_ip_port != 0)
enum bnxt_ulp_flow_mem_type {
@@ -111,7 +112,9 @@ struct bnxt_ulp_data {
uint8_t app_id;
uint8_t num_shared_clients;
struct bnxt_flow_app_tun_ent app_tun[BNXT_ULP_MAX_TUN_CACHE_ENTRIES];
+ uint32_t default_priority;
uint32_t vxlan_port;
+ uint32_t vxlan_gpe_port;
uint32_t vxlan_ip_port;
uint32_t ecpri_udp_port;
uint8_t hu_reg_state;
@@ -369,6 +372,9 @@ bnxt_ulp_vxlan_port_set(struct bnxt_ulp_context *ulp_ctx,
unsigned int
bnxt_ulp_vxlan_port_get(struct bnxt_ulp_context *ulp_ctx);
+unsigned int
+bnxt_ulp_default_app_priority_get(struct bnxt_ulp_context *ulp_ctx);
+
int
bnxt_ulp_vxlan_ip_port_set(struct bnxt_ulp_context *ulp_ctx,
uint32_t vxlan_ip_port);
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2023 Broadcom
+ * Copyright(c) 2014-2024 Broadcom
* All rights reserved.
*/
@@ -14,550 +14,728 @@
*/
uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = {
[BNXT_ULP_ACT_HID_0000] = 1,
- [BNXT_ULP_ACT_HID_0008] = 2,
- [BNXT_ULP_ACT_HID_2000] = 3,
- [BNXT_ULP_ACT_HID_1988] = 4,
- [BNXT_ULP_ACT_HID_0080] = 5,
- [BNXT_ULP_ACT_HID_3988] = 6,
- [BNXT_ULP_ACT_HID_1a08] = 7,
- [BNXT_ULP_ACT_HID_0010] = 8,
- [BNXT_ULP_ACT_HID_0040] = 9,
- [BNXT_ULP_ACT_HID_0050] = 10,
- [BNXT_ULP_ACT_HID_0018] = 11,
- [BNXT_ULP_ACT_HID_2010] = 12,
- [BNXT_ULP_ACT_HID_1998] = 13,
- [BNXT_ULP_ACT_HID_0090] = 14,
- [BNXT_ULP_ACT_HID_3998] = 15,
- [BNXT_ULP_ACT_HID_1a18] = 16,
- [BNXT_ULP_ACT_HID_32ea] = 17,
- [BNXT_ULP_ACT_HID_32f2] = 18,
- [BNXT_ULP_ACT_HID_52ea] = 19,
- [BNXT_ULP_ACT_HID_4c72] = 20,
- [BNXT_ULP_ACT_HID_336a] = 21,
- [BNXT_ULP_ACT_HID_6c72] = 22,
- [BNXT_ULP_ACT_HID_4cf2] = 23,
- [BNXT_ULP_ACT_HID_32fa] = 24,
- [BNXT_ULP_ACT_HID_3302] = 25,
- [BNXT_ULP_ACT_HID_52fa] = 26,
- [BNXT_ULP_ACT_HID_4c82] = 27,
- [BNXT_ULP_ACT_HID_337a] = 28,
- [BNXT_ULP_ACT_HID_6c82] = 29,
- [BNXT_ULP_ACT_HID_4d02] = 30,
- [BNXT_ULP_ACT_HID_0808] = 31,
- [BNXT_ULP_ACT_HID_1008] = 32,
- [BNXT_ULP_ACT_HID_1808] = 33,
- [BNXT_ULP_ACT_HID_0818] = 34,
- [BNXT_ULP_ACT_HID_1018] = 35,
- [BNXT_ULP_ACT_HID_1818] = 36,
- [BNXT_ULP_ACT_HID_0880] = 37,
- [BNXT_ULP_ACT_HID_1080] = 38,
- [BNXT_ULP_ACT_HID_1880] = 39,
- [BNXT_ULP_ACT_HID_0890] = 40,
- [BNXT_ULP_ACT_HID_1090] = 41,
- [BNXT_ULP_ACT_HID_1890] = 42,
- [BNXT_ULP_ACT_HID_3af2] = 43,
- [BNXT_ULP_ACT_HID_42f2] = 44,
- [BNXT_ULP_ACT_HID_4af2] = 45,
- [BNXT_ULP_ACT_HID_3b02] = 46,
- [BNXT_ULP_ACT_HID_4302] = 47,
- [BNXT_ULP_ACT_HID_4b02] = 48,
- [BNXT_ULP_ACT_HID_3b6a] = 49,
- [BNXT_ULP_ACT_HID_436a] = 50,
- [BNXT_ULP_ACT_HID_4b6a] = 51,
- [BNXT_ULP_ACT_HID_3b7a] = 52,
- [BNXT_ULP_ACT_HID_437a] = 53,
- [BNXT_ULP_ACT_HID_4b7a] = 54,
- [BNXT_ULP_ACT_HID_640d] = 55,
- [BNXT_ULP_ACT_HID_641d] = 56,
- [BNXT_ULP_ACT_HID_071a] = 57,
- [BNXT_ULP_ACT_HID_0800] = 58,
- [BNXT_ULP_ACT_HID_1000] = 59,
- [BNXT_ULP_ACT_HID_1800] = 60,
- [BNXT_ULP_ACT_HID_0810] = 61,
- [BNXT_ULP_ACT_HID_1010] = 62,
- [BNXT_ULP_ACT_HID_1810] = 63,
- [BNXT_ULP_ACT_HID_1110] = 64,
- [BNXT_ULP_ACT_HID_4420] = 65,
- [BNXT_ULP_ACT_HID_2220] = 66,
- [BNXT_ULP_ACT_HID_0c84] = 67,
- [BNXT_ULP_ACT_HID_3f94] = 68,
- [BNXT_ULP_ACT_HID_3330] = 69,
- [BNXT_ULP_ACT_HID_50a4] = 70,
- [BNXT_ULP_ACT_HID_1910] = 71,
- [BNXT_ULP_ACT_HID_4c20] = 72,
- [BNXT_ULP_ACT_HID_2a20] = 73,
- [BNXT_ULP_ACT_HID_1484] = 74,
- [BNXT_ULP_ACT_HID_4794] = 75,
- [BNXT_ULP_ACT_HID_3b30] = 76,
- [BNXT_ULP_ACT_HID_58a4] = 77,
- [BNXT_ULP_ACT_HID_2110] = 78,
- [BNXT_ULP_ACT_HID_5420] = 79,
- [BNXT_ULP_ACT_HID_3220] = 80,
- [BNXT_ULP_ACT_HID_1c84] = 81,
- [BNXT_ULP_ACT_HID_4f94] = 82,
- [BNXT_ULP_ACT_HID_4330] = 83,
- [BNXT_ULP_ACT_HID_60a4] = 84,
- [BNXT_ULP_ACT_HID_2910] = 85,
- [BNXT_ULP_ACT_HID_5c20] = 86,
- [BNXT_ULP_ACT_HID_3a20] = 87,
- [BNXT_ULP_ACT_HID_2484] = 88,
- [BNXT_ULP_ACT_HID_5794] = 89,
- [BNXT_ULP_ACT_HID_4b30] = 90,
- [BNXT_ULP_ACT_HID_68a4] = 91,
- [BNXT_ULP_ACT_HID_1120] = 92,
- [BNXT_ULP_ACT_HID_4430] = 93,
- [BNXT_ULP_ACT_HID_2230] = 94,
- [BNXT_ULP_ACT_HID_0c94] = 95,
- [BNXT_ULP_ACT_HID_3fa4] = 96,
- [BNXT_ULP_ACT_HID_3340] = 97,
- [BNXT_ULP_ACT_HID_50b4] = 98,
- [BNXT_ULP_ACT_HID_1920] = 99,
- [BNXT_ULP_ACT_HID_4c30] = 100,
- [BNXT_ULP_ACT_HID_2a30] = 101,
- [BNXT_ULP_ACT_HID_1494] = 102,
- [BNXT_ULP_ACT_HID_47a4] = 103,
- [BNXT_ULP_ACT_HID_3b40] = 104,
- [BNXT_ULP_ACT_HID_58b4] = 105,
- [BNXT_ULP_ACT_HID_2120] = 106,
- [BNXT_ULP_ACT_HID_5430] = 107,
- [BNXT_ULP_ACT_HID_3230] = 108,
- [BNXT_ULP_ACT_HID_1c94] = 109,
- [BNXT_ULP_ACT_HID_4fa4] = 110,
- [BNXT_ULP_ACT_HID_4340] = 111,
- [BNXT_ULP_ACT_HID_60b4] = 112,
- [BNXT_ULP_ACT_HID_2920] = 113,
- [BNXT_ULP_ACT_HID_5c30] = 114,
- [BNXT_ULP_ACT_HID_3a30] = 115,
- [BNXT_ULP_ACT_HID_2494] = 116,
- [BNXT_ULP_ACT_HID_57a4] = 117,
- [BNXT_ULP_ACT_HID_4b40] = 118,
- [BNXT_ULP_ACT_HID_68b4] = 119,
- [BNXT_ULP_ACT_HID_2a98] = 120,
- [BNXT_ULP_ACT_HID_5da8] = 121,
- [BNXT_ULP_ACT_HID_3ba8] = 122,
- [BNXT_ULP_ACT_HID_260c] = 123,
- [BNXT_ULP_ACT_HID_591c] = 124,
- [BNXT_ULP_ACT_HID_6a2c] = 125,
- [BNXT_ULP_ACT_HID_2aa8] = 126,
- [BNXT_ULP_ACT_HID_5db8] = 127,
- [BNXT_ULP_ACT_HID_3bb8] = 128,
- [BNXT_ULP_ACT_HID_261c] = 129,
- [BNXT_ULP_ACT_HID_592c] = 130,
- [BNXT_ULP_ACT_HID_6a3c] = 131,
- [BNXT_ULP_ACT_HID_3298] = 132,
- [BNXT_ULP_ACT_HID_65a8] = 133,
- [BNXT_ULP_ACT_HID_43a8] = 134,
- [BNXT_ULP_ACT_HID_2e0c] = 135,
- [BNXT_ULP_ACT_HID_611c] = 136,
- [BNXT_ULP_ACT_HID_722c] = 137,
- [BNXT_ULP_ACT_HID_32a8] = 138,
- [BNXT_ULP_ACT_HID_65b8] = 139,
- [BNXT_ULP_ACT_HID_43b8] = 140,
- [BNXT_ULP_ACT_HID_2e1c] = 141,
- [BNXT_ULP_ACT_HID_612c] = 142,
- [BNXT_ULP_ACT_HID_723c] = 143,
- [BNXT_ULP_ACT_HID_3a98] = 144,
- [BNXT_ULP_ACT_HID_6da8] = 145,
- [BNXT_ULP_ACT_HID_4ba8] = 146,
- [BNXT_ULP_ACT_HID_360c] = 147,
- [BNXT_ULP_ACT_HID_691c] = 148,
- [BNXT_ULP_ACT_HID_7a2c] = 149,
- [BNXT_ULP_ACT_HID_3aa8] = 150,
- [BNXT_ULP_ACT_HID_6db8] = 151,
- [BNXT_ULP_ACT_HID_4bb8] = 152,
- [BNXT_ULP_ACT_HID_361c] = 153,
- [BNXT_ULP_ACT_HID_692c] = 154,
- [BNXT_ULP_ACT_HID_7a3c] = 155,
- [BNXT_ULP_ACT_HID_4298] = 156,
- [BNXT_ULP_ACT_HID_75a8] = 157,
- [BNXT_ULP_ACT_HID_53a8] = 158,
- [BNXT_ULP_ACT_HID_3e0c] = 159,
- [BNXT_ULP_ACT_HID_711c] = 160,
- [BNXT_ULP_ACT_HID_0670] = 161,
- [BNXT_ULP_ACT_HID_42a8] = 162,
- [BNXT_ULP_ACT_HID_75b8] = 163,
- [BNXT_ULP_ACT_HID_53b8] = 164,
- [BNXT_ULP_ACT_HID_3e1c] = 165,
- [BNXT_ULP_ACT_HID_712c] = 166,
- [BNXT_ULP_ACT_HID_0680] = 167,
- [BNXT_ULP_ACT_HID_3aea] = 168,
- [BNXT_ULP_ACT_HID_42ea] = 169,
- [BNXT_ULP_ACT_HID_4aea] = 170,
- [BNXT_ULP_ACT_HID_3afa] = 171,
- [BNXT_ULP_ACT_HID_42fa] = 172,
- [BNXT_ULP_ACT_HID_4afa] = 173,
- [BNXT_ULP_ACT_HID_43fa] = 174,
- [BNXT_ULP_ACT_HID_770a] = 175,
- [BNXT_ULP_ACT_HID_550a] = 176,
- [BNXT_ULP_ACT_HID_3f6e] = 177,
- [BNXT_ULP_ACT_HID_727e] = 178,
- [BNXT_ULP_ACT_HID_661a] = 179,
- [BNXT_ULP_ACT_HID_07d2] = 180,
- [BNXT_ULP_ACT_HID_4bfa] = 181,
- [BNXT_ULP_ACT_HID_034e] = 182,
- [BNXT_ULP_ACT_HID_5d0a] = 183,
- [BNXT_ULP_ACT_HID_476e] = 184,
- [BNXT_ULP_ACT_HID_7a7e] = 185,
- [BNXT_ULP_ACT_HID_6e1a] = 186,
- [BNXT_ULP_ACT_HID_0fd2] = 187,
- [BNXT_ULP_ACT_HID_53fa] = 188,
- [BNXT_ULP_ACT_HID_0b4e] = 189,
- [BNXT_ULP_ACT_HID_650a] = 190,
- [BNXT_ULP_ACT_HID_4f6e] = 191,
- [BNXT_ULP_ACT_HID_06c2] = 192,
- [BNXT_ULP_ACT_HID_761a] = 193,
- [BNXT_ULP_ACT_HID_17d2] = 194,
- [BNXT_ULP_ACT_HID_5bfa] = 195,
- [BNXT_ULP_ACT_HID_134e] = 196,
- [BNXT_ULP_ACT_HID_6d0a] = 197,
- [BNXT_ULP_ACT_HID_576e] = 198,
- [BNXT_ULP_ACT_HID_0ec2] = 199,
- [BNXT_ULP_ACT_HID_025e] = 200,
- [BNXT_ULP_ACT_HID_1fd2] = 201,
- [BNXT_ULP_ACT_HID_440a] = 202,
- [BNXT_ULP_ACT_HID_771a] = 203,
- [BNXT_ULP_ACT_HID_551a] = 204,
- [BNXT_ULP_ACT_HID_3f7e] = 205,
- [BNXT_ULP_ACT_HID_728e] = 206,
- [BNXT_ULP_ACT_HID_662a] = 207,
- [BNXT_ULP_ACT_HID_07e2] = 208,
- [BNXT_ULP_ACT_HID_4c0a] = 209,
- [BNXT_ULP_ACT_HID_035e] = 210,
- [BNXT_ULP_ACT_HID_5d1a] = 211,
- [BNXT_ULP_ACT_HID_477e] = 212,
- [BNXT_ULP_ACT_HID_7a8e] = 213,
- [BNXT_ULP_ACT_HID_6e2a] = 214,
- [BNXT_ULP_ACT_HID_0fe2] = 215,
- [BNXT_ULP_ACT_HID_540a] = 216,
- [BNXT_ULP_ACT_HID_0b5e] = 217,
- [BNXT_ULP_ACT_HID_651a] = 218,
- [BNXT_ULP_ACT_HID_4f7e] = 219,
- [BNXT_ULP_ACT_HID_06d2] = 220,
- [BNXT_ULP_ACT_HID_762a] = 221,
- [BNXT_ULP_ACT_HID_17e2] = 222,
- [BNXT_ULP_ACT_HID_5c0a] = 223,
- [BNXT_ULP_ACT_HID_135e] = 224,
- [BNXT_ULP_ACT_HID_6d1a] = 225,
- [BNXT_ULP_ACT_HID_577e] = 226,
- [BNXT_ULP_ACT_HID_0ed2] = 227,
- [BNXT_ULP_ACT_HID_026e] = 228,
- [BNXT_ULP_ACT_HID_1fe2] = 229,
- [BNXT_ULP_ACT_HID_5d82] = 230,
- [BNXT_ULP_ACT_HID_14d6] = 231,
- [BNXT_ULP_ACT_HID_6e92] = 232,
- [BNXT_ULP_ACT_HID_58f6] = 233,
- [BNXT_ULP_ACT_HID_104a] = 234,
- [BNXT_ULP_ACT_HID_215a] = 235,
- [BNXT_ULP_ACT_HID_5d92] = 236,
- [BNXT_ULP_ACT_HID_14e6] = 237,
- [BNXT_ULP_ACT_HID_6ea2] = 238,
- [BNXT_ULP_ACT_HID_5906] = 239,
- [BNXT_ULP_ACT_HID_105a] = 240,
- [BNXT_ULP_ACT_HID_216a] = 241,
- [BNXT_ULP_ACT_HID_6582] = 242,
- [BNXT_ULP_ACT_HID_1cd6] = 243,
- [BNXT_ULP_ACT_HID_7692] = 244,
- [BNXT_ULP_ACT_HID_60f6] = 245,
- [BNXT_ULP_ACT_HID_184a] = 246,
- [BNXT_ULP_ACT_HID_295a] = 247,
- [BNXT_ULP_ACT_HID_6592] = 248,
- [BNXT_ULP_ACT_HID_1ce6] = 249,
- [BNXT_ULP_ACT_HID_76a2] = 250,
- [BNXT_ULP_ACT_HID_6106] = 251,
- [BNXT_ULP_ACT_HID_185a] = 252,
- [BNXT_ULP_ACT_HID_296a] = 253,
- [BNXT_ULP_ACT_HID_6d82] = 254,
- [BNXT_ULP_ACT_HID_24d6] = 255,
- [BNXT_ULP_ACT_HID_02d6] = 256,
- [BNXT_ULP_ACT_HID_68f6] = 257,
- [BNXT_ULP_ACT_HID_204a] = 258,
- [BNXT_ULP_ACT_HID_315a] = 259,
- [BNXT_ULP_ACT_HID_6d92] = 260,
- [BNXT_ULP_ACT_HID_24e6] = 261,
- [BNXT_ULP_ACT_HID_02e6] = 262,
- [BNXT_ULP_ACT_HID_6906] = 263,
- [BNXT_ULP_ACT_HID_205a] = 264,
- [BNXT_ULP_ACT_HID_316a] = 265,
- [BNXT_ULP_ACT_HID_7582] = 266,
- [BNXT_ULP_ACT_HID_2cd6] = 267,
- [BNXT_ULP_ACT_HID_0ad6] = 268,
- [BNXT_ULP_ACT_HID_70f6] = 269,
- [BNXT_ULP_ACT_HID_284a] = 270,
- [BNXT_ULP_ACT_HID_395a] = 271,
- [BNXT_ULP_ACT_HID_7592] = 272,
- [BNXT_ULP_ACT_HID_2ce6] = 273,
- [BNXT_ULP_ACT_HID_0ae6] = 274,
- [BNXT_ULP_ACT_HID_7106] = 275,
- [BNXT_ULP_ACT_HID_285a] = 276,
- [BNXT_ULP_ACT_HID_396a] = 277,
- [BNXT_ULP_ACT_HID_0020] = 278,
- [BNXT_ULP_ACT_HID_0030] = 279,
- [BNXT_ULP_ACT_HID_65d4] = 280,
- [BNXT_ULP_ACT_HID_65e4] = 281,
- [BNXT_ULP_ACT_HID_330a] = 282,
- [BNXT_ULP_ACT_HID_331a] = 283,
- [BNXT_ULP_ACT_HID_1cfe] = 284,
- [BNXT_ULP_ACT_HID_1d0e] = 285,
- [BNXT_ULP_ACT_HID_1474] = 286,
- [BNXT_ULP_ACT_HID_4838] = 287,
- [BNXT_ULP_ACT_HID_6458] = 288,
- [BNXT_ULP_ACT_HID_1c68] = 289,
- [BNXT_ULP_ACT_HID_6c34] = 290,
- [BNXT_ULP_ACT_HID_5d08] = 291,
- [BNXT_ULP_ACT_HID_5d10] = 292,
- [BNXT_ULP_ACT_HID_5d20] = 293,
- [BNXT_ULP_ACT_HID_2e18] = 294,
- [BNXT_ULP_ACT_HID_29d4] = 295,
- [BNXT_ULP_ACT_HID_7690] = 296,
- [BNXT_ULP_ACT_HID_47a0] = 297,
- [BNXT_ULP_ACT_HID_435c] = 298,
- [BNXT_ULP_ACT_HID_5d18] = 299,
- [BNXT_ULP_ACT_HID_2e28] = 300,
- [BNXT_ULP_ACT_HID_29e4] = 301,
- [BNXT_ULP_ACT_HID_76a0] = 302,
- [BNXT_ULP_ACT_HID_47b0] = 303,
- [BNXT_ULP_ACT_HID_436c] = 304,
- [BNXT_ULP_ACT_HID_1436] = 305,
- [BNXT_ULP_ACT_HID_143e] = 306,
- [BNXT_ULP_ACT_HID_144e] = 307,
- [BNXT_ULP_ACT_HID_6102] = 308,
- [BNXT_ULP_ACT_HID_5cbe] = 309,
- [BNXT_ULP_ACT_HID_2dbe] = 310,
- [BNXT_ULP_ACT_HID_7a8a] = 311,
- [BNXT_ULP_ACT_HID_7646] = 312,
- [BNXT_ULP_ACT_HID_1446] = 313,
- [BNXT_ULP_ACT_HID_6112] = 314,
- [BNXT_ULP_ACT_HID_5cce] = 315,
- [BNXT_ULP_ACT_HID_2dce] = 316,
- [BNXT_ULP_ACT_HID_7a9a] = 317,
- [BNXT_ULP_ACT_HID_7656] = 318,
- [BNXT_ULP_ACT_HID_6508] = 319,
- [BNXT_ULP_ACT_HID_6d08] = 320,
- [BNXT_ULP_ACT_HID_7508] = 321,
- [BNXT_ULP_ACT_HID_6518] = 322,
- [BNXT_ULP_ACT_HID_6d18] = 323,
- [BNXT_ULP_ACT_HID_7518] = 324,
- [BNXT_ULP_ACT_HID_6e18] = 325,
- [BNXT_ULP_ACT_HID_256c] = 326,
- [BNXT_ULP_ACT_HID_036c] = 327,
- [BNXT_ULP_ACT_HID_698c] = 328,
- [BNXT_ULP_ACT_HID_20e0] = 329,
- [BNXT_ULP_ACT_HID_31f0] = 330,
- [BNXT_ULP_ACT_HID_7618] = 331,
- [BNXT_ULP_ACT_HID_2d6c] = 332,
- [BNXT_ULP_ACT_HID_0b6c] = 333,
- [BNXT_ULP_ACT_HID_718c] = 334,
- [BNXT_ULP_ACT_HID_28e0] = 335,
- [BNXT_ULP_ACT_HID_39f0] = 336,
- [BNXT_ULP_ACT_HID_025c] = 337,
- [BNXT_ULP_ACT_HID_356c] = 338,
- [BNXT_ULP_ACT_HID_136c] = 339,
- [BNXT_ULP_ACT_HID_798c] = 340,
- [BNXT_ULP_ACT_HID_30e0] = 341,
- [BNXT_ULP_ACT_HID_41f0] = 342,
- [BNXT_ULP_ACT_HID_0a5c] = 343,
- [BNXT_ULP_ACT_HID_3d6c] = 344,
- [BNXT_ULP_ACT_HID_1b6c] = 345,
- [BNXT_ULP_ACT_HID_05d0] = 346,
- [BNXT_ULP_ACT_HID_38e0] = 347,
- [BNXT_ULP_ACT_HID_49f0] = 348,
- [BNXT_ULP_ACT_HID_6e28] = 349,
- [BNXT_ULP_ACT_HID_257c] = 350,
- [BNXT_ULP_ACT_HID_037c] = 351,
- [BNXT_ULP_ACT_HID_699c] = 352,
- [BNXT_ULP_ACT_HID_20f0] = 353,
- [BNXT_ULP_ACT_HID_3200] = 354,
- [BNXT_ULP_ACT_HID_7628] = 355,
- [BNXT_ULP_ACT_HID_2d7c] = 356,
- [BNXT_ULP_ACT_HID_0b7c] = 357,
- [BNXT_ULP_ACT_HID_719c] = 358,
- [BNXT_ULP_ACT_HID_28f0] = 359,
- [BNXT_ULP_ACT_HID_3a00] = 360,
- [BNXT_ULP_ACT_HID_026c] = 361,
- [BNXT_ULP_ACT_HID_357c] = 362,
- [BNXT_ULP_ACT_HID_137c] = 363,
- [BNXT_ULP_ACT_HID_799c] = 364,
- [BNXT_ULP_ACT_HID_30f0] = 365,
- [BNXT_ULP_ACT_HID_4200] = 366,
- [BNXT_ULP_ACT_HID_0a6c] = 367,
- [BNXT_ULP_ACT_HID_3d7c] = 368,
- [BNXT_ULP_ACT_HID_1b7c] = 369,
- [BNXT_ULP_ACT_HID_05e0] = 370,
- [BNXT_ULP_ACT_HID_38f0] = 371,
- [BNXT_ULP_ACT_HID_4a00] = 372,
- [BNXT_ULP_ACT_HID_0be4] = 373,
- [BNXT_ULP_ACT_HID_3ef4] = 374,
- [BNXT_ULP_ACT_HID_1cf4] = 375,
- [BNXT_ULP_ACT_HID_0758] = 376,
- [BNXT_ULP_ACT_HID_3a68] = 377,
- [BNXT_ULP_ACT_HID_4b78] = 378,
- [BNXT_ULP_ACT_HID_0bf4] = 379,
- [BNXT_ULP_ACT_HID_3f04] = 380,
- [BNXT_ULP_ACT_HID_1d04] = 381,
- [BNXT_ULP_ACT_HID_0768] = 382,
- [BNXT_ULP_ACT_HID_3a78] = 383,
- [BNXT_ULP_ACT_HID_4b88] = 384,
- [BNXT_ULP_ACT_HID_46f4] = 385,
- [BNXT_ULP_ACT_HID_24f4] = 386,
- [BNXT_ULP_ACT_HID_0f58] = 387,
- [BNXT_ULP_ACT_HID_13e4] = 388,
- [BNXT_ULP_ACT_HID_4268] = 389,
- [BNXT_ULP_ACT_HID_5378] = 390,
- [BNXT_ULP_ACT_HID_13f4] = 391,
- [BNXT_ULP_ACT_HID_4704] = 392,
- [BNXT_ULP_ACT_HID_2504] = 393,
- [BNXT_ULP_ACT_HID_0f68] = 394,
- [BNXT_ULP_ACT_HID_4278] = 395,
- [BNXT_ULP_ACT_HID_5388] = 396,
- [BNXT_ULP_ACT_HID_1be4] = 397,
- [BNXT_ULP_ACT_HID_4ef4] = 398,
- [BNXT_ULP_ACT_HID_2cf4] = 399,
- [BNXT_ULP_ACT_HID_1758] = 400,
- [BNXT_ULP_ACT_HID_4a68] = 401,
- [BNXT_ULP_ACT_HID_5b78] = 402,
- [BNXT_ULP_ACT_HID_1bf4] = 403,
- [BNXT_ULP_ACT_HID_4f04] = 404,
- [BNXT_ULP_ACT_HID_2d04] = 405,
- [BNXT_ULP_ACT_HID_1768] = 406,
- [BNXT_ULP_ACT_HID_4a78] = 407,
- [BNXT_ULP_ACT_HID_5b88] = 408,
- [BNXT_ULP_ACT_HID_23e4] = 409,
- [BNXT_ULP_ACT_HID_56f4] = 410,
- [BNXT_ULP_ACT_HID_34f4] = 411,
- [BNXT_ULP_ACT_HID_1f58] = 412,
- [BNXT_ULP_ACT_HID_5268] = 413,
- [BNXT_ULP_ACT_HID_6378] = 414,
- [BNXT_ULP_ACT_HID_23f4] = 415,
- [BNXT_ULP_ACT_HID_5704] = 416,
- [BNXT_ULP_ACT_HID_3504] = 417,
- [BNXT_ULP_ACT_HID_1f68] = 418,
- [BNXT_ULP_ACT_HID_5278] = 419,
- [BNXT_ULP_ACT_HID_6388] = 420,
- [BNXT_ULP_ACT_HID_1c36] = 421,
- [BNXT_ULP_ACT_HID_2436] = 422,
- [BNXT_ULP_ACT_HID_2c36] = 423,
- [BNXT_ULP_ACT_HID_1c46] = 424,
- [BNXT_ULP_ACT_HID_2446] = 425,
- [BNXT_ULP_ACT_HID_2c46] = 426,
- [BNXT_ULP_ACT_HID_2546] = 427,
- [BNXT_ULP_ACT_HID_5856] = 428,
- [BNXT_ULP_ACT_HID_3656] = 429,
- [BNXT_ULP_ACT_HID_20ba] = 430,
- [BNXT_ULP_ACT_HID_53ca] = 431,
- [BNXT_ULP_ACT_HID_64da] = 432,
- [BNXT_ULP_ACT_HID_2d46] = 433,
- [BNXT_ULP_ACT_HID_6056] = 434,
- [BNXT_ULP_ACT_HID_3e56] = 435,
- [BNXT_ULP_ACT_HID_28ba] = 436,
- [BNXT_ULP_ACT_HID_5bca] = 437,
- [BNXT_ULP_ACT_HID_6cda] = 438,
- [BNXT_ULP_ACT_HID_3546] = 439,
- [BNXT_ULP_ACT_HID_6856] = 440,
- [BNXT_ULP_ACT_HID_4656] = 441,
- [BNXT_ULP_ACT_HID_30ba] = 442,
- [BNXT_ULP_ACT_HID_63ca] = 443,
- [BNXT_ULP_ACT_HID_74da] = 444,
- [BNXT_ULP_ACT_HID_3d46] = 445,
- [BNXT_ULP_ACT_HID_7056] = 446,
- [BNXT_ULP_ACT_HID_4e56] = 447,
- [BNXT_ULP_ACT_HID_38ba] = 448,
- [BNXT_ULP_ACT_HID_6bca] = 449,
- [BNXT_ULP_ACT_HID_011e] = 450,
- [BNXT_ULP_ACT_HID_2556] = 451,
- [BNXT_ULP_ACT_HID_5866] = 452,
- [BNXT_ULP_ACT_HID_3666] = 453,
- [BNXT_ULP_ACT_HID_20ca] = 454,
- [BNXT_ULP_ACT_HID_53da] = 455,
- [BNXT_ULP_ACT_HID_64ea] = 456,
- [BNXT_ULP_ACT_HID_2d56] = 457,
- [BNXT_ULP_ACT_HID_6066] = 458,
- [BNXT_ULP_ACT_HID_3e66] = 459,
- [BNXT_ULP_ACT_HID_28ca] = 460,
- [BNXT_ULP_ACT_HID_5bda] = 461,
- [BNXT_ULP_ACT_HID_6cea] = 462,
- [BNXT_ULP_ACT_HID_3556] = 463,
- [BNXT_ULP_ACT_HID_6866] = 464,
- [BNXT_ULP_ACT_HID_4666] = 465,
- [BNXT_ULP_ACT_HID_30ca] = 466,
- [BNXT_ULP_ACT_HID_63da] = 467,
- [BNXT_ULP_ACT_HID_74ea] = 468,
- [BNXT_ULP_ACT_HID_3d56] = 469,
- [BNXT_ULP_ACT_HID_7066] = 470,
- [BNXT_ULP_ACT_HID_4e66] = 471,
- [BNXT_ULP_ACT_HID_38ca] = 472,
- [BNXT_ULP_ACT_HID_6bda] = 473,
- [BNXT_ULP_ACT_HID_012e] = 474,
- [BNXT_ULP_ACT_HID_3ece] = 475,
- [BNXT_ULP_ACT_HID_71de] = 476,
- [BNXT_ULP_ACT_HID_4fde] = 477,
- [BNXT_ULP_ACT_HID_3a42] = 478,
- [BNXT_ULP_ACT_HID_6d52] = 479,
- [BNXT_ULP_ACT_HID_02a6] = 480,
- [BNXT_ULP_ACT_HID_3ede] = 481,
- [BNXT_ULP_ACT_HID_71ee] = 482,
- [BNXT_ULP_ACT_HID_4fee] = 483,
- [BNXT_ULP_ACT_HID_3a52] = 484,
- [BNXT_ULP_ACT_HID_6d62] = 485,
- [BNXT_ULP_ACT_HID_02b6] = 486,
- [BNXT_ULP_ACT_HID_79de] = 487,
- [BNXT_ULP_ACT_HID_57de] = 488,
- [BNXT_ULP_ACT_HID_4242] = 489,
- [BNXT_ULP_ACT_HID_46ce] = 490,
- [BNXT_ULP_ACT_HID_7552] = 491,
- [BNXT_ULP_ACT_HID_0aa6] = 492,
- [BNXT_ULP_ACT_HID_46de] = 493,
- [BNXT_ULP_ACT_HID_79ee] = 494,
- [BNXT_ULP_ACT_HID_57ee] = 495,
- [BNXT_ULP_ACT_HID_4252] = 496,
- [BNXT_ULP_ACT_HID_7562] = 497,
- [BNXT_ULP_ACT_HID_0ab6] = 498,
- [BNXT_ULP_ACT_HID_4ece] = 499,
- [BNXT_ULP_ACT_HID_0622] = 500,
- [BNXT_ULP_ACT_HID_5fde] = 501,
- [BNXT_ULP_ACT_HID_4a42] = 502,
- [BNXT_ULP_ACT_HID_0196] = 503,
- [BNXT_ULP_ACT_HID_12a6] = 504,
- [BNXT_ULP_ACT_HID_4ede] = 505,
- [BNXT_ULP_ACT_HID_0632] = 506,
- [BNXT_ULP_ACT_HID_5fee] = 507,
- [BNXT_ULP_ACT_HID_4a52] = 508,
- [BNXT_ULP_ACT_HID_01a6] = 509,
- [BNXT_ULP_ACT_HID_12b6] = 510,
- [BNXT_ULP_ACT_HID_56ce] = 511,
- [BNXT_ULP_ACT_HID_0e22] = 512,
- [BNXT_ULP_ACT_HID_67de] = 513,
- [BNXT_ULP_ACT_HID_5242] = 514,
- [BNXT_ULP_ACT_HID_0996] = 515,
- [BNXT_ULP_ACT_HID_1aa6] = 516,
- [BNXT_ULP_ACT_HID_56de] = 517,
- [BNXT_ULP_ACT_HID_0e32] = 518,
- [BNXT_ULP_ACT_HID_67ee] = 519,
- [BNXT_ULP_ACT_HID_5252] = 520,
- [BNXT_ULP_ACT_HID_09a6] = 521,
- [BNXT_ULP_ACT_HID_1ab6] = 522,
- [BNXT_ULP_ACT_HID_31d0] = 523,
- [BNXT_ULP_ACT_HID_31e0] = 524,
- [BNXT_ULP_ACT_HID_39d0] = 525,
- [BNXT_ULP_ACT_HID_39e0] = 526,
- [BNXT_ULP_ACT_HID_41d0] = 527,
- [BNXT_ULP_ACT_HID_41e0] = 528,
- [BNXT_ULP_ACT_HID_49d0] = 529,
- [BNXT_ULP_ACT_HID_49e0] = 530,
- [BNXT_ULP_ACT_HID_64ba] = 531,
- [BNXT_ULP_ACT_HID_64ca] = 532,
- [BNXT_ULP_ACT_HID_6cba] = 533,
- [BNXT_ULP_ACT_HID_6cca] = 534,
- [BNXT_ULP_ACT_HID_74ba] = 535,
- [BNXT_ULP_ACT_HID_74ca] = 536,
- [BNXT_ULP_ACT_HID_00fe] = 537,
- [BNXT_ULP_ACT_HID_010e] = 538,
- [BNXT_ULP_ACT_HID_331c] = 539,
- [BNXT_ULP_ACT_HID_332c] = 540,
- [BNXT_ULP_ACT_HID_6706] = 541,
- [BNXT_ULP_ACT_HID_6716] = 542,
- [BNXT_ULP_ACT_HID_1b6d] = 543,
- [BNXT_ULP_ACT_HID_1b7d] = 544,
- [BNXT_ULP_ACT_HID_641a] = 545
+ [BNXT_ULP_ACT_HID_0040] = 2,
+ [BNXT_ULP_ACT_HID_10000] = 3,
+ [BNXT_ULP_ACT_HID_cc40] = 4,
+ [BNXT_ULP_ACT_HID_0400] = 5,
+ [BNXT_ULP_ACT_HID_1cc40] = 6,
+ [BNXT_ULP_ACT_HID_d040] = 7,
+ [BNXT_ULP_ACT_HID_0080] = 8,
+ [BNXT_ULP_ACT_HID_0200] = 9,
+ [BNXT_ULP_ACT_HID_0280] = 10,
+ [BNXT_ULP_ACT_HID_00c0] = 11,
+ [BNXT_ULP_ACT_HID_10080] = 12,
+ [BNXT_ULP_ACT_HID_ccc0] = 13,
+ [BNXT_ULP_ACT_HID_0480] = 14,
+ [BNXT_ULP_ACT_HID_1ccc0] = 15,
+ [BNXT_ULP_ACT_HID_d0c0] = 16,
+ [BNXT_ULP_ACT_HID_19742] = 17,
+ [BNXT_ULP_ACT_HID_19782] = 18,
+ [BNXT_ULP_ACT_HID_29742] = 19,
+ [BNXT_ULP_ACT_HID_26382] = 20,
+ [BNXT_ULP_ACT_HID_19b42] = 21,
+ [BNXT_ULP_ACT_HID_36382] = 22,
+ [BNXT_ULP_ACT_HID_26782] = 23,
+ [BNXT_ULP_ACT_HID_197c2] = 24,
+ [BNXT_ULP_ACT_HID_19802] = 25,
+ [BNXT_ULP_ACT_HID_297c2] = 26,
+ [BNXT_ULP_ACT_HID_26402] = 27,
+ [BNXT_ULP_ACT_HID_19bc2] = 28,
+ [BNXT_ULP_ACT_HID_36402] = 29,
+ [BNXT_ULP_ACT_HID_26802] = 30,
+ [BNXT_ULP_ACT_HID_bca0] = 31,
+ [BNXT_ULP_ACT_HID_bce0] = 32,
+ [BNXT_ULP_ACT_HID_1bca0] = 33,
+ [BNXT_ULP_ACT_HID_168e0] = 34,
+ [BNXT_ULP_ACT_HID_a0a0] = 35,
+ [BNXT_ULP_ACT_HID_268e0] = 36,
+ [BNXT_ULP_ACT_HID_16ce0] = 37,
+ [BNXT_ULP_ACT_HID_bd20] = 38,
+ [BNXT_ULP_ACT_HID_bd60] = 39,
+ [BNXT_ULP_ACT_HID_1bd20] = 40,
+ [BNXT_ULP_ACT_HID_16960] = 41,
+ [BNXT_ULP_ACT_HID_a120] = 42,
+ [BNXT_ULP_ACT_HID_26960] = 43,
+ [BNXT_ULP_ACT_HID_16d60] = 44,
+ [BNXT_ULP_ACT_HID_4040] = 45,
+ [BNXT_ULP_ACT_HID_8040] = 46,
+ [BNXT_ULP_ACT_HID_c040] = 47,
+ [BNXT_ULP_ACT_HID_40c0] = 48,
+ [BNXT_ULP_ACT_HID_80c0] = 49,
+ [BNXT_ULP_ACT_HID_c0c0] = 50,
+ [BNXT_ULP_ACT_HID_4400] = 51,
+ [BNXT_ULP_ACT_HID_8400] = 52,
+ [BNXT_ULP_ACT_HID_c400] = 53,
+ [BNXT_ULP_ACT_HID_4480] = 54,
+ [BNXT_ULP_ACT_HID_8480] = 55,
+ [BNXT_ULP_ACT_HID_c480] = 56,
+ [BNXT_ULP_ACT_HID_1d782] = 57,
+ [BNXT_ULP_ACT_HID_21782] = 58,
+ [BNXT_ULP_ACT_HID_25782] = 59,
+ [BNXT_ULP_ACT_HID_1d802] = 60,
+ [BNXT_ULP_ACT_HID_21802] = 61,
+ [BNXT_ULP_ACT_HID_25802] = 62,
+ [BNXT_ULP_ACT_HID_1db42] = 63,
+ [BNXT_ULP_ACT_HID_21b42] = 64,
+ [BNXT_ULP_ACT_HID_25b42] = 65,
+ [BNXT_ULP_ACT_HID_1dbc2] = 66,
+ [BNXT_ULP_ACT_HID_21bc2] = 67,
+ [BNXT_ULP_ACT_HID_25bc2] = 68,
+ [BNXT_ULP_ACT_HID_fce0] = 69,
+ [BNXT_ULP_ACT_HID_13ce0] = 70,
+ [BNXT_ULP_ACT_HID_17ce0] = 71,
+ [BNXT_ULP_ACT_HID_fd60] = 72,
+ [BNXT_ULP_ACT_HID_13d60] = 73,
+ [BNXT_ULP_ACT_HID_17d60] = 74,
+ [BNXT_ULP_ACT_HID_e0a0] = 75,
+ [BNXT_ULP_ACT_HID_120a0] = 76,
+ [BNXT_ULP_ACT_HID_160a0] = 77,
+ [BNXT_ULP_ACT_HID_e120] = 78,
+ [BNXT_ULP_ACT_HID_12120] = 79,
+ [BNXT_ULP_ACT_HID_16120] = 80,
+ [BNXT_ULP_ACT_HID_32061] = 81,
+ [BNXT_ULP_ACT_HID_320e1] = 82,
+ [BNXT_ULP_ACT_HID_388a] = 83,
+ [BNXT_ULP_ACT_HID_4000] = 84,
+ [BNXT_ULP_ACT_HID_8000] = 85,
+ [BNXT_ULP_ACT_HID_c000] = 86,
+ [BNXT_ULP_ACT_HID_4080] = 87,
+ [BNXT_ULP_ACT_HID_8080] = 88,
+ [BNXT_ULP_ACT_HID_c080] = 89,
+ [BNXT_ULP_ACT_HID_8880] = 90,
+ [BNXT_ULP_ACT_HID_22100] = 91,
+ [BNXT_ULP_ACT_HID_11100] = 92,
+ [BNXT_ULP_ACT_HID_6420] = 93,
+ [BNXT_ULP_ACT_HID_1fca0] = 94,
+ [BNXT_ULP_ACT_HID_19980] = 95,
+ [BNXT_ULP_ACT_HID_28520] = 96,
+ [BNXT_ULP_ACT_HID_c880] = 97,
+ [BNXT_ULP_ACT_HID_26100] = 98,
+ [BNXT_ULP_ACT_HID_15100] = 99,
+ [BNXT_ULP_ACT_HID_a420] = 100,
+ [BNXT_ULP_ACT_HID_23ca0] = 101,
+ [BNXT_ULP_ACT_HID_1d980] = 102,
+ [BNXT_ULP_ACT_HID_2c520] = 103,
+ [BNXT_ULP_ACT_HID_10880] = 104,
+ [BNXT_ULP_ACT_HID_2a100] = 105,
+ [BNXT_ULP_ACT_HID_19100] = 106,
+ [BNXT_ULP_ACT_HID_e420] = 107,
+ [BNXT_ULP_ACT_HID_27ca0] = 108,
+ [BNXT_ULP_ACT_HID_21980] = 109,
+ [BNXT_ULP_ACT_HID_30520] = 110,
+ [BNXT_ULP_ACT_HID_14880] = 111,
+ [BNXT_ULP_ACT_HID_2e100] = 112,
+ [BNXT_ULP_ACT_HID_1d100] = 113,
+ [BNXT_ULP_ACT_HID_12420] = 114,
+ [BNXT_ULP_ACT_HID_2bca0] = 115,
+ [BNXT_ULP_ACT_HID_25980] = 116,
+ [BNXT_ULP_ACT_HID_34520] = 117,
+ [BNXT_ULP_ACT_HID_8900] = 118,
+ [BNXT_ULP_ACT_HID_22180] = 119,
+ [BNXT_ULP_ACT_HID_11180] = 120,
+ [BNXT_ULP_ACT_HID_64a0] = 121,
+ [BNXT_ULP_ACT_HID_1fd20] = 122,
+ [BNXT_ULP_ACT_HID_19a00] = 123,
+ [BNXT_ULP_ACT_HID_285a0] = 124,
+ [BNXT_ULP_ACT_HID_c900] = 125,
+ [BNXT_ULP_ACT_HID_26180] = 126,
+ [BNXT_ULP_ACT_HID_15180] = 127,
+ [BNXT_ULP_ACT_HID_a4a0] = 128,
+ [BNXT_ULP_ACT_HID_23d20] = 129,
+ [BNXT_ULP_ACT_HID_1da00] = 130,
+ [BNXT_ULP_ACT_HID_2c5a0] = 131,
+ [BNXT_ULP_ACT_HID_10900] = 132,
+ [BNXT_ULP_ACT_HID_2a180] = 133,
+ [BNXT_ULP_ACT_HID_19180] = 134,
+ [BNXT_ULP_ACT_HID_e4a0] = 135,
+ [BNXT_ULP_ACT_HID_27d20] = 136,
+ [BNXT_ULP_ACT_HID_21a00] = 137,
+ [BNXT_ULP_ACT_HID_305a0] = 138,
+ [BNXT_ULP_ACT_HID_14900] = 139,
+ [BNXT_ULP_ACT_HID_2e180] = 140,
+ [BNXT_ULP_ACT_HID_1d180] = 141,
+ [BNXT_ULP_ACT_HID_124a0] = 142,
+ [BNXT_ULP_ACT_HID_2bd20] = 143,
+ [BNXT_ULP_ACT_HID_25a00] = 144,
+ [BNXT_ULP_ACT_HID_345a0] = 145,
+ [BNXT_ULP_ACT_HID_154c0] = 146,
+ [BNXT_ULP_ACT_HID_2ed40] = 147,
+ [BNXT_ULP_ACT_HID_1dd40] = 148,
+ [BNXT_ULP_ACT_HID_13060] = 149,
+ [BNXT_ULP_ACT_HID_2c8e0] = 150,
+ [BNXT_ULP_ACT_HID_35160] = 151,
+ [BNXT_ULP_ACT_HID_15540] = 152,
+ [BNXT_ULP_ACT_HID_2edc0] = 153,
+ [BNXT_ULP_ACT_HID_1ddc0] = 154,
+ [BNXT_ULP_ACT_HID_130e0] = 155,
+ [BNXT_ULP_ACT_HID_2c960] = 156,
+ [BNXT_ULP_ACT_HID_351e0] = 157,
+ [BNXT_ULP_ACT_HID_194c0] = 158,
+ [BNXT_ULP_ACT_HID_32d40] = 159,
+ [BNXT_ULP_ACT_HID_21d40] = 160,
+ [BNXT_ULP_ACT_HID_17060] = 161,
+ [BNXT_ULP_ACT_HID_308e0] = 162,
+ [BNXT_ULP_ACT_HID_39160] = 163,
+ [BNXT_ULP_ACT_HID_19540] = 164,
+ [BNXT_ULP_ACT_HID_32dc0] = 165,
+ [BNXT_ULP_ACT_HID_21dc0] = 166,
+ [BNXT_ULP_ACT_HID_170e0] = 167,
+ [BNXT_ULP_ACT_HID_30960] = 168,
+ [BNXT_ULP_ACT_HID_391e0] = 169,
+ [BNXT_ULP_ACT_HID_1d4c0] = 170,
+ [BNXT_ULP_ACT_HID_36d40] = 171,
+ [BNXT_ULP_ACT_HID_25d40] = 172,
+ [BNXT_ULP_ACT_HID_1b060] = 173,
+ [BNXT_ULP_ACT_HID_348e0] = 174,
+ [BNXT_ULP_ACT_HID_3d160] = 175,
+ [BNXT_ULP_ACT_HID_1d540] = 176,
+ [BNXT_ULP_ACT_HID_36dc0] = 177,
+ [BNXT_ULP_ACT_HID_25dc0] = 178,
+ [BNXT_ULP_ACT_HID_1b0e0] = 179,
+ [BNXT_ULP_ACT_HID_34960] = 180,
+ [BNXT_ULP_ACT_HID_3d1e0] = 181,
+ [BNXT_ULP_ACT_HID_214c0] = 182,
+ [BNXT_ULP_ACT_HID_3ad40] = 183,
+ [BNXT_ULP_ACT_HID_29d40] = 184,
+ [BNXT_ULP_ACT_HID_1f060] = 185,
+ [BNXT_ULP_ACT_HID_388e0] = 186,
+ [BNXT_ULP_ACT_HID_3380] = 187,
+ [BNXT_ULP_ACT_HID_21540] = 188,
+ [BNXT_ULP_ACT_HID_3adc0] = 189,
+ [BNXT_ULP_ACT_HID_29dc0] = 190,
+ [BNXT_ULP_ACT_HID_1f0e0] = 191,
+ [BNXT_ULP_ACT_HID_38960] = 192,
+ [BNXT_ULP_ACT_HID_3400] = 193,
+ [BNXT_ULP_ACT_HID_1d742] = 194,
+ [BNXT_ULP_ACT_HID_21742] = 195,
+ [BNXT_ULP_ACT_HID_25742] = 196,
+ [BNXT_ULP_ACT_HID_1d7c2] = 197,
+ [BNXT_ULP_ACT_HID_217c2] = 198,
+ [BNXT_ULP_ACT_HID_257c2] = 199,
+ [BNXT_ULP_ACT_HID_21fc2] = 200,
+ [BNXT_ULP_ACT_HID_3b842] = 201,
+ [BNXT_ULP_ACT_HID_2a842] = 202,
+ [BNXT_ULP_ACT_HID_1fb62] = 203,
+ [BNXT_ULP_ACT_HID_393e2] = 204,
+ [BNXT_ULP_ACT_HID_330c2] = 205,
+ [BNXT_ULP_ACT_HID_3e82] = 206,
+ [BNXT_ULP_ACT_HID_25fc2] = 207,
+ [BNXT_ULP_ACT_HID_1a62] = 208,
+ [BNXT_ULP_ACT_HID_2e842] = 209,
+ [BNXT_ULP_ACT_HID_23b62] = 210,
+ [BNXT_ULP_ACT_HID_3d3e2] = 211,
+ [BNXT_ULP_ACT_HID_370c2] = 212,
+ [BNXT_ULP_ACT_HID_7e82] = 213,
+ [BNXT_ULP_ACT_HID_29fc2] = 214,
+ [BNXT_ULP_ACT_HID_5a62] = 215,
+ [BNXT_ULP_ACT_HID_32842] = 216,
+ [BNXT_ULP_ACT_HID_27b62] = 217,
+ [BNXT_ULP_ACT_HID_3602] = 218,
+ [BNXT_ULP_ACT_HID_3b0c2] = 219,
+ [BNXT_ULP_ACT_HID_be82] = 220,
+ [BNXT_ULP_ACT_HID_2dfc2] = 221,
+ [BNXT_ULP_ACT_HID_9a62] = 222,
+ [BNXT_ULP_ACT_HID_36842] = 223,
+ [BNXT_ULP_ACT_HID_2bb62] = 224,
+ [BNXT_ULP_ACT_HID_7602] = 225,
+ [BNXT_ULP_ACT_HID_12e2] = 226,
+ [BNXT_ULP_ACT_HID_fe82] = 227,
+ [BNXT_ULP_ACT_HID_22042] = 228,
+ [BNXT_ULP_ACT_HID_3b8c2] = 229,
+ [BNXT_ULP_ACT_HID_2a8c2] = 230,
+ [BNXT_ULP_ACT_HID_1fbe2] = 231,
+ [BNXT_ULP_ACT_HID_39462] = 232,
+ [BNXT_ULP_ACT_HID_33142] = 233,
+ [BNXT_ULP_ACT_HID_3f02] = 234,
+ [BNXT_ULP_ACT_HID_26042] = 235,
+ [BNXT_ULP_ACT_HID_1ae2] = 236,
+ [BNXT_ULP_ACT_HID_2e8c2] = 237,
+ [BNXT_ULP_ACT_HID_23be2] = 238,
+ [BNXT_ULP_ACT_HID_3d462] = 239,
+ [BNXT_ULP_ACT_HID_37142] = 240,
+ [BNXT_ULP_ACT_HID_7f02] = 241,
+ [BNXT_ULP_ACT_HID_2a042] = 242,
+ [BNXT_ULP_ACT_HID_5ae2] = 243,
+ [BNXT_ULP_ACT_HID_328c2] = 244,
+ [BNXT_ULP_ACT_HID_27be2] = 245,
+ [BNXT_ULP_ACT_HID_3682] = 246,
+ [BNXT_ULP_ACT_HID_3b142] = 247,
+ [BNXT_ULP_ACT_HID_bf02] = 248,
+ [BNXT_ULP_ACT_HID_2e042] = 249,
+ [BNXT_ULP_ACT_HID_9ae2] = 250,
+ [BNXT_ULP_ACT_HID_368c2] = 251,
+ [BNXT_ULP_ACT_HID_2bbe2] = 252,
+ [BNXT_ULP_ACT_HID_7682] = 253,
+ [BNXT_ULP_ACT_HID_1362] = 254,
+ [BNXT_ULP_ACT_HID_ff02] = 255,
+ [BNXT_ULP_ACT_HID_2ec02] = 256,
+ [BNXT_ULP_ACT_HID_a6a2] = 257,
+ [BNXT_ULP_ACT_HID_37482] = 258,
+ [BNXT_ULP_ACT_HID_2c7a2] = 259,
+ [BNXT_ULP_ACT_HID_8242] = 260,
+ [BNXT_ULP_ACT_HID_10ac2] = 261,
+ [BNXT_ULP_ACT_HID_2ec82] = 262,
+ [BNXT_ULP_ACT_HID_a722] = 263,
+ [BNXT_ULP_ACT_HID_37502] = 264,
+ [BNXT_ULP_ACT_HID_2c822] = 265,
+ [BNXT_ULP_ACT_HID_82c2] = 266,
+ [BNXT_ULP_ACT_HID_10b42] = 267,
+ [BNXT_ULP_ACT_HID_32c02] = 268,
+ [BNXT_ULP_ACT_HID_e6a2] = 269,
+ [BNXT_ULP_ACT_HID_3b482] = 270,
+ [BNXT_ULP_ACT_HID_307a2] = 271,
+ [BNXT_ULP_ACT_HID_c242] = 272,
+ [BNXT_ULP_ACT_HID_14ac2] = 273,
+ [BNXT_ULP_ACT_HID_32c82] = 274,
+ [BNXT_ULP_ACT_HID_e722] = 275,
+ [BNXT_ULP_ACT_HID_3b502] = 276,
+ [BNXT_ULP_ACT_HID_30822] = 277,
+ [BNXT_ULP_ACT_HID_c2c2] = 278,
+ [BNXT_ULP_ACT_HID_14b42] = 279,
+ [BNXT_ULP_ACT_HID_36c02] = 280,
+ [BNXT_ULP_ACT_HID_126a2] = 281,
+ [BNXT_ULP_ACT_HID_16a2] = 282,
+ [BNXT_ULP_ACT_HID_347a2] = 283,
+ [BNXT_ULP_ACT_HID_10242] = 284,
+ [BNXT_ULP_ACT_HID_18ac2] = 285,
+ [BNXT_ULP_ACT_HID_36c82] = 286,
+ [BNXT_ULP_ACT_HID_12722] = 287,
+ [BNXT_ULP_ACT_HID_1722] = 288,
+ [BNXT_ULP_ACT_HID_34822] = 289,
+ [BNXT_ULP_ACT_HID_102c2] = 290,
+ [BNXT_ULP_ACT_HID_18b42] = 291,
+ [BNXT_ULP_ACT_HID_3ac02] = 292,
+ [BNXT_ULP_ACT_HID_166a2] = 293,
+ [BNXT_ULP_ACT_HID_56a2] = 294,
+ [BNXT_ULP_ACT_HID_387a2] = 295,
+ [BNXT_ULP_ACT_HID_14242] = 296,
+ [BNXT_ULP_ACT_HID_1cac2] = 297,
+ [BNXT_ULP_ACT_HID_3ac82] = 298,
+ [BNXT_ULP_ACT_HID_16722] = 299,
+ [BNXT_ULP_ACT_HID_5722] = 300,
+ [BNXT_ULP_ACT_HID_38822] = 301,
+ [BNXT_ULP_ACT_HID_142c2] = 302,
+ [BNXT_ULP_ACT_HID_1cb42] = 303,
+ [BNXT_ULP_ACT_HID_12520] = 304,
+ [BNXT_ULP_ACT_HID_2bda0] = 305,
+ [BNXT_ULP_ACT_HID_1ada0] = 306,
+ [BNXT_ULP_ACT_HID_120c0] = 307,
+ [BNXT_ULP_ACT_HID_2b940] = 308,
+ [BNXT_ULP_ACT_HID_23620] = 309,
+ [BNXT_ULP_ACT_HID_321c0] = 310,
+ [BNXT_ULP_ACT_HID_125a0] = 311,
+ [BNXT_ULP_ACT_HID_2be20] = 312,
+ [BNXT_ULP_ACT_HID_1ae20] = 313,
+ [BNXT_ULP_ACT_HID_12140] = 314,
+ [BNXT_ULP_ACT_HID_2b9c0] = 315,
+ [BNXT_ULP_ACT_HID_236a0] = 316,
+ [BNXT_ULP_ACT_HID_32240] = 317,
+ [BNXT_ULP_ACT_HID_1f160] = 318,
+ [BNXT_ULP_ACT_HID_3a9e0] = 319,
+ [BNXT_ULP_ACT_HID_279e0] = 320,
+ [BNXT_ULP_ACT_HID_1ed00] = 321,
+ [BNXT_ULP_ACT_HID_36580] = 322,
+ [BNXT_ULP_ACT_HID_3020] = 323,
+ [BNXT_ULP_ACT_HID_1f1e0] = 324,
+ [BNXT_ULP_ACT_HID_3aa60] = 325,
+ [BNXT_ULP_ACT_HID_27a60] = 326,
+ [BNXT_ULP_ACT_HID_1ed80] = 327,
+ [BNXT_ULP_ACT_HID_36600] = 328,
+ [BNXT_ULP_ACT_HID_30a0] = 329,
+ [BNXT_ULP_ACT_HID_0100] = 330,
+ [BNXT_ULP_ACT_HID_0180] = 331,
+ [BNXT_ULP_ACT_HID_32e84] = 332,
+ [BNXT_ULP_ACT_HID_32f04] = 333,
+ [BNXT_ULP_ACT_HID_19842] = 334,
+ [BNXT_ULP_ACT_HID_198c2] = 335,
+ [BNXT_ULP_ACT_HID_e7e6] = 336,
+ [BNXT_ULP_ACT_HID_e866] = 337,
+ [BNXT_ULP_ACT_HID_a3e0] = 338,
+ [BNXT_ULP_ACT_HID_240e0] = 339,
+ [BNXT_ULP_ACT_HID_322c8] = 340,
+ [BNXT_ULP_ACT_HID_e228] = 341,
+ [BNXT_ULP_ACT_HID_36130] = 342,
+ [BNXT_ULP_ACT_HID_2e840] = 343,
+ [BNXT_ULP_ACT_HID_2e880] = 344,
+ [BNXT_ULP_ACT_HID_2e900] = 345,
+ [BNXT_ULP_ACT_HID_170c0] = 346,
+ [BNXT_ULP_ACT_HID_14ea0] = 347,
+ [BNXT_ULP_ACT_HID_3b480] = 348,
+ [BNXT_ULP_ACT_HID_23d00] = 349,
+ [BNXT_ULP_ACT_HID_21ae0] = 350,
+ [BNXT_ULP_ACT_HID_2e8c0] = 351,
+ [BNXT_ULP_ACT_HID_17140] = 352,
+ [BNXT_ULP_ACT_HID_14f20] = 353,
+ [BNXT_ULP_ACT_HID_3b500] = 354,
+ [BNXT_ULP_ACT_HID_23d80] = 355,
+ [BNXT_ULP_ACT_HID_21b60] = 356,
+ [BNXT_ULP_ACT_HID_a1a2] = 357,
+ [BNXT_ULP_ACT_HID_a1e2] = 358,
+ [BNXT_ULP_ACT_HID_a262] = 359,
+ [BNXT_ULP_ACT_HID_30802] = 360,
+ [BNXT_ULP_ACT_HID_2e5e2] = 361,
+ [BNXT_ULP_ACT_HID_16de2] = 362,
+ [BNXT_ULP_ACT_HID_3d442] = 363,
+ [BNXT_ULP_ACT_HID_3b222] = 364,
+ [BNXT_ULP_ACT_HID_a222] = 365,
+ [BNXT_ULP_ACT_HID_30882] = 366,
+ [BNXT_ULP_ACT_HID_2e662] = 367,
+ [BNXT_ULP_ACT_HID_16e62] = 368,
+ [BNXT_ULP_ACT_HID_3d4c2] = 369,
+ [BNXT_ULP_ACT_HID_3b2a2] = 370,
+ [BNXT_ULP_ACT_HID_3a4e0] = 371,
+ [BNXT_ULP_ACT_HID_3a520] = 372,
+ [BNXT_ULP_ACT_HID_3a5a0] = 373,
+ [BNXT_ULP_ACT_HID_22d60] = 374,
+ [BNXT_ULP_ACT_HID_1eb40] = 375,
+ [BNXT_ULP_ACT_HID_7340] = 376,
+ [BNXT_ULP_ACT_HID_2f9a0] = 377,
+ [BNXT_ULP_ACT_HID_2b780] = 378,
+ [BNXT_ULP_ACT_HID_3a560] = 379,
+ [BNXT_ULP_ACT_HID_22de0] = 380,
+ [BNXT_ULP_ACT_HID_1ebc0] = 381,
+ [BNXT_ULP_ACT_HID_73c0] = 382,
+ [BNXT_ULP_ACT_HID_2fa20] = 383,
+ [BNXT_ULP_ACT_HID_2b800] = 384,
+ [BNXT_ULP_ACT_HID_32840] = 385,
+ [BNXT_ULP_ACT_HID_36840] = 386,
+ [BNXT_ULP_ACT_HID_3a840] = 387,
+ [BNXT_ULP_ACT_HID_328c0] = 388,
+ [BNXT_ULP_ACT_HID_368c0] = 389,
+ [BNXT_ULP_ACT_HID_3a8c0] = 390,
+ [BNXT_ULP_ACT_HID_370c0] = 391,
+ [BNXT_ULP_ACT_HID_12b60] = 392,
+ [BNXT_ULP_ACT_HID_1b60] = 393,
+ [BNXT_ULP_ACT_HID_34c60] = 394,
+ [BNXT_ULP_ACT_HID_10700] = 395,
+ [BNXT_ULP_ACT_HID_18f80] = 396,
+ [BNXT_ULP_ACT_HID_3b0c0] = 397,
+ [BNXT_ULP_ACT_HID_16b60] = 398,
+ [BNXT_ULP_ACT_HID_5b60] = 399,
+ [BNXT_ULP_ACT_HID_38c60] = 400,
+ [BNXT_ULP_ACT_HID_14700] = 401,
+ [BNXT_ULP_ACT_HID_1cf80] = 402,
+ [BNXT_ULP_ACT_HID_12e0] = 403,
+ [BNXT_ULP_ACT_HID_1ab60] = 404,
+ [BNXT_ULP_ACT_HID_9b60] = 405,
+ [BNXT_ULP_ACT_HID_3cc60] = 406,
+ [BNXT_ULP_ACT_HID_18700] = 407,
+ [BNXT_ULP_ACT_HID_20f80] = 408,
+ [BNXT_ULP_ACT_HID_52e0] = 409,
+ [BNXT_ULP_ACT_HID_1eb60] = 410,
+ [BNXT_ULP_ACT_HID_db60] = 411,
+ [BNXT_ULP_ACT_HID_2e80] = 412,
+ [BNXT_ULP_ACT_HID_1c700] = 413,
+ [BNXT_ULP_ACT_HID_24f80] = 414,
+ [BNXT_ULP_ACT_HID_37140] = 415,
+ [BNXT_ULP_ACT_HID_12be0] = 416,
+ [BNXT_ULP_ACT_HID_1be0] = 417,
+ [BNXT_ULP_ACT_HID_34ce0] = 418,
+ [BNXT_ULP_ACT_HID_10780] = 419,
+ [BNXT_ULP_ACT_HID_19000] = 420,
+ [BNXT_ULP_ACT_HID_3b140] = 421,
+ [BNXT_ULP_ACT_HID_16be0] = 422,
+ [BNXT_ULP_ACT_HID_5be0] = 423,
+ [BNXT_ULP_ACT_HID_38ce0] = 424,
+ [BNXT_ULP_ACT_HID_14780] = 425,
+ [BNXT_ULP_ACT_HID_1d000] = 426,
+ [BNXT_ULP_ACT_HID_1360] = 427,
+ [BNXT_ULP_ACT_HID_1abe0] = 428,
+ [BNXT_ULP_ACT_HID_9be0] = 429,
+ [BNXT_ULP_ACT_HID_3cce0] = 430,
+ [BNXT_ULP_ACT_HID_18780] = 431,
+ [BNXT_ULP_ACT_HID_21000] = 432,
+ [BNXT_ULP_ACT_HID_5360] = 433,
+ [BNXT_ULP_ACT_HID_1ebe0] = 434,
+ [BNXT_ULP_ACT_HID_dbe0] = 435,
+ [BNXT_ULP_ACT_HID_2f00] = 436,
+ [BNXT_ULP_ACT_HID_1c780] = 437,
+ [BNXT_ULP_ACT_HID_25000] = 438,
+ [BNXT_ULP_ACT_HID_5f20] = 439,
+ [BNXT_ULP_ACT_HID_1f7a0] = 440,
+ [BNXT_ULP_ACT_HID_e7a0] = 441,
+ [BNXT_ULP_ACT_HID_3ac0] = 442,
+ [BNXT_ULP_ACT_HID_1d340] = 443,
+ [BNXT_ULP_ACT_HID_25bc0] = 444,
+ [BNXT_ULP_ACT_HID_5fa0] = 445,
+ [BNXT_ULP_ACT_HID_1f820] = 446,
+ [BNXT_ULP_ACT_HID_e820] = 447,
+ [BNXT_ULP_ACT_HID_3b40] = 448,
+ [BNXT_ULP_ACT_HID_1d3c0] = 449,
+ [BNXT_ULP_ACT_HID_25c40] = 450,
+ [BNXT_ULP_ACT_HID_237a0] = 451,
+ [BNXT_ULP_ACT_HID_127a0] = 452,
+ [BNXT_ULP_ACT_HID_7ac0] = 453,
+ [BNXT_ULP_ACT_HID_9f20] = 454,
+ [BNXT_ULP_ACT_HID_21340] = 455,
+ [BNXT_ULP_ACT_HID_29bc0] = 456,
+ [BNXT_ULP_ACT_HID_9fa0] = 457,
+ [BNXT_ULP_ACT_HID_23820] = 458,
+ [BNXT_ULP_ACT_HID_12820] = 459,
+ [BNXT_ULP_ACT_HID_7b40] = 460,
+ [BNXT_ULP_ACT_HID_213c0] = 461,
+ [BNXT_ULP_ACT_HID_29c40] = 462,
+ [BNXT_ULP_ACT_HID_df20] = 463,
+ [BNXT_ULP_ACT_HID_277a0] = 464,
+ [BNXT_ULP_ACT_HID_167a0] = 465,
+ [BNXT_ULP_ACT_HID_bac0] = 466,
+ [BNXT_ULP_ACT_HID_25340] = 467,
+ [BNXT_ULP_ACT_HID_2dbc0] = 468,
+ [BNXT_ULP_ACT_HID_dfa0] = 469,
+ [BNXT_ULP_ACT_HID_27820] = 470,
+ [BNXT_ULP_ACT_HID_16820] = 471,
+ [BNXT_ULP_ACT_HID_bb40] = 472,
+ [BNXT_ULP_ACT_HID_253c0] = 473,
+ [BNXT_ULP_ACT_HID_2dc40] = 474,
+ [BNXT_ULP_ACT_HID_11f20] = 475,
+ [BNXT_ULP_ACT_HID_2b7a0] = 476,
+ [BNXT_ULP_ACT_HID_1a7a0] = 477,
+ [BNXT_ULP_ACT_HID_fac0] = 478,
+ [BNXT_ULP_ACT_HID_29340] = 479,
+ [BNXT_ULP_ACT_HID_31bc0] = 480,
+ [BNXT_ULP_ACT_HID_11fa0] = 481,
+ [BNXT_ULP_ACT_HID_2b820] = 482,
+ [BNXT_ULP_ACT_HID_1a820] = 483,
+ [BNXT_ULP_ACT_HID_fb40] = 484,
+ [BNXT_ULP_ACT_HID_293c0] = 485,
+ [BNXT_ULP_ACT_HID_31c40] = 486,
+ [BNXT_ULP_ACT_HID_e1a2] = 487,
+ [BNXT_ULP_ACT_HID_121a2] = 488,
+ [BNXT_ULP_ACT_HID_161a2] = 489,
+ [BNXT_ULP_ACT_HID_e222] = 490,
+ [BNXT_ULP_ACT_HID_12222] = 491,
+ [BNXT_ULP_ACT_HID_16222] = 492,
+ [BNXT_ULP_ACT_HID_12a22] = 493,
+ [BNXT_ULP_ACT_HID_2c2a2] = 494,
+ [BNXT_ULP_ACT_HID_1b2a2] = 495,
+ [BNXT_ULP_ACT_HID_105c2] = 496,
+ [BNXT_ULP_ACT_HID_29e42] = 497,
+ [BNXT_ULP_ACT_HID_326c2] = 498,
+ [BNXT_ULP_ACT_HID_16a22] = 499,
+ [BNXT_ULP_ACT_HID_302a2] = 500,
+ [BNXT_ULP_ACT_HID_1f2a2] = 501,
+ [BNXT_ULP_ACT_HID_145c2] = 502,
+ [BNXT_ULP_ACT_HID_2de42] = 503,
+ [BNXT_ULP_ACT_HID_366c2] = 504,
+ [BNXT_ULP_ACT_HID_1aa22] = 505,
+ [BNXT_ULP_ACT_HID_342a2] = 506,
+ [BNXT_ULP_ACT_HID_232a2] = 507,
+ [BNXT_ULP_ACT_HID_185c2] = 508,
+ [BNXT_ULP_ACT_HID_31e42] = 509,
+ [BNXT_ULP_ACT_HID_3a6c2] = 510,
+ [BNXT_ULP_ACT_HID_1ea22] = 511,
+ [BNXT_ULP_ACT_HID_382a2] = 512,
+ [BNXT_ULP_ACT_HID_272a2] = 513,
+ [BNXT_ULP_ACT_HID_1c5c2] = 514,
+ [BNXT_ULP_ACT_HID_35e42] = 515,
+ [BNXT_ULP_ACT_HID_08e2] = 516,
+ [BNXT_ULP_ACT_HID_12aa2] = 517,
+ [BNXT_ULP_ACT_HID_2c322] = 518,
+ [BNXT_ULP_ACT_HID_1b322] = 519,
+ [BNXT_ULP_ACT_HID_10642] = 520,
+ [BNXT_ULP_ACT_HID_29ec2] = 521,
+ [BNXT_ULP_ACT_HID_32742] = 522,
+ [BNXT_ULP_ACT_HID_16aa2] = 523,
+ [BNXT_ULP_ACT_HID_30322] = 524,
+ [BNXT_ULP_ACT_HID_1f322] = 525,
+ [BNXT_ULP_ACT_HID_14642] = 526,
+ [BNXT_ULP_ACT_HID_2dec2] = 527,
+ [BNXT_ULP_ACT_HID_36742] = 528,
+ [BNXT_ULP_ACT_HID_1aaa2] = 529,
+ [BNXT_ULP_ACT_HID_34322] = 530,
+ [BNXT_ULP_ACT_HID_23322] = 531,
+ [BNXT_ULP_ACT_HID_18642] = 532,
+ [BNXT_ULP_ACT_HID_31ec2] = 533,
+ [BNXT_ULP_ACT_HID_3a742] = 534,
+ [BNXT_ULP_ACT_HID_1eaa2] = 535,
+ [BNXT_ULP_ACT_HID_38322] = 536,
+ [BNXT_ULP_ACT_HID_27322] = 537,
+ [BNXT_ULP_ACT_HID_1c642] = 538,
+ [BNXT_ULP_ACT_HID_35ec2] = 539,
+ [BNXT_ULP_ACT_HID_0962] = 540,
+ [BNXT_ULP_ACT_HID_1f662] = 541,
+ [BNXT_ULP_ACT_HID_38ee2] = 542,
+ [BNXT_ULP_ACT_HID_27ee2] = 543,
+ [BNXT_ULP_ACT_HID_1d202] = 544,
+ [BNXT_ULP_ACT_HID_36a82] = 545,
+ [BNXT_ULP_ACT_HID_1522] = 546,
+ [BNXT_ULP_ACT_HID_1f6e2] = 547,
+ [BNXT_ULP_ACT_HID_38f62] = 548,
+ [BNXT_ULP_ACT_HID_27f62] = 549,
+ [BNXT_ULP_ACT_HID_1d282] = 550,
+ [BNXT_ULP_ACT_HID_36b02] = 551,
+ [BNXT_ULP_ACT_HID_15a2] = 552,
+ [BNXT_ULP_ACT_HID_3cee2] = 553,
+ [BNXT_ULP_ACT_HID_2bee2] = 554,
+ [BNXT_ULP_ACT_HID_21202] = 555,
+ [BNXT_ULP_ACT_HID_23662] = 556,
+ [BNXT_ULP_ACT_HID_3aa82] = 557,
+ [BNXT_ULP_ACT_HID_5522] = 558,
+ [BNXT_ULP_ACT_HID_236e2] = 559,
+ [BNXT_ULP_ACT_HID_3cf62] = 560,
+ [BNXT_ULP_ACT_HID_2bf62] = 561,
+ [BNXT_ULP_ACT_HID_21282] = 562,
+ [BNXT_ULP_ACT_HID_3ab02] = 563,
+ [BNXT_ULP_ACT_HID_55a2] = 564,
+ [BNXT_ULP_ACT_HID_27662] = 565,
+ [BNXT_ULP_ACT_HID_3102] = 566,
+ [BNXT_ULP_ACT_HID_2fee2] = 567,
+ [BNXT_ULP_ACT_HID_25202] = 568,
+ [BNXT_ULP_ACT_HID_0ca2] = 569,
+ [BNXT_ULP_ACT_HID_9522] = 570,
+ [BNXT_ULP_ACT_HID_276e2] = 571,
+ [BNXT_ULP_ACT_HID_3182] = 572,
+ [BNXT_ULP_ACT_HID_2ff62] = 573,
+ [BNXT_ULP_ACT_HID_25282] = 574,
+ [BNXT_ULP_ACT_HID_0d22] = 575,
+ [BNXT_ULP_ACT_HID_95a2] = 576,
+ [BNXT_ULP_ACT_HID_2b662] = 577,
+ [BNXT_ULP_ACT_HID_7102] = 578,
+ [BNXT_ULP_ACT_HID_33ee2] = 579,
+ [BNXT_ULP_ACT_HID_29202] = 580,
+ [BNXT_ULP_ACT_HID_4ca2] = 581,
+ [BNXT_ULP_ACT_HID_d522] = 582,
+ [BNXT_ULP_ACT_HID_2b6e2] = 583,
+ [BNXT_ULP_ACT_HID_7182] = 584,
+ [BNXT_ULP_ACT_HID_33f62] = 585,
+ [BNXT_ULP_ACT_HID_29282] = 586,
+ [BNXT_ULP_ACT_HID_4d22] = 587,
+ [BNXT_ULP_ACT_HID_d5a2] = 588,
+ [BNXT_ULP_ACT_HID_3e4e0] = 589,
+ [BNXT_ULP_ACT_HID_2700] = 590,
+ [BNXT_ULP_ACT_HID_6700] = 591,
+ [BNXT_ULP_ACT_HID_3e560] = 592,
+ [BNXT_ULP_ACT_HID_2780] = 593,
+ [BNXT_ULP_ACT_HID_6780] = 594,
+ [BNXT_ULP_ACT_HID_2f80] = 595,
+ [BNXT_ULP_ACT_HID_1e800] = 596,
+ [BNXT_ULP_ACT_HID_b800] = 597,
+ [BNXT_ULP_ACT_HID_2b20] = 598,
+ [BNXT_ULP_ACT_HID_1a3a0] = 599,
+ [BNXT_ULP_ACT_HID_22c20] = 600,
+ [BNXT_ULP_ACT_HID_6f80] = 601,
+ [BNXT_ULP_ACT_HID_22800] = 602,
+ [BNXT_ULP_ACT_HID_f800] = 603,
+ [BNXT_ULP_ACT_HID_6b20] = 604,
+ [BNXT_ULP_ACT_HID_1e3a0] = 605,
+ [BNXT_ULP_ACT_HID_26c20] = 606,
+ [BNXT_ULP_ACT_HID_af80] = 607,
+ [BNXT_ULP_ACT_HID_26800] = 608,
+ [BNXT_ULP_ACT_HID_13800] = 609,
+ [BNXT_ULP_ACT_HID_ab20] = 610,
+ [BNXT_ULP_ACT_HID_223a0] = 611,
+ [BNXT_ULP_ACT_HID_2ac20] = 612,
+ [BNXT_ULP_ACT_HID_ef80] = 613,
+ [BNXT_ULP_ACT_HID_2a800] = 614,
+ [BNXT_ULP_ACT_HID_17800] = 615,
+ [BNXT_ULP_ACT_HID_eb20] = 616,
+ [BNXT_ULP_ACT_HID_263a0] = 617,
+ [BNXT_ULP_ACT_HID_2ec20] = 618,
+ [BNXT_ULP_ACT_HID_3000] = 619,
+ [BNXT_ULP_ACT_HID_1e880] = 620,
+ [BNXT_ULP_ACT_HID_b880] = 621,
+ [BNXT_ULP_ACT_HID_2ba0] = 622,
+ [BNXT_ULP_ACT_HID_1a420] = 623,
+ [BNXT_ULP_ACT_HID_22ca0] = 624,
+ [BNXT_ULP_ACT_HID_7000] = 625,
+ [BNXT_ULP_ACT_HID_22880] = 626,
+ [BNXT_ULP_ACT_HID_f880] = 627,
+ [BNXT_ULP_ACT_HID_6ba0] = 628,
+ [BNXT_ULP_ACT_HID_1e420] = 629,
+ [BNXT_ULP_ACT_HID_26ca0] = 630,
+ [BNXT_ULP_ACT_HID_b000] = 631,
+ [BNXT_ULP_ACT_HID_26880] = 632,
+ [BNXT_ULP_ACT_HID_13880] = 633,
+ [BNXT_ULP_ACT_HID_aba0] = 634,
+ [BNXT_ULP_ACT_HID_22420] = 635,
+ [BNXT_ULP_ACT_HID_2aca0] = 636,
+ [BNXT_ULP_ACT_HID_f000] = 637,
+ [BNXT_ULP_ACT_HID_2a880] = 638,
+ [BNXT_ULP_ACT_HID_17880] = 639,
+ [BNXT_ULP_ACT_HID_eba0] = 640,
+ [BNXT_ULP_ACT_HID_26420] = 641,
+ [BNXT_ULP_ACT_HID_2eca0] = 642,
+ [BNXT_ULP_ACT_HID_fbc0] = 643,
+ [BNXT_ULP_ACT_HID_2b440] = 644,
+ [BNXT_ULP_ACT_HID_1a440] = 645,
+ [BNXT_ULP_ACT_HID_f760] = 646,
+ [BNXT_ULP_ACT_HID_26fe0] = 647,
+ [BNXT_ULP_ACT_HID_2f860] = 648,
+ [BNXT_ULP_ACT_HID_fc40] = 649,
+ [BNXT_ULP_ACT_HID_2b4c0] = 650,
+ [BNXT_ULP_ACT_HID_1a4c0] = 651,
+ [BNXT_ULP_ACT_HID_f7e0] = 652,
+ [BNXT_ULP_ACT_HID_27060] = 653,
+ [BNXT_ULP_ACT_HID_2f8e0] = 654,
+ [BNXT_ULP_ACT_HID_2f440] = 655,
+ [BNXT_ULP_ACT_HID_1e440] = 656,
+ [BNXT_ULP_ACT_HID_13760] = 657,
+ [BNXT_ULP_ACT_HID_13bc0] = 658,
+ [BNXT_ULP_ACT_HID_2afe0] = 659,
+ [BNXT_ULP_ACT_HID_33860] = 660,
+ [BNXT_ULP_ACT_HID_13c40] = 661,
+ [BNXT_ULP_ACT_HID_2f4c0] = 662,
+ [BNXT_ULP_ACT_HID_1e4c0] = 663,
+ [BNXT_ULP_ACT_HID_137e0] = 664,
+ [BNXT_ULP_ACT_HID_2b060] = 665,
+ [BNXT_ULP_ACT_HID_338e0] = 666,
+ [BNXT_ULP_ACT_HID_17bc0] = 667,
+ [BNXT_ULP_ACT_HID_33440] = 668,
+ [BNXT_ULP_ACT_HID_22440] = 669,
+ [BNXT_ULP_ACT_HID_17760] = 670,
+ [BNXT_ULP_ACT_HID_2efe0] = 671,
+ [BNXT_ULP_ACT_HID_37860] = 672,
+ [BNXT_ULP_ACT_HID_17c40] = 673,
+ [BNXT_ULP_ACT_HID_334c0] = 674,
+ [BNXT_ULP_ACT_HID_224c0] = 675,
+ [BNXT_ULP_ACT_HID_177e0] = 676,
+ [BNXT_ULP_ACT_HID_2f060] = 677,
+ [BNXT_ULP_ACT_HID_378e0] = 678,
+ [BNXT_ULP_ACT_HID_1bbc0] = 679,
+ [BNXT_ULP_ACT_HID_37440] = 680,
+ [BNXT_ULP_ACT_HID_26440] = 681,
+ [BNXT_ULP_ACT_HID_1b760] = 682,
+ [BNXT_ULP_ACT_HID_32fe0] = 683,
+ [BNXT_ULP_ACT_HID_3b860] = 684,
+ [BNXT_ULP_ACT_HID_1bc40] = 685,
+ [BNXT_ULP_ACT_HID_374c0] = 686,
+ [BNXT_ULP_ACT_HID_264c0] = 687,
+ [BNXT_ULP_ACT_HID_1b7e0] = 688,
+ [BNXT_ULP_ACT_HID_33060] = 689,
+ [BNXT_ULP_ACT_HID_3b8e0] = 690,
+ [BNXT_ULP_ACT_HID_18e80] = 691,
+ [BNXT_ULP_ACT_HID_18f00] = 692,
+ [BNXT_ULP_ACT_HID_1ce80] = 693,
+ [BNXT_ULP_ACT_HID_1cf00] = 694,
+ [BNXT_ULP_ACT_HID_20e80] = 695,
+ [BNXT_ULP_ACT_HID_20f00] = 696,
+ [BNXT_ULP_ACT_HID_24e80] = 697,
+ [BNXT_ULP_ACT_HID_24f00] = 698,
+ [BNXT_ULP_ACT_HID_325c2] = 699,
+ [BNXT_ULP_ACT_HID_32642] = 700,
+ [BNXT_ULP_ACT_HID_365c2] = 701,
+ [BNXT_ULP_ACT_HID_36642] = 702,
+ [BNXT_ULP_ACT_HID_3a5c2] = 703,
+ [BNXT_ULP_ACT_HID_3a642] = 704,
+ [BNXT_ULP_ACT_HID_07e2] = 705,
+ [BNXT_ULP_ACT_HID_0862] = 706,
+ [BNXT_ULP_ACT_HID_22b20] = 707,
+ [BNXT_ULP_ACT_HID_22ba0] = 708,
+ [BNXT_ULP_ACT_HID_26b20] = 709,
+ [BNXT_ULP_ACT_HID_26ba0] = 710,
+ [BNXT_ULP_ACT_HID_2ab20] = 711,
+ [BNXT_ULP_ACT_HID_2aba0] = 712,
+ [BNXT_ULP_ACT_HID_2eb20] = 713,
+ [BNXT_ULP_ACT_HID_2eba0] = 714,
+ [BNXT_ULP_ACT_HID_199e0] = 715,
+ [BNXT_ULP_ACT_HID_19960] = 716,
+ [BNXT_ULP_ACT_HID_33122] = 717,
+ [BNXT_ULP_ACT_HID_331a2] = 718,
+ [BNXT_ULP_ACT_HID_23580] = 719,
+ [BNXT_ULP_ACT_HID_23700] = 720,
+ [BNXT_ULP_ACT_HID_db61] = 721,
+ [BNXT_ULP_ACT_HID_dbe1] = 722,
+ [BNXT_ULP_ACT_HID_320ca] = 723
};
/* Array for the act matcher list */
@@ -571,7 +749,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[2] = {
- .act_hid = BNXT_ULP_ACT_HID_0008,
+ .act_hid = BNXT_ULP_ACT_HID_0040,
.act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
@@ -580,7 +758,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[3] = {
- .act_hid = BNXT_ULP_ACT_HID_2000,
+ .act_hid = BNXT_ULP_ACT_HID_10000,
.act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
@@ -589,7 +767,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[4] = {
- .act_hid = BNXT_ULP_ACT_HID_1988,
+ .act_hid = BNXT_ULP_ACT_HID_cc40,
.act_pattern_id = 3,
.app_sig = 0,
.act_sig = { .bits =
@@ -598,7 +776,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[5] = {
- .act_hid = BNXT_ULP_ACT_HID_0080,
+ .act_hid = BNXT_ULP_ACT_HID_0400,
.act_pattern_id = 4,
.app_sig = 0,
.act_sig = { .bits =
@@ -607,7 +785,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[6] = {
- .act_hid = BNXT_ULP_ACT_HID_3988,
+ .act_hid = BNXT_ULP_ACT_HID_1cc40,
.act_pattern_id = 5,
.app_sig = 0,
.act_sig = { .bits =
@@ -617,7 +795,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[7] = {
- .act_hid = BNXT_ULP_ACT_HID_1a08,
+ .act_hid = BNXT_ULP_ACT_HID_d040,
.act_pattern_id = 6,
.app_sig = 0,
.act_sig = { .bits =
@@ -627,7 +805,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[8] = {
- .act_hid = BNXT_ULP_ACT_HID_0010,
+ .act_hid = BNXT_ULP_ACT_HID_0080,
.act_pattern_id = 7,
.app_sig = 0,
.act_sig = { .bits =
@@ -636,7 +814,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[9] = {
- .act_hid = BNXT_ULP_ACT_HID_0040,
+ .act_hid = BNXT_ULP_ACT_HID_0200,
.act_pattern_id = 8,
.app_sig = 0,
.act_sig = { .bits =
@@ -645,7 +823,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[10] = {
- .act_hid = BNXT_ULP_ACT_HID_0050,
+ .act_hid = BNXT_ULP_ACT_HID_0280,
.act_pattern_id = 9,
.app_sig = 0,
.act_sig = { .bits =
@@ -655,7 +833,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[11] = {
- .act_hid = BNXT_ULP_ACT_HID_0018,
+ .act_hid = BNXT_ULP_ACT_HID_00c0,
.act_pattern_id = 10,
.app_sig = 0,
.act_sig = { .bits =
@@ -665,7 +843,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[12] = {
- .act_hid = BNXT_ULP_ACT_HID_2010,
+ .act_hid = BNXT_ULP_ACT_HID_10080,
.act_pattern_id = 11,
.app_sig = 0,
.act_sig = { .bits =
@@ -675,7 +853,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[13] = {
- .act_hid = BNXT_ULP_ACT_HID_1998,
+ .act_hid = BNXT_ULP_ACT_HID_ccc0,
.act_pattern_id = 12,
.app_sig = 0,
.act_sig = { .bits =
@@ -685,7 +863,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[14] = {
- .act_hid = BNXT_ULP_ACT_HID_0090,
+ .act_hid = BNXT_ULP_ACT_HID_0480,
.act_pattern_id = 13,
.app_sig = 0,
.act_sig = { .bits =
@@ -695,7 +873,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[15] = {
- .act_hid = BNXT_ULP_ACT_HID_3998,
+ .act_hid = BNXT_ULP_ACT_HID_1ccc0,
.act_pattern_id = 14,
.app_sig = 0,
.act_sig = { .bits =
@@ -706,7 +884,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[16] = {
- .act_hid = BNXT_ULP_ACT_HID_1a18,
+ .act_hid = BNXT_ULP_ACT_HID_d0c0,
.act_pattern_id = 15,
.app_sig = 0,
.act_sig = { .bits =
@@ -717,7 +895,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[17] = {
- .act_hid = BNXT_ULP_ACT_HID_32ea,
+ .act_hid = BNXT_ULP_ACT_HID_19742,
.act_pattern_id = 16,
.app_sig = 0,
.act_sig = { .bits =
@@ -726,7 +904,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[18] = {
- .act_hid = BNXT_ULP_ACT_HID_32f2,
+ .act_hid = BNXT_ULP_ACT_HID_19782,
.act_pattern_id = 17,
.app_sig = 0,
.act_sig = { .bits =
@@ -736,7 +914,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[19] = {
- .act_hid = BNXT_ULP_ACT_HID_52ea,
+ .act_hid = BNXT_ULP_ACT_HID_29742,
.act_pattern_id = 18,
.app_sig = 0,
.act_sig = { .bits =
@@ -746,7 +924,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[20] = {
- .act_hid = BNXT_ULP_ACT_HID_4c72,
+ .act_hid = BNXT_ULP_ACT_HID_26382,
.act_pattern_id = 19,
.app_sig = 0,
.act_sig = { .bits =
@@ -756,7 +934,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[21] = {
- .act_hid = BNXT_ULP_ACT_HID_336a,
+ .act_hid = BNXT_ULP_ACT_HID_19b42,
.act_pattern_id = 20,
.app_sig = 0,
.act_sig = { .bits =
@@ -766,7 +944,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[22] = {
- .act_hid = BNXT_ULP_ACT_HID_6c72,
+ .act_hid = BNXT_ULP_ACT_HID_36382,
.act_pattern_id = 21,
.app_sig = 0,
.act_sig = { .bits =
@@ -777,7 +955,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[23] = {
- .act_hid = BNXT_ULP_ACT_HID_4cf2,
+ .act_hid = BNXT_ULP_ACT_HID_26782,
.act_pattern_id = 22,
.app_sig = 0,
.act_sig = { .bits =
@@ -788,7 +966,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[24] = {
- .act_hid = BNXT_ULP_ACT_HID_32fa,
+ .act_hid = BNXT_ULP_ACT_HID_197c2,
.act_pattern_id = 23,
.app_sig = 0,
.act_sig = { .bits =
@@ -798,7 +976,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[25] = {
- .act_hid = BNXT_ULP_ACT_HID_3302,
+ .act_hid = BNXT_ULP_ACT_HID_19802,
.act_pattern_id = 24,
.app_sig = 0,
.act_sig = { .bits =
@@ -809,7 +987,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[26] = {
- .act_hid = BNXT_ULP_ACT_HID_52fa,
+ .act_hid = BNXT_ULP_ACT_HID_297c2,
.act_pattern_id = 25,
.app_sig = 0,
.act_sig = { .bits =
@@ -820,7 +998,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[27] = {
- .act_hid = BNXT_ULP_ACT_HID_4c82,
+ .act_hid = BNXT_ULP_ACT_HID_26402,
.act_pattern_id = 26,
.app_sig = 0,
.act_sig = { .bits =
@@ -831,7 +1009,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[28] = {
- .act_hid = BNXT_ULP_ACT_HID_337a,
+ .act_hid = BNXT_ULP_ACT_HID_19bc2,
.act_pattern_id = 27,
.app_sig = 0,
.act_sig = { .bits =
@@ -842,7 +1020,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[29] = {
- .act_hid = BNXT_ULP_ACT_HID_6c82,
+ .act_hid = BNXT_ULP_ACT_HID_36402,
.act_pattern_id = 28,
.app_sig = 0,
.act_sig = { .bits =
@@ -854,7 +1032,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[30] = {
- .act_hid = BNXT_ULP_ACT_HID_4d02,
+ .act_hid = BNXT_ULP_ACT_HID_26802,
.act_pattern_id = 29,
.app_sig = 0,
.act_sig = { .bits =
@@ -866,727 +1044,723 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 1
},
[31] = {
- .act_hid = BNXT_ULP_ACT_HID_0808,
+ .act_hid = BNXT_ULP_ACT_HID_bca0,
.act_pattern_id = 30,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[32] = {
- .act_hid = BNXT_ULP_ACT_HID_1008,
+ .act_hid = BNXT_ULP_ACT_HID_bce0,
.act_pattern_id = 31,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[33] = {
- .act_hid = BNXT_ULP_ACT_HID_1808,
+ .act_hid = BNXT_ULP_ACT_HID_1bca0,
.act_pattern_id = 32,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_POP_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[34] = {
- .act_hid = BNXT_ULP_ACT_HID_0818,
+ .act_hid = BNXT_ULP_ACT_HID_168e0,
.act_pattern_id = 33,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[35] = {
- .act_hid = BNXT_ULP_ACT_HID_1018,
+ .act_hid = BNXT_ULP_ACT_HID_a0a0,
.act_pattern_id = 34,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[36] = {
- .act_hid = BNXT_ULP_ACT_HID_1818,
+ .act_hid = BNXT_ULP_ACT_HID_268e0,
.act_pattern_id = 35,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_POP_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[37] = {
- .act_hid = BNXT_ULP_ACT_HID_0880,
+ .act_hid = BNXT_ULP_ACT_HID_16ce0,
.act_pattern_id = 36,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[38] = {
- .act_hid = BNXT_ULP_ACT_HID_1080,
+ .act_hid = BNXT_ULP_ACT_HID_bd20,
.act_pattern_id = 37,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[39] = {
- .act_hid = BNXT_ULP_ACT_HID_1880,
+ .act_hid = BNXT_ULP_ACT_HID_bd60,
.act_pattern_id = 38,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[40] = {
- .act_hid = BNXT_ULP_ACT_HID_0890,
+ .act_hid = BNXT_ULP_ACT_HID_1bd20,
.act_pattern_id = 39,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_POP_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[41] = {
- .act_hid = BNXT_ULP_ACT_HID_1090,
+ .act_hid = BNXT_ULP_ACT_HID_16960,
.act_pattern_id = 40,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[42] = {
- .act_hid = BNXT_ULP_ACT_HID_1890,
+ .act_hid = BNXT_ULP_ACT_HID_a120,
.act_pattern_id = 41,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[43] = {
- .act_hid = BNXT_ULP_ACT_HID_3af2,
+ .act_hid = BNXT_ULP_ACT_HID_26960,
.act_pattern_id = 42,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_POP_VLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[44] = {
- .act_hid = BNXT_ULP_ACT_HID_42f2,
+ .act_hid = BNXT_ULP_ACT_HID_16d60,
.act_pattern_id = 43,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[45] = {
- .act_hid = BNXT_ULP_ACT_HID_4af2,
+ .act_hid = BNXT_ULP_ACT_HID_4040,
.act_pattern_id = 44,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[46] = {
- .act_hid = BNXT_ULP_ACT_HID_3b02,
+ .act_hid = BNXT_ULP_ACT_HID_8040,
.act_pattern_id = 45,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[47] = {
- .act_hid = BNXT_ULP_ACT_HID_4302,
+ .act_hid = BNXT_ULP_ACT_HID_c040,
.act_pattern_id = 46,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[48] = {
- .act_hid = BNXT_ULP_ACT_HID_4b02,
+ .act_hid = BNXT_ULP_ACT_HID_40c0,
.act_pattern_id = 47,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[49] = {
- .act_hid = BNXT_ULP_ACT_HID_3b6a,
+ .act_hid = BNXT_ULP_ACT_HID_80c0,
.act_pattern_id = 48,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[50] = {
- .act_hid = BNXT_ULP_ACT_HID_436a,
+ .act_hid = BNXT_ULP_ACT_HID_c0c0,
.act_pattern_id = 49,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_VXLAN_DECAP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[51] = {
- .act_hid = BNXT_ULP_ACT_HID_4b6a,
+ .act_hid = BNXT_ULP_ACT_HID_4400,
.act_pattern_id = 50,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[52] = {
- .act_hid = BNXT_ULP_ACT_HID_3b7a,
+ .act_hid = BNXT_ULP_ACT_HID_8400,
.act_pattern_id = 51,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[53] = {
- .act_hid = BNXT_ULP_ACT_HID_437a,
+ .act_hid = BNXT_ULP_ACT_HID_c400,
.act_pattern_id = 52,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[54] = {
- .act_hid = BNXT_ULP_ACT_HID_4b7a,
+ .act_hid = BNXT_ULP_ACT_HID_4480,
.act_pattern_id = 53,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 1
},
[55] = {
- .act_hid = BNXT_ULP_ACT_HID_640d,
- .act_pattern_id = 0,
+ .act_hid = BNXT_ULP_ACT_HID_8480,
+ .act_pattern_id = 54,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED |
- BNXT_ULP_ACT_BIT_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
+ .act_tid = 1
},
[56] = {
- .act_hid = BNXT_ULP_ACT_HID_641d,
- .act_pattern_id = 1,
+ .act_hid = BNXT_ULP_ACT_HID_c480,
+ .act_pattern_id = 55,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED |
- BNXT_ULP_ACT_BIT_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
+ .act_tid = 1
},
[57] = {
- .act_hid = BNXT_ULP_ACT_HID_071a,
- .act_pattern_id = 2,
+ .act_hid = BNXT_ULP_ACT_HID_1d782,
+ .act_pattern_id = 56,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 2
+ .act_tid = 1
},
[58] = {
- .act_hid = BNXT_ULP_ACT_HID_0800,
- .act_pattern_id = 0,
+ .act_hid = BNXT_ULP_ACT_HID_21782,
+ .act_pattern_id = 57,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[59] = {
- .act_hid = BNXT_ULP_ACT_HID_1000,
- .act_pattern_id = 1,
+ .act_hid = BNXT_ULP_ACT_HID_25782,
+ .act_pattern_id = 58,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[60] = {
- .act_hid = BNXT_ULP_ACT_HID_1800,
- .act_pattern_id = 2,
+ .act_hid = BNXT_ULP_ACT_HID_1d802,
+ .act_pattern_id = 59,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[61] = {
- .act_hid = BNXT_ULP_ACT_HID_0810,
- .act_pattern_id = 3,
+ .act_hid = BNXT_ULP_ACT_HID_21802,
+ .act_pattern_id = 60,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[62] = {
- .act_hid = BNXT_ULP_ACT_HID_1010,
- .act_pattern_id = 4,
+ .act_hid = BNXT_ULP_ACT_HID_25802,
+ .act_pattern_id = 61,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[63] = {
- .act_hid = BNXT_ULP_ACT_HID_1810,
- .act_pattern_id = 5,
+ .act_hid = BNXT_ULP_ACT_HID_1db42,
+ .act_pattern_id = 62,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[64] = {
- .act_hid = BNXT_ULP_ACT_HID_1110,
- .act_pattern_id = 6,
+ .act_hid = BNXT_ULP_ACT_HID_21b42,
+ .act_pattern_id = 63,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[65] = {
- .act_hid = BNXT_ULP_ACT_HID_4420,
- .act_pattern_id = 7,
+ .act_hid = BNXT_ULP_ACT_HID_25b42,
+ .act_pattern_id = 64,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[66] = {
- .act_hid = BNXT_ULP_ACT_HID_2220,
- .act_pattern_id = 8,
+ .act_hid = BNXT_ULP_ACT_HID_1dbc2,
+ .act_pattern_id = 65,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[67] = {
- .act_hid = BNXT_ULP_ACT_HID_0c84,
- .act_pattern_id = 9,
+ .act_hid = BNXT_ULP_ACT_HID_21bc2,
+ .act_pattern_id = 66,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[68] = {
- .act_hid = BNXT_ULP_ACT_HID_3f94,
- .act_pattern_id = 10,
+ .act_hid = BNXT_ULP_ACT_HID_25bc2,
+ .act_pattern_id = 67,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[69] = {
- .act_hid = BNXT_ULP_ACT_HID_3330,
- .act_pattern_id = 11,
+ .act_hid = BNXT_ULP_ACT_HID_fce0,
+ .act_pattern_id = 68,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[70] = {
- .act_hid = BNXT_ULP_ACT_HID_50a4,
- .act_pattern_id = 12,
+ .act_hid = BNXT_ULP_ACT_HID_13ce0,
+ .act_pattern_id = 69,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[71] = {
- .act_hid = BNXT_ULP_ACT_HID_1910,
- .act_pattern_id = 13,
+ .act_hid = BNXT_ULP_ACT_HID_17ce0,
+ .act_pattern_id = 70,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[72] = {
- .act_hid = BNXT_ULP_ACT_HID_4c20,
- .act_pattern_id = 14,
+ .act_hid = BNXT_ULP_ACT_HID_fd60,
+ .act_pattern_id = 71,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[73] = {
- .act_hid = BNXT_ULP_ACT_HID_2a20,
- .act_pattern_id = 15,
+ .act_hid = BNXT_ULP_ACT_HID_13d60,
+ .act_pattern_id = 72,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[74] = {
- .act_hid = BNXT_ULP_ACT_HID_1484,
- .act_pattern_id = 16,
+ .act_hid = BNXT_ULP_ACT_HID_17d60,
+ .act_pattern_id = 73,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DROP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[75] = {
- .act_hid = BNXT_ULP_ACT_HID_4794,
- .act_pattern_id = 17,
+ .act_hid = BNXT_ULP_ACT_HID_e0a0,
+ .act_pattern_id = 74,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[76] = {
- .act_hid = BNXT_ULP_ACT_HID_3b30,
- .act_pattern_id = 18,
+ .act_hid = BNXT_ULP_ACT_HID_120a0,
+ .act_pattern_id = 75,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[77] = {
- .act_hid = BNXT_ULP_ACT_HID_58a4,
- .act_pattern_id = 19,
+ .act_hid = BNXT_ULP_ACT_HID_160a0,
+ .act_pattern_id = 76,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[78] = {
- .act_hid = BNXT_ULP_ACT_HID_2110,
- .act_pattern_id = 20,
+ .act_hid = BNXT_ULP_ACT_HID_e120,
+ .act_pattern_id = 77,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[79] = {
- .act_hid = BNXT_ULP_ACT_HID_5420,
- .act_pattern_id = 21,
+ .act_hid = BNXT_ULP_ACT_HID_12120,
+ .act_pattern_id = 78,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[80] = {
- .act_hid = BNXT_ULP_ACT_HID_3220,
- .act_pattern_id = 22,
+ .act_hid = BNXT_ULP_ACT_HID_16120,
+ .act_pattern_id = 79,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_VXLAN_DECAP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 1
},
[81] = {
- .act_hid = BNXT_ULP_ACT_HID_1c84,
- .act_pattern_id = 23,
+ .act_hid = BNXT_ULP_ACT_HID_32061,
+ .act_pattern_id = 0,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SHARED |
+ BNXT_ULP_ACT_BIT_SAMPLE |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 2
},
[82] = {
- .act_hid = BNXT_ULP_ACT_HID_4f94,
- .act_pattern_id = 24,
+ .act_hid = BNXT_ULP_ACT_HID_320e1,
+ .act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SHARED |
+ BNXT_ULP_ACT_BIT_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 2
},
[83] = {
- .act_hid = BNXT_ULP_ACT_HID_4330,
- .act_pattern_id = 25,
+ .act_hid = BNXT_ULP_ACT_HID_388a,
+ .act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
+ .act_tid = 2
},
[84] = {
- .act_hid = BNXT_ULP_ACT_HID_60a4,
- .act_pattern_id = 26,
+ .act_hid = BNXT_ULP_ACT_HID_4000,
+ .act_pattern_id = 0,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[85] = {
- .act_hid = BNXT_ULP_ACT_HID_2910,
- .act_pattern_id = 27,
+ .act_hid = BNXT_ULP_ACT_HID_8000,
+ .act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[86] = {
- .act_hid = BNXT_ULP_ACT_HID_5c20,
- .act_pattern_id = 28,
+ .act_hid = BNXT_ULP_ACT_HID_c000,
+ .act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[87] = {
- .act_hid = BNXT_ULP_ACT_HID_3a20,
- .act_pattern_id = 29,
+ .act_hid = BNXT_ULP_ACT_HID_4080,
+ .act_pattern_id = 3,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[88] = {
- .act_hid = BNXT_ULP_ACT_HID_2484,
- .act_pattern_id = 30,
+ .act_hid = BNXT_ULP_ACT_HID_8080,
+ .act_pattern_id = 4,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[89] = {
- .act_hid = BNXT_ULP_ACT_HID_5794,
- .act_pattern_id = 31,
+ .act_hid = BNXT_ULP_ACT_HID_c080,
+ .act_pattern_id = 5,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[90] = {
- .act_hid = BNXT_ULP_ACT_HID_4b30,
- .act_pattern_id = 32,
+ .act_hid = BNXT_ULP_ACT_HID_8880,
+ .act_pattern_id = 6,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[91] = {
- .act_hid = BNXT_ULP_ACT_HID_68a4,
- .act_pattern_id = 33,
+ .act_hid = BNXT_ULP_ACT_HID_22100,
+ .act_pattern_id = 7,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[92] = {
- .act_hid = BNXT_ULP_ACT_HID_1120,
- .act_pattern_id = 34,
+ .act_hid = BNXT_ULP_ACT_HID_11100,
+ .act_pattern_id = 8,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[93] = {
- .act_hid = BNXT_ULP_ACT_HID_4430,
- .act_pattern_id = 35,
+ .act_hid = BNXT_ULP_ACT_HID_6420,
+ .act_pattern_id = 9,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[94] = {
- .act_hid = BNXT_ULP_ACT_HID_2230,
- .act_pattern_id = 36,
+ .act_hid = BNXT_ULP_ACT_HID_1fca0,
+ .act_pattern_id = 10,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[95] = {
- .act_hid = BNXT_ULP_ACT_HID_0c94,
- .act_pattern_id = 37,
+ .act_hid = BNXT_ULP_ACT_HID_19980,
+ .act_pattern_id = 11,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[96] = {
- .act_hid = BNXT_ULP_ACT_HID_3fa4,
- .act_pattern_id = 38,
+ .act_hid = BNXT_ULP_ACT_HID_28520,
+ .act_pattern_id = 12,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -1594,82 +1768,77 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[97] = {
- .act_hid = BNXT_ULP_ACT_HID_3340,
- .act_pattern_id = 39,
+ .act_hid = BNXT_ULP_ACT_HID_c880,
+ .act_pattern_id = 13,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[98] = {
- .act_hid = BNXT_ULP_ACT_HID_50b4,
- .act_pattern_id = 40,
+ .act_hid = BNXT_ULP_ACT_HID_26100,
+ .act_pattern_id = 14,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[99] = {
- .act_hid = BNXT_ULP_ACT_HID_1920,
- .act_pattern_id = 41,
+ .act_hid = BNXT_ULP_ACT_HID_15100,
+ .act_pattern_id = 15,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[100] = {
- .act_hid = BNXT_ULP_ACT_HID_4c30,
- .act_pattern_id = 42,
+ .act_hid = BNXT_ULP_ACT_HID_a420,
+ .act_pattern_id = 16,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[101] = {
- .act_hid = BNXT_ULP_ACT_HID_2a30,
- .act_pattern_id = 43,
+ .act_hid = BNXT_ULP_ACT_HID_23ca0,
+ .act_pattern_id = 17,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[102] = {
- .act_hid = BNXT_ULP_ACT_HID_1494,
- .act_pattern_id = 44,
+ .act_hid = BNXT_ULP_ACT_HID_1d980,
+ .act_pattern_id = 18,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[103] = {
- .act_hid = BNXT_ULP_ACT_HID_47a4,
- .act_pattern_id = 45,
+ .act_hid = BNXT_ULP_ACT_HID_2c520,
+ .act_pattern_id = 19,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -1677,84 +1846,77 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[104] = {
- .act_hid = BNXT_ULP_ACT_HID_3b40,
- .act_pattern_id = 46,
+ .act_hid = BNXT_ULP_ACT_HID_10880,
+ .act_pattern_id = 20,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[105] = {
- .act_hid = BNXT_ULP_ACT_HID_58b4,
- .act_pattern_id = 47,
+ .act_hid = BNXT_ULP_ACT_HID_2a100,
+ .act_pattern_id = 21,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[106] = {
- .act_hid = BNXT_ULP_ACT_HID_2120,
- .act_pattern_id = 48,
+ .act_hid = BNXT_ULP_ACT_HID_19100,
+ .act_pattern_id = 22,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[107] = {
- .act_hid = BNXT_ULP_ACT_HID_5430,
- .act_pattern_id = 49,
+ .act_hid = BNXT_ULP_ACT_HID_e420,
+ .act_pattern_id = 23,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[108] = {
- .act_hid = BNXT_ULP_ACT_HID_3230,
- .act_pattern_id = 50,
+ .act_hid = BNXT_ULP_ACT_HID_27ca0,
+ .act_pattern_id = 24,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[109] = {
- .act_hid = BNXT_ULP_ACT_HID_1c94,
- .act_pattern_id = 51,
+ .act_hid = BNXT_ULP_ACT_HID_21980,
+ .act_pattern_id = 25,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[110] = {
- .act_hid = BNXT_ULP_ACT_HID_4fa4,
- .act_pattern_id = 52,
+ .act_hid = BNXT_ULP_ACT_HID_30520,
+ .act_pattern_id = 26,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -1762,89 +1924,84 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[111] = {
- .act_hid = BNXT_ULP_ACT_HID_4340,
- .act_pattern_id = 53,
+ .act_hid = BNXT_ULP_ACT_HID_14880,
+ .act_pattern_id = 27,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[112] = {
- .act_hid = BNXT_ULP_ACT_HID_60b4,
- .act_pattern_id = 54,
+ .act_hid = BNXT_ULP_ACT_HID_2e100,
+ .act_pattern_id = 28,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[113] = {
- .act_hid = BNXT_ULP_ACT_HID_2920,
- .act_pattern_id = 55,
+ .act_hid = BNXT_ULP_ACT_HID_1d100,
+ .act_pattern_id = 29,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[114] = {
- .act_hid = BNXT_ULP_ACT_HID_5c30,
- .act_pattern_id = 56,
+ .act_hid = BNXT_ULP_ACT_HID_12420,
+ .act_pattern_id = 30,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[115] = {
- .act_hid = BNXT_ULP_ACT_HID_3a30,
- .act_pattern_id = 57,
+ .act_hid = BNXT_ULP_ACT_HID_2bca0,
+ .act_pattern_id = 31,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[116] = {
- .act_hid = BNXT_ULP_ACT_HID_2494,
- .act_pattern_id = 58,
+ .act_hid = BNXT_ULP_ACT_HID_25980,
+ .act_pattern_id = 32,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[117] = {
- .act_hid = BNXT_ULP_ACT_HID_57a4,
- .act_pattern_id = 59,
+ .act_hid = BNXT_ULP_ACT_HID_34520,
+ .act_pattern_id = 33,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -1852,81 +2009,77 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[118] = {
- .act_hid = BNXT_ULP_ACT_HID_4b40,
- .act_pattern_id = 60,
+ .act_hid = BNXT_ULP_ACT_HID_8900,
+ .act_pattern_id = 34,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[119] = {
- .act_hid = BNXT_ULP_ACT_HID_68b4,
- .act_pattern_id = 61,
+ .act_hid = BNXT_ULP_ACT_HID_22180,
+ .act_pattern_id = 35,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[120] = {
- .act_hid = BNXT_ULP_ACT_HID_2a98,
- .act_pattern_id = 62,
+ .act_hid = BNXT_ULP_ACT_HID_11180,
+ .act_pattern_id = 36,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[121] = {
- .act_hid = BNXT_ULP_ACT_HID_5da8,
- .act_pattern_id = 63,
+ .act_hid = BNXT_ULP_ACT_HID_64a0,
+ .act_pattern_id = 37,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[122] = {
- .act_hid = BNXT_ULP_ACT_HID_3ba8,
- .act_pattern_id = 64,
+ .act_hid = BNXT_ULP_ACT_HID_1fd20,
+ .act_pattern_id = 38,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[123] = {
- .act_hid = BNXT_ULP_ACT_HID_260c,
- .act_pattern_id = 65,
+ .act_hid = BNXT_ULP_ACT_HID_19a00,
+ .act_pattern_id = 39,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[124] = {
- .act_hid = BNXT_ULP_ACT_HID_591c,
- .act_pattern_id = 66,
+ .act_hid = BNXT_ULP_ACT_HID_285a0,
+ .act_pattern_id = 40,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -1934,83 +2087,82 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[125] = {
- .act_hid = BNXT_ULP_ACT_HID_6a2c,
- .act_pattern_id = 67,
+ .act_hid = BNXT_ULP_ACT_HID_c900,
+ .act_pattern_id = 41,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[126] = {
- .act_hid = BNXT_ULP_ACT_HID_2aa8,
- .act_pattern_id = 68,
+ .act_hid = BNXT_ULP_ACT_HID_26180,
+ .act_pattern_id = 42,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[127] = {
- .act_hid = BNXT_ULP_ACT_HID_5db8,
- .act_pattern_id = 69,
+ .act_hid = BNXT_ULP_ACT_HID_15180,
+ .act_pattern_id = 43,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[128] = {
- .act_hid = BNXT_ULP_ACT_HID_3bb8,
- .act_pattern_id = 70,
+ .act_hid = BNXT_ULP_ACT_HID_a4a0,
+ .act_pattern_id = 44,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[129] = {
- .act_hid = BNXT_ULP_ACT_HID_261c,
- .act_pattern_id = 71,
+ .act_hid = BNXT_ULP_ACT_HID_23d20,
+ .act_pattern_id = 45,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[130] = {
- .act_hid = BNXT_ULP_ACT_HID_592c,
- .act_pattern_id = 72,
+ .act_hid = BNXT_ULP_ACT_HID_1da00,
+ .act_pattern_id = 46,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[131] = {
- .act_hid = BNXT_ULP_ACT_HID_6a3c,
- .act_pattern_id = 73,
+ .act_hid = BNXT_ULP_ACT_HID_2c5a0,
+ .act_pattern_id = 47,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2020,58 +2172,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[132] = {
- .act_hid = BNXT_ULP_ACT_HID_3298,
- .act_pattern_id = 74,
+ .act_hid = BNXT_ULP_ACT_HID_10900,
+ .act_pattern_id = 48,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[133] = {
- .act_hid = BNXT_ULP_ACT_HID_65a8,
- .act_pattern_id = 75,
+ .act_hid = BNXT_ULP_ACT_HID_2a180,
+ .act_pattern_id = 49,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[134] = {
- .act_hid = BNXT_ULP_ACT_HID_43a8,
- .act_pattern_id = 76,
+ .act_hid = BNXT_ULP_ACT_HID_19180,
+ .act_pattern_id = 50,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[135] = {
- .act_hid = BNXT_ULP_ACT_HID_2e0c,
- .act_pattern_id = 77,
+ .act_hid = BNXT_ULP_ACT_HID_e4a0,
+ .act_pattern_id = 51,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[136] = {
- .act_hid = BNXT_ULP_ACT_HID_611c,
- .act_pattern_id = 78,
+ .act_hid = BNXT_ULP_ACT_HID_27d20,
+ .act_pattern_id = 52,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -2079,92 +2231,89 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[137] = {
- .act_hid = BNXT_ULP_ACT_HID_722c,
- .act_pattern_id = 79,
+ .act_hid = BNXT_ULP_ACT_HID_21a00,
+ .act_pattern_id = 53,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[138] = {
- .act_hid = BNXT_ULP_ACT_HID_32a8,
- .act_pattern_id = 80,
+ .act_hid = BNXT_ULP_ACT_HID_305a0,
+ .act_pattern_id = 54,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[139] = {
- .act_hid = BNXT_ULP_ACT_HID_65b8,
- .act_pattern_id = 81,
+ .act_hid = BNXT_ULP_ACT_HID_14900,
+ .act_pattern_id = 55,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[140] = {
- .act_hid = BNXT_ULP_ACT_HID_43b8,
- .act_pattern_id = 82,
+ .act_hid = BNXT_ULP_ACT_HID_2e180,
+ .act_pattern_id = 56,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[141] = {
- .act_hid = BNXT_ULP_ACT_HID_2e1c,
- .act_pattern_id = 83,
+ .act_hid = BNXT_ULP_ACT_HID_1d180,
+ .act_pattern_id = 57,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[142] = {
- .act_hid = BNXT_ULP_ACT_HID_612c,
- .act_pattern_id = 84,
+ .act_hid = BNXT_ULP_ACT_HID_124a0,
+ .act_pattern_id = 58,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[143] = {
- .act_hid = BNXT_ULP_ACT_HID_723c,
- .act_pattern_id = 85,
+ .act_hid = BNXT_ULP_ACT_HID_2bd20,
+ .act_pattern_id = 59,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -2172,57 +2321,80 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[144] = {
- .act_hid = BNXT_ULP_ACT_HID_3a98,
- .act_pattern_id = 86,
+ .act_hid = BNXT_ULP_ACT_HID_25a00,
+ .act_pattern_id = 60,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[145] = {
- .act_hid = BNXT_ULP_ACT_HID_6da8,
- .act_pattern_id = 87,
+ .act_hid = BNXT_ULP_ACT_HID_345a0,
+ .act_pattern_id = 61,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[146] = {
- .act_hid = BNXT_ULP_ACT_HID_4ba8,
- .act_pattern_id = 88,
+ .act_hid = BNXT_ULP_ACT_HID_154c0,
+ .act_pattern_id = 62,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[147] = {
- .act_hid = BNXT_ULP_ACT_HID_360c,
- .act_pattern_id = 89,
+ .act_hid = BNXT_ULP_ACT_HID_2ed40,
+ .act_pattern_id = 63,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [148] = {
+ .act_hid = BNXT_ULP_ACT_HID_1dd40,
+ .act_pattern_id = 64,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [149] = {
+ .act_hid = BNXT_ULP_ACT_HID_13060,
+ .act_pattern_id = 65,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [148] = {
- .act_hid = BNXT_ULP_ACT_HID_691c,
- .act_pattern_id = 90,
+ [150] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c8e0,
+ .act_pattern_id = 66,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -2230,12 +2402,11 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [149] = {
- .act_hid = BNXT_ULP_ACT_HID_7a2c,
- .act_pattern_id = 91,
+ [151] = {
+ .act_hid = BNXT_ULP_ACT_HID_35160,
+ .act_pattern_id = 67,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2244,24 +2415,22 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [150] = {
- .act_hid = BNXT_ULP_ACT_HID_3aa8,
- .act_pattern_id = 92,
+ [152] = {
+ .act_hid = BNXT_ULP_ACT_HID_15540,
+ .act_pattern_id = 68,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [151] = {
- .act_hid = BNXT_ULP_ACT_HID_6db8,
- .act_pattern_id = 93,
+ [153] = {
+ .act_hid = BNXT_ULP_ACT_HID_2edc0,
+ .act_pattern_id = 69,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -2269,24 +2438,22 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [152] = {
- .act_hid = BNXT_ULP_ACT_HID_4bb8,
- .act_pattern_id = 94,
+ [154] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ddc0,
+ .act_pattern_id = 70,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [153] = {
- .act_hid = BNXT_ULP_ACT_HID_361c,
- .act_pattern_id = 95,
+ [155] = {
+ .act_hid = BNXT_ULP_ACT_HID_130e0,
+ .act_pattern_id = 71,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2294,12 +2461,11 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [154] = {
- .act_hid = BNXT_ULP_ACT_HID_692c,
- .act_pattern_id = 96,
+ [156] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c960,
+ .act_pattern_id = 72,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2308,12 +2474,11 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [155] = {
- .act_hid = BNXT_ULP_ACT_HID_7a3c,
- .act_pattern_id = 97,
+ [157] = {
+ .act_hid = BNXT_ULP_ACT_HID_351e0,
+ .act_pattern_id = 73,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -2323,63 +2488,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [156] = {
- .act_hid = BNXT_ULP_ACT_HID_4298,
- .act_pattern_id = 98,
+ [158] = {
+ .act_hid = BNXT_ULP_ACT_HID_194c0,
+ .act_pattern_id = 74,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [157] = {
- .act_hid = BNXT_ULP_ACT_HID_75a8,
- .act_pattern_id = 99,
+ [159] = {
+ .act_hid = BNXT_ULP_ACT_HID_32d40,
+ .act_pattern_id = 75,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [158] = {
- .act_hid = BNXT_ULP_ACT_HID_53a8,
- .act_pattern_id = 100,
+ [160] = {
+ .act_hid = BNXT_ULP_ACT_HID_21d40,
+ .act_pattern_id = 76,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [159] = {
- .act_hid = BNXT_ULP_ACT_HID_3e0c,
- .act_pattern_id = 101,
+ [161] = {
+ .act_hid = BNXT_ULP_ACT_HID_17060,
+ .act_pattern_id = 77,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [160] = {
- .act_hid = BNXT_ULP_ACT_HID_711c,
- .act_pattern_id = 102,
+ [162] = {
+ .act_hid = BNXT_ULP_ACT_HID_308e0,
+ .act_pattern_id = 78,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -2387,13 +2547,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [161] = {
- .act_hid = BNXT_ULP_ACT_HID_0670,
- .act_pattern_id = 103,
+ [163] = {
+ .act_hid = BNXT_ULP_ACT_HID_39160,
+ .act_pattern_id = 79,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2402,26 +2561,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [162] = {
- .act_hid = BNXT_ULP_ACT_HID_42a8,
- .act_pattern_id = 104,
+ [164] = {
+ .act_hid = BNXT_ULP_ACT_HID_19540,
+ .act_pattern_id = 80,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [163] = {
- .act_hid = BNXT_ULP_ACT_HID_75b8,
- .act_pattern_id = 105,
+ [165] = {
+ .act_hid = BNXT_ULP_ACT_HID_32dc0,
+ .act_pattern_id = 81,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -2429,26 +2586,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [164] = {
- .act_hid = BNXT_ULP_ACT_HID_53b8,
- .act_pattern_id = 106,
+ [166] = {
+ .act_hid = BNXT_ULP_ACT_HID_21dc0,
+ .act_pattern_id = 82,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [165] = {
- .act_hid = BNXT_ULP_ACT_HID_3e1c,
- .act_pattern_id = 107,
+ [167] = {
+ .act_hid = BNXT_ULP_ACT_HID_170e0,
+ .act_pattern_id = 83,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2456,13 +2611,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [166] = {
- .act_hid = BNXT_ULP_ACT_HID_712c,
- .act_pattern_id = 108,
+ [168] = {
+ .act_hid = BNXT_ULP_ACT_HID_30960,
+ .act_pattern_id = 84,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -2471,13 +2625,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [167] = {
- .act_hid = BNXT_ULP_ACT_HID_0680,
- .act_pattern_id = 109,
+ [169] = {
+ .act_hid = BNXT_ULP_ACT_HID_391e0,
+ .act_pattern_id = 85,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -2487,143 +2640,137 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [168] = {
- .act_hid = BNXT_ULP_ACT_HID_3aea,
- .act_pattern_id = 110,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
- [169] = {
- .act_hid = BNXT_ULP_ACT_HID_42ea,
- .act_pattern_id = 111,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 3
- },
[170] = {
- .act_hid = BNXT_ULP_ACT_HID_4aea,
- .act_pattern_id = 112,
+ .act_hid = BNXT_ULP_ACT_HID_1d4c0,
+ .act_pattern_id = 86,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[171] = {
- .act_hid = BNXT_ULP_ACT_HID_3afa,
- .act_pattern_id = 113,
+ .act_hid = BNXT_ULP_ACT_HID_36d40,
+ .act_pattern_id = 87,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[172] = {
- .act_hid = BNXT_ULP_ACT_HID_42fa,
- .act_pattern_id = 114,
+ .act_hid = BNXT_ULP_ACT_HID_25d40,
+ .act_pattern_id = 88,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[173] = {
- .act_hid = BNXT_ULP_ACT_HID_4afa,
- .act_pattern_id = 115,
+ .act_hid = BNXT_ULP_ACT_HID_1b060,
+ .act_pattern_id = 89,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[174] = {
- .act_hid = BNXT_ULP_ACT_HID_43fa,
- .act_pattern_id = 116,
+ .act_hid = BNXT_ULP_ACT_HID_348e0,
+ .act_pattern_id = 90,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[175] = {
- .act_hid = BNXT_ULP_ACT_HID_770a,
- .act_pattern_id = 117,
+ .act_hid = BNXT_ULP_ACT_HID_3d160,
+ .act_pattern_id = 91,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[176] = {
- .act_hid = BNXT_ULP_ACT_HID_550a,
- .act_pattern_id = 118,
+ .act_hid = BNXT_ULP_ACT_HID_1d540,
+ .act_pattern_id = 92,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[177] = {
- .act_hid = BNXT_ULP_ACT_HID_3f6e,
- .act_pattern_id = 119,
+ .act_hid = BNXT_ULP_ACT_HID_36dc0,
+ .act_pattern_id = 93,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[178] = {
- .act_hid = BNXT_ULP_ACT_HID_727e,
- .act_pattern_id = 120,
+ .act_hid = BNXT_ULP_ACT_HID_25dc0,
+ .act_pattern_id = 94,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[179] = {
- .act_hid = BNXT_ULP_ACT_HID_661a,
- .act_pattern_id = 121,
+ .act_hid = BNXT_ULP_ACT_HID_1b0e0,
+ .act_pattern_id = 95,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[180] = {
- .act_hid = BNXT_ULP_ACT_HID_07d2,
- .act_pattern_id = 122,
+ .act_hid = BNXT_ULP_ACT_HID_34960,
+ .act_pattern_id = 96,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -2631,83 +2778,92 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[181] = {
- .act_hid = BNXT_ULP_ACT_HID_4bfa,
- .act_pattern_id = 123,
+ .act_hid = BNXT_ULP_ACT_HID_3d1e0,
+ .act_pattern_id = 97,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[182] = {
- .act_hid = BNXT_ULP_ACT_HID_034e,
- .act_pattern_id = 124,
+ .act_hid = BNXT_ULP_ACT_HID_214c0,
+ .act_pattern_id = 98,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[183] = {
- .act_hid = BNXT_ULP_ACT_HID_5d0a,
- .act_pattern_id = 125,
+ .act_hid = BNXT_ULP_ACT_HID_3ad40,
+ .act_pattern_id = 99,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[184] = {
- .act_hid = BNXT_ULP_ACT_HID_476e,
- .act_pattern_id = 126,
+ .act_hid = BNXT_ULP_ACT_HID_29d40,
+ .act_pattern_id = 100,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[185] = {
- .act_hid = BNXT_ULP_ACT_HID_7a7e,
- .act_pattern_id = 127,
+ .act_hid = BNXT_ULP_ACT_HID_1f060,
+ .act_pattern_id = 101,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[186] = {
- .act_hid = BNXT_ULP_ACT_HID_6e1a,
- .act_pattern_id = 128,
+ .act_hid = BNXT_ULP_ACT_HID_388e0,
+ .act_pattern_id = 102,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[187] = {
- .act_hid = BNXT_ULP_ACT_HID_0fd2,
- .act_pattern_id = 129,
+ .act_hid = BNXT_ULP_ACT_HID_3380,
+ .act_pattern_id = 103,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -2716,58 +2872,68 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[188] = {
- .act_hid = BNXT_ULP_ACT_HID_53fa,
- .act_pattern_id = 130,
+ .act_hid = BNXT_ULP_ACT_HID_21540,
+ .act_pattern_id = 104,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[189] = {
- .act_hid = BNXT_ULP_ACT_HID_0b4e,
- .act_pattern_id = 131,
+ .act_hid = BNXT_ULP_ACT_HID_3adc0,
+ .act_pattern_id = 105,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[190] = {
- .act_hid = BNXT_ULP_ACT_HID_650a,
- .act_pattern_id = 132,
+ .act_hid = BNXT_ULP_ACT_HID_29dc0,
+ .act_pattern_id = 106,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[191] = {
- .act_hid = BNXT_ULP_ACT_HID_4f6e,
- .act_pattern_id = 133,
+ .act_hid = BNXT_ULP_ACT_HID_1f0e0,
+ .act_pattern_id = 107,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[192] = {
- .act_hid = BNXT_ULP_ACT_HID_06c2,
- .act_pattern_id = 134,
+ .act_hid = BNXT_ULP_ACT_HID_38960,
+ .act_pattern_id = 108,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -2775,176 +2941,158 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[193] = {
- .act_hid = BNXT_ULP_ACT_HID_761a,
- .act_pattern_id = 135,
+ .act_hid = BNXT_ULP_ACT_HID_3400,
+ .act_pattern_id = 109,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[194] = {
- .act_hid = BNXT_ULP_ACT_HID_17d2,
- .act_pattern_id = 136,
+ .act_hid = BNXT_ULP_ACT_HID_1d742,
+ .act_pattern_id = 110,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[195] = {
- .act_hid = BNXT_ULP_ACT_HID_5bfa,
- .act_pattern_id = 137,
+ .act_hid = BNXT_ULP_ACT_HID_21742,
+ .act_pattern_id = 111,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[196] = {
- .act_hid = BNXT_ULP_ACT_HID_134e,
- .act_pattern_id = 138,
+ .act_hid = BNXT_ULP_ACT_HID_25742,
+ .act_pattern_id = 112,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[197] = {
- .act_hid = BNXT_ULP_ACT_HID_6d0a,
- .act_pattern_id = 139,
+ .act_hid = BNXT_ULP_ACT_HID_1d7c2,
+ .act_pattern_id = 113,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[198] = {
- .act_hid = BNXT_ULP_ACT_HID_576e,
- .act_pattern_id = 140,
+ .act_hid = BNXT_ULP_ACT_HID_217c2,
+ .act_pattern_id = 114,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[199] = {
- .act_hid = BNXT_ULP_ACT_HID_0ec2,
- .act_pattern_id = 141,
+ .act_hid = BNXT_ULP_ACT_HID_257c2,
+ .act_pattern_id = 115,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[200] = {
- .act_hid = BNXT_ULP_ACT_HID_025e,
- .act_pattern_id = 142,
+ .act_hid = BNXT_ULP_ACT_HID_21fc2,
+ .act_pattern_id = 116,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[201] = {
- .act_hid = BNXT_ULP_ACT_HID_1fd2,
- .act_pattern_id = 143,
+ .act_hid = BNXT_ULP_ACT_HID_3b842,
+ .act_pattern_id = 117,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[202] = {
- .act_hid = BNXT_ULP_ACT_HID_440a,
- .act_pattern_id = 144,
+ .act_hid = BNXT_ULP_ACT_HID_2a842,
+ .act_pattern_id = 118,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[203] = {
- .act_hid = BNXT_ULP_ACT_HID_771a,
- .act_pattern_id = 145,
+ .act_hid = BNXT_ULP_ACT_HID_1fb62,
+ .act_pattern_id = 119,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[204] = {
- .act_hid = BNXT_ULP_ACT_HID_551a,
- .act_pattern_id = 146,
+ .act_hid = BNXT_ULP_ACT_HID_393e2,
+ .act_pattern_id = 120,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[205] = {
- .act_hid = BNXT_ULP_ACT_HID_3f7e,
- .act_pattern_id = 147,
+ .act_hid = BNXT_ULP_ACT_HID_330c2,
+ .act_pattern_id = 121,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[206] = {
- .act_hid = BNXT_ULP_ACT_HID_728e,
- .act_pattern_id = 148,
+ .act_hid = BNXT_ULP_ACT_HID_3e82,
+ .act_pattern_id = 122,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -2952,89 +3100,84 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[207] = {
- .act_hid = BNXT_ULP_ACT_HID_662a,
- .act_pattern_id = 149,
+ .act_hid = BNXT_ULP_ACT_HID_25fc2,
+ .act_pattern_id = 123,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[208] = {
- .act_hid = BNXT_ULP_ACT_HID_07e2,
- .act_pattern_id = 150,
+ .act_hid = BNXT_ULP_ACT_HID_1a62,
+ .act_pattern_id = 124,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[209] = {
- .act_hid = BNXT_ULP_ACT_HID_4c0a,
- .act_pattern_id = 151,
+ .act_hid = BNXT_ULP_ACT_HID_2e842,
+ .act_pattern_id = 125,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[210] = {
- .act_hid = BNXT_ULP_ACT_HID_035e,
- .act_pattern_id = 152,
+ .act_hid = BNXT_ULP_ACT_HID_23b62,
+ .act_pattern_id = 126,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[211] = {
- .act_hid = BNXT_ULP_ACT_HID_5d1a,
- .act_pattern_id = 153,
+ .act_hid = BNXT_ULP_ACT_HID_3d3e2,
+ .act_pattern_id = 127,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[212] = {
- .act_hid = BNXT_ULP_ACT_HID_477e,
- .act_pattern_id = 154,
+ .act_hid = BNXT_ULP_ACT_HID_370c2,
+ .act_pattern_id = 128,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[213] = {
- .act_hid = BNXT_ULP_ACT_HID_7a8e,
- .act_pattern_id = 155,
+ .act_hid = BNXT_ULP_ACT_HID_7e82,
+ .act_pattern_id = 129,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3042,91 +3185,84 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[214] = {
- .act_hid = BNXT_ULP_ACT_HID_6e2a,
- .act_pattern_id = 156,
+ .act_hid = BNXT_ULP_ACT_HID_29fc2,
+ .act_pattern_id = 130,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[215] = {
- .act_hid = BNXT_ULP_ACT_HID_0fe2,
- .act_pattern_id = 157,
+ .act_hid = BNXT_ULP_ACT_HID_5a62,
+ .act_pattern_id = 131,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[216] = {
- .act_hid = BNXT_ULP_ACT_HID_540a,
- .act_pattern_id = 158,
+ .act_hid = BNXT_ULP_ACT_HID_32842,
+ .act_pattern_id = 132,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[217] = {
- .act_hid = BNXT_ULP_ACT_HID_0b5e,
- .act_pattern_id = 159,
+ .act_hid = BNXT_ULP_ACT_HID_27b62,
+ .act_pattern_id = 133,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[218] = {
- .act_hid = BNXT_ULP_ACT_HID_651a,
- .act_pattern_id = 160,
+ .act_hid = BNXT_ULP_ACT_HID_3602,
+ .act_pattern_id = 134,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[219] = {
- .act_hid = BNXT_ULP_ACT_HID_4f7e,
- .act_pattern_id = 161,
+ .act_hid = BNXT_ULP_ACT_HID_3b0c2,
+ .act_pattern_id = 135,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[220] = {
- .act_hid = BNXT_ULP_ACT_HID_06d2,
- .act_pattern_id = 162,
+ .act_hid = BNXT_ULP_ACT_HID_be82,
+ .act_pattern_id = 136,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3134,96 +3270,91 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[221] = {
- .act_hid = BNXT_ULP_ACT_HID_762a,
- .act_pattern_id = 163,
+ .act_hid = BNXT_ULP_ACT_HID_2dfc2,
+ .act_pattern_id = 137,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[222] = {
- .act_hid = BNXT_ULP_ACT_HID_17e2,
- .act_pattern_id = 164,
+ .act_hid = BNXT_ULP_ACT_HID_9a62,
+ .act_pattern_id = 138,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[223] = {
- .act_hid = BNXT_ULP_ACT_HID_5c0a,
- .act_pattern_id = 165,
+ .act_hid = BNXT_ULP_ACT_HID_36842,
+ .act_pattern_id = 139,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[224] = {
- .act_hid = BNXT_ULP_ACT_HID_135e,
- .act_pattern_id = 166,
+ .act_hid = BNXT_ULP_ACT_HID_2bb62,
+ .act_pattern_id = 140,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[225] = {
- .act_hid = BNXT_ULP_ACT_HID_6d1a,
- .act_pattern_id = 167,
+ .act_hid = BNXT_ULP_ACT_HID_7602,
+ .act_pattern_id = 141,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[226] = {
- .act_hid = BNXT_ULP_ACT_HID_577e,
- .act_pattern_id = 168,
+ .act_hid = BNXT_ULP_ACT_HID_12e2,
+ .act_pattern_id = 142,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[227] = {
- .act_hid = BNXT_ULP_ACT_HID_0ed2,
- .act_pattern_id = 169,
+ .act_hid = BNXT_ULP_ACT_HID_fe82,
+ .act_pattern_id = 143,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3231,88 +3362,84 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[228] = {
- .act_hid = BNXT_ULP_ACT_HID_026e,
- .act_pattern_id = 170,
+ .act_hid = BNXT_ULP_ACT_HID_22042,
+ .act_pattern_id = 144,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[229] = {
- .act_hid = BNXT_ULP_ACT_HID_1fe2,
- .act_pattern_id = 171,
+ .act_hid = BNXT_ULP_ACT_HID_3b8c2,
+ .act_pattern_id = 145,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[230] = {
- .act_hid = BNXT_ULP_ACT_HID_5d82,
- .act_pattern_id = 172,
+ .act_hid = BNXT_ULP_ACT_HID_2a8c2,
+ .act_pattern_id = 146,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[231] = {
- .act_hid = BNXT_ULP_ACT_HID_14d6,
- .act_pattern_id = 173,
+ .act_hid = BNXT_ULP_ACT_HID_1fbe2,
+ .act_pattern_id = 147,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[232] = {
- .act_hid = BNXT_ULP_ACT_HID_6e92,
- .act_pattern_id = 174,
+ .act_hid = BNXT_ULP_ACT_HID_39462,
+ .act_pattern_id = 148,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[233] = {
- .act_hid = BNXT_ULP_ACT_HID_58f6,
- .act_pattern_id = 175,
+ .act_hid = BNXT_ULP_ACT_HID_33142,
+ .act_pattern_id = 149,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[234] = {
- .act_hid = BNXT_ULP_ACT_HID_104a,
- .act_pattern_id = 176,
+ .act_hid = BNXT_ULP_ACT_HID_3f02,
+ .act_pattern_id = 150,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3320,90 +3447,89 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[235] = {
- .act_hid = BNXT_ULP_ACT_HID_215a,
- .act_pattern_id = 177,
+ .act_hid = BNXT_ULP_ACT_HID_26042,
+ .act_pattern_id = 151,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[236] = {
- .act_hid = BNXT_ULP_ACT_HID_5d92,
- .act_pattern_id = 178,
+ .act_hid = BNXT_ULP_ACT_HID_1ae2,
+ .act_pattern_id = 152,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[237] = {
- .act_hid = BNXT_ULP_ACT_HID_14e6,
- .act_pattern_id = 179,
+ .act_hid = BNXT_ULP_ACT_HID_2e8c2,
+ .act_pattern_id = 153,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[238] = {
- .act_hid = BNXT_ULP_ACT_HID_6ea2,
- .act_pattern_id = 180,
+ .act_hid = BNXT_ULP_ACT_HID_23be2,
+ .act_pattern_id = 154,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[239] = {
- .act_hid = BNXT_ULP_ACT_HID_5906,
- .act_pattern_id = 181,
+ .act_hid = BNXT_ULP_ACT_HID_3d462,
+ .act_pattern_id = 155,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[240] = {
- .act_hid = BNXT_ULP_ACT_HID_105a,
- .act_pattern_id = 182,
+ .act_hid = BNXT_ULP_ACT_HID_37142,
+ .act_pattern_id = 156,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[241] = {
- .act_hid = BNXT_ULP_ACT_HID_216a,
- .act_pattern_id = 183,
+ .act_hid = BNXT_ULP_ACT_HID_7f02,
+ .act_pattern_id = 157,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3413,63 +3539,63 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[242] = {
- .act_hid = BNXT_ULP_ACT_HID_6582,
- .act_pattern_id = 184,
+ .act_hid = BNXT_ULP_ACT_HID_2a042,
+ .act_pattern_id = 158,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[243] = {
- .act_hid = BNXT_ULP_ACT_HID_1cd6,
- .act_pattern_id = 185,
+ .act_hid = BNXT_ULP_ACT_HID_5ae2,
+ .act_pattern_id = 159,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[244] = {
- .act_hid = BNXT_ULP_ACT_HID_7692,
- .act_pattern_id = 186,
+ .act_hid = BNXT_ULP_ACT_HID_328c2,
+ .act_pattern_id = 160,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[245] = {
- .act_hid = BNXT_ULP_ACT_HID_60f6,
- .act_pattern_id = 187,
+ .act_hid = BNXT_ULP_ACT_HID_27be2,
+ .act_pattern_id = 161,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[246] = {
- .act_hid = BNXT_ULP_ACT_HID_184a,
- .act_pattern_id = 188,
+ .act_hid = BNXT_ULP_ACT_HID_3682,
+ .act_pattern_id = 162,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3477,99 +3603,96 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[247] = {
- .act_hid = BNXT_ULP_ACT_HID_295a,
- .act_pattern_id = 189,
+ .act_hid = BNXT_ULP_ACT_HID_3b142,
+ .act_pattern_id = 163,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[248] = {
- .act_hid = BNXT_ULP_ACT_HID_6592,
- .act_pattern_id = 190,
+ .act_hid = BNXT_ULP_ACT_HID_bf02,
+ .act_pattern_id = 164,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[249] = {
- .act_hid = BNXT_ULP_ACT_HID_1ce6,
- .act_pattern_id = 191,
+ .act_hid = BNXT_ULP_ACT_HID_2e042,
+ .act_pattern_id = 165,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[250] = {
- .act_hid = BNXT_ULP_ACT_HID_76a2,
- .act_pattern_id = 192,
+ .act_hid = BNXT_ULP_ACT_HID_9ae2,
+ .act_pattern_id = 166,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[251] = {
- .act_hid = BNXT_ULP_ACT_HID_6106,
- .act_pattern_id = 193,
+ .act_hid = BNXT_ULP_ACT_HID_368c2,
+ .act_pattern_id = 167,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[252] = {
- .act_hid = BNXT_ULP_ACT_HID_185a,
- .act_pattern_id = 194,
+ .act_hid = BNXT_ULP_ACT_HID_2bbe2,
+ .act_pattern_id = 168,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
- BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[253] = {
- .act_hid = BNXT_ULP_ACT_HID_296a,
- .act_pattern_id = 195,
+ .act_hid = BNXT_ULP_ACT_HID_7682,
+ .act_pattern_id = 169,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
@@ -3577,62 +3700,87 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 3
},
[254] = {
- .act_hid = BNXT_ULP_ACT_HID_6d82,
- .act_pattern_id = 196,
+ .act_hid = BNXT_ULP_ACT_HID_1362,
+ .act_pattern_id = 170,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[255] = {
- .act_hid = BNXT_ULP_ACT_HID_24d6,
- .act_pattern_id = 197,
+ .act_hid = BNXT_ULP_ACT_HID_ff02,
+ .act_pattern_id = 171,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
- BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[256] = {
- .act_hid = BNXT_ULP_ACT_HID_02d6,
- .act_pattern_id = 198,
+ .act_hid = BNXT_ULP_ACT_HID_2ec02,
+ .act_pattern_id = 172,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
[257] = {
- .act_hid = BNXT_ULP_ACT_HID_68f6,
- .act_pattern_id = 199,
+ .act_hid = BNXT_ULP_ACT_HID_a6a2,
+ .act_pattern_id = 173,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [258] = {
+ .act_hid = BNXT_ULP_ACT_HID_37482,
+ .act_pattern_id = 174,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [259] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c7a2,
+ .act_pattern_id = 175,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [258] = {
- .act_hid = BNXT_ULP_ACT_HID_204a,
- .act_pattern_id = 200,
+ [260] = {
+ .act_hid = BNXT_ULP_ACT_HID_8242,
+ .act_pattern_id = 176,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -3640,13 +3788,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [259] = {
- .act_hid = BNXT_ULP_ACT_HID_315a,
- .act_pattern_id = 201,
+ [261] = {
+ .act_hid = BNXT_ULP_ACT_HID_10ac2,
+ .act_pattern_id = 177,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3655,26 +3802,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [260] = {
- .act_hid = BNXT_ULP_ACT_HID_6d92,
- .act_pattern_id = 202,
+ [262] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ec82,
+ .act_pattern_id = 178,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [261] = {
- .act_hid = BNXT_ULP_ACT_HID_24e6,
- .act_pattern_id = 203,
+ [263] = {
+ .act_hid = BNXT_ULP_ACT_HID_a722,
+ .act_pattern_id = 179,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -3682,26 +3827,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [262] = {
- .act_hid = BNXT_ULP_ACT_HID_02e6,
- .act_pattern_id = 204,
+ [264] = {
+ .act_hid = BNXT_ULP_ACT_HID_37502,
+ .act_pattern_id = 180,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [263] = {
- .act_hid = BNXT_ULP_ACT_HID_6906,
- .act_pattern_id = 205,
+ [265] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c822,
+ .act_pattern_id = 181,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3709,13 +3852,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [264] = {
- .act_hid = BNXT_ULP_ACT_HID_205a,
- .act_pattern_id = 206,
+ [266] = {
+ .act_hid = BNXT_ULP_ACT_HID_82c2,
+ .act_pattern_id = 182,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3724,13 +3866,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [265] = {
- .act_hid = BNXT_ULP_ACT_HID_316a,
- .act_pattern_id = 207,
+ [267] = {
+ .act_hid = BNXT_ULP_ACT_HID_10b42,
+ .act_pattern_id = 183,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -3740,68 +3881,63 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [266] = {
- .act_hid = BNXT_ULP_ACT_HID_7582,
- .act_pattern_id = 208,
+ [268] = {
+ .act_hid = BNXT_ULP_ACT_HID_32c02,
+ .act_pattern_id = 184,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [267] = {
- .act_hid = BNXT_ULP_ACT_HID_2cd6,
- .act_pattern_id = 209,
+ [269] = {
+ .act_hid = BNXT_ULP_ACT_HID_e6a2,
+ .act_pattern_id = 185,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [268] = {
- .act_hid = BNXT_ULP_ACT_HID_0ad6,
- .act_pattern_id = 210,
+ [270] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b482,
+ .act_pattern_id = 186,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [269] = {
- .act_hid = BNXT_ULP_ACT_HID_70f6,
- .act_pattern_id = 211,
+ [271] = {
+ .act_hid = BNXT_ULP_ACT_HID_307a2,
+ .act_pattern_id = 187,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [270] = {
- .act_hid = BNXT_ULP_ACT_HID_284a,
- .act_pattern_id = 212,
+ [272] = {
+ .act_hid = BNXT_ULP_ACT_HID_c242,
+ .act_pattern_id = 188,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -3809,14 +3945,13 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [271] = {
- .act_hid = BNXT_ULP_ACT_HID_395a,
- .act_pattern_id = 213,
+ [273] = {
+ .act_hid = BNXT_ULP_ACT_HID_14ac2,
+ .act_pattern_id = 189,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3825,28 +3960,26 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [272] = {
- .act_hid = BNXT_ULP_ACT_HID_7592,
- .act_pattern_id = 214,
+ [274] = {
+ .act_hid = BNXT_ULP_ACT_HID_32c82,
+ .act_pattern_id = 190,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [273] = {
- .act_hid = BNXT_ULP_ACT_HID_2ce6,
- .act_pattern_id = 215,
+ [275] = {
+ .act_hid = BNXT_ULP_ACT_HID_e722,
+ .act_pattern_id = 191,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -3854,28 +3987,26 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [274] = {
- .act_hid = BNXT_ULP_ACT_HID_0ae6,
- .act_pattern_id = 216,
+ [276] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b502,
+ .act_pattern_id = 192,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [275] = {
- .act_hid = BNXT_ULP_ACT_HID_7106,
- .act_pattern_id = 217,
+ [277] = {
+ .act_hid = BNXT_ULP_ACT_HID_30822,
+ .act_pattern_id = 193,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3883,14 +4014,13 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [276] = {
- .act_hid = BNXT_ULP_ACT_HID_285a,
- .act_pattern_id = 218,
+ [278] = {
+ .act_hid = BNXT_ULP_ACT_HID_c2c2,
+ .act_pattern_id = 194,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -3899,14 +4029,13 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [277] = {
- .act_hid = BNXT_ULP_ACT_HID_396a,
- .act_pattern_id = 219,
+ [279] = {
+ .act_hid = BNXT_ULP_ACT_HID_14b42,
+ .act_pattern_id = 195,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
- BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -3916,555 +4045,2610 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.act_tid = 3
},
- [278] = {
- .act_hid = BNXT_ULP_ACT_HID_0020,
- .act_pattern_id = 0,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
- [279] = {
- .act_hid = BNXT_ULP_ACT_HID_0030,
- .act_pattern_id = 1,
- .app_sig = 0,
- .act_sig = { .bits =
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
- },
[280] = {
- .act_hid = BNXT_ULP_ACT_HID_65d4,
- .act_pattern_id = 2,
+ .act_hid = BNXT_ULP_ACT_HID_36c02,
+ .act_pattern_id = 196,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ .act_tid = 3
},
[281] = {
- .act_hid = BNXT_ULP_ACT_HID_65e4,
- .act_pattern_id = 3,
+ .act_hid = BNXT_ULP_ACT_HID_126a2,
+ .act_pattern_id = 197,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ .act_tid = 3
},
[282] = {
- .act_hid = BNXT_ULP_ACT_HID_330a,
- .act_pattern_id = 4,
+ .act_hid = BNXT_ULP_ACT_HID_16a2,
+ .act_pattern_id = 198,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[283] = {
- .act_hid = BNXT_ULP_ACT_HID_331a,
- .act_pattern_id = 5,
+ .act_hid = BNXT_ULP_ACT_HID_347a2,
+ .act_pattern_id = 199,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_RSS |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ .act_tid = 3
},
[284] = {
- .act_hid = BNXT_ULP_ACT_HID_1cfe,
- .act_pattern_id = 6,
+ .act_hid = BNXT_ULP_ACT_HID_10242,
+ .act_pattern_id = 200,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ .act_tid = 3
},
[285] = {
- .act_hid = BNXT_ULP_ACT_HID_1d0e,
- .act_pattern_id = 7,
+ .act_hid = BNXT_ULP_ACT_HID_18ac2,
+ .act_pattern_id = 201,
.app_sig = 0,
.act_sig = { .bits =
BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_QUEUE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 4
+ .act_tid = 3
},
[286] = {
- .act_hid = BNXT_ULP_ACT_HID_1474,
- .act_pattern_id = 0,
+ .act_hid = BNXT_ULP_ACT_HID_36c82,
+ .act_pattern_id = 202,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
+ .act_tid = 3
},
[287] = {
- .act_hid = BNXT_ULP_ACT_HID_4838,
- .act_pattern_id = 1,
+ .act_hid = BNXT_ULP_ACT_HID_12722,
+ .act_pattern_id = 203,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
+ .act_tid = 3
},
[288] = {
- .act_hid = BNXT_ULP_ACT_HID_6458,
- .act_pattern_id = 2,
+ .act_hid = BNXT_ULP_ACT_HID_1722,
+ .act_pattern_id = 204,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
- BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
+ .act_tid = 3
},
[289] = {
- .act_hid = BNXT_ULP_ACT_HID_1c68,
- .act_pattern_id = 3,
+ .act_hid = BNXT_ULP_ACT_HID_34822,
+ .act_pattern_id = 205,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DELETE |
- BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
+ .act_tid = 3
},
[290] = {
- .act_hid = BNXT_ULP_ACT_HID_6c34,
- .act_pattern_id = 4,
+ .act_hid = BNXT_ULP_ACT_HID_102c2,
+ .act_pattern_id = 206,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_UPDATE |
- BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
- .act_tid = 5
+ .act_tid = 3
},
[291] = {
- .act_hid = BNXT_ULP_ACT_HID_5d08,
- .act_pattern_id = 0,
+ .act_hid = BNXT_ULP_ACT_HID_18b42,
+ .act_pattern_id = 207,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[292] = {
- .act_hid = BNXT_ULP_ACT_HID_5d10,
- .act_pattern_id = 1,
+ .act_hid = BNXT_ULP_ACT_HID_3ac02,
+ .act_pattern_id = 208,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[293] = {
- .act_hid = BNXT_ULP_ACT_HID_5d20,
- .act_pattern_id = 2,
+ .act_hid = BNXT_ULP_ACT_HID_166a2,
+ .act_pattern_id = 209,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_DROP |
- BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[294] = {
- .act_hid = BNXT_ULP_ACT_HID_2e18,
- .act_pattern_id = 3,
+ .act_hid = BNXT_ULP_ACT_HID_56a2,
+ .act_pattern_id = 210,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[295] = {
- .act_hid = BNXT_ULP_ACT_HID_29d4,
- .act_pattern_id = 4,
+ .act_hid = BNXT_ULP_ACT_HID_387a2,
+ .act_pattern_id = 211,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[296] = {
- .act_hid = BNXT_ULP_ACT_HID_7690,
- .act_pattern_id = 5,
+ .act_hid = BNXT_ULP_ACT_HID_14242,
+ .act_pattern_id = 212,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[297] = {
- .act_hid = BNXT_ULP_ACT_HID_47a0,
- .act_pattern_id = 6,
+ .act_hid = BNXT_ULP_ACT_HID_1cac2,
+ .act_pattern_id = 213,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[298] = {
- .act_hid = BNXT_ULP_ACT_HID_435c,
- .act_pattern_id = 7,
+ .act_hid = BNXT_ULP_ACT_HID_3ac82,
+ .act_pattern_id = 214,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[299] = {
- .act_hid = BNXT_ULP_ACT_HID_5d18,
- .act_pattern_id = 8,
+ .act_hid = BNXT_ULP_ACT_HID_16722,
+ .act_pattern_id = 215,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[300] = {
- .act_hid = BNXT_ULP_ACT_HID_2e28,
- .act_pattern_id = 9,
+ .act_hid = BNXT_ULP_ACT_HID_5722,
+ .act_pattern_id = 216,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[301] = {
- .act_hid = BNXT_ULP_ACT_HID_29e4,
- .act_pattern_id = 10,
+ .act_hid = BNXT_ULP_ACT_HID_38822,
+ .act_pattern_id = 217,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
},
[302] = {
- .act_hid = BNXT_ULP_ACT_HID_76a0,
- .act_pattern_id = 11,
+ .act_hid = BNXT_ULP_ACT_HID_142c2,
+ .act_pattern_id = 218,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
- },
- [303] = {
- .act_hid = BNXT_ULP_ACT_HID_47b0,
- .act_pattern_id = 12,
- .app_sig = 0,
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [303] = {
+ .act_hid = BNXT_ULP_ACT_HID_1cb42,
+ .act_pattern_id = 219,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [304] = {
+ .act_hid = BNXT_ULP_ACT_HID_12520,
+ .act_pattern_id = 220,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [305] = {
+ .act_hid = BNXT_ULP_ACT_HID_2bda0,
+ .act_pattern_id = 221,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [306] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ada0,
+ .act_pattern_id = 222,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [307] = {
+ .act_hid = BNXT_ULP_ACT_HID_120c0,
+ .act_pattern_id = 223,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [308] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b940,
+ .act_pattern_id = 224,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [309] = {
+ .act_hid = BNXT_ULP_ACT_HID_23620,
+ .act_pattern_id = 225,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [310] = {
+ .act_hid = BNXT_ULP_ACT_HID_321c0,
+ .act_pattern_id = 226,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [311] = {
+ .act_hid = BNXT_ULP_ACT_HID_125a0,
+ .act_pattern_id = 227,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [312] = {
+ .act_hid = BNXT_ULP_ACT_HID_2be20,
+ .act_pattern_id = 228,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [313] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ae20,
+ .act_pattern_id = 229,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [314] = {
+ .act_hid = BNXT_ULP_ACT_HID_12140,
+ .act_pattern_id = 230,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [315] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b9c0,
+ .act_pattern_id = 231,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [316] = {
+ .act_hid = BNXT_ULP_ACT_HID_236a0,
+ .act_pattern_id = 232,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [317] = {
+ .act_hid = BNXT_ULP_ACT_HID_32240,
+ .act_pattern_id = 233,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [318] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f160,
+ .act_pattern_id = 234,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [319] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a9e0,
+ .act_pattern_id = 235,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [320] = {
+ .act_hid = BNXT_ULP_ACT_HID_279e0,
+ .act_pattern_id = 236,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [321] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ed00,
+ .act_pattern_id = 237,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [322] = {
+ .act_hid = BNXT_ULP_ACT_HID_36580,
+ .act_pattern_id = 238,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [323] = {
+ .act_hid = BNXT_ULP_ACT_HID_3020,
+ .act_pattern_id = 239,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [324] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f1e0,
+ .act_pattern_id = 240,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [325] = {
+ .act_hid = BNXT_ULP_ACT_HID_3aa60,
+ .act_pattern_id = 241,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [326] = {
+ .act_hid = BNXT_ULP_ACT_HID_27a60,
+ .act_pattern_id = 242,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [327] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ed80,
+ .act_pattern_id = 243,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [328] = {
+ .act_hid = BNXT_ULP_ACT_HID_36600,
+ .act_pattern_id = 244,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [329] = {
+ .act_hid = BNXT_ULP_ACT_HID_30a0,
+ .act_pattern_id = 245,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 3
+ },
+ [330] = {
+ .act_hid = BNXT_ULP_ACT_HID_0100,
+ .act_pattern_id = 0,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_RSS |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [331] = {
+ .act_hid = BNXT_ULP_ACT_HID_0180,
+ .act_pattern_id = 1,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_RSS |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [332] = {
+ .act_hid = BNXT_ULP_ACT_HID_32e84,
+ .act_pattern_id = 2,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [333] = {
+ .act_hid = BNXT_ULP_ACT_HID_32f04,
+ .act_pattern_id = 3,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [334] = {
+ .act_hid = BNXT_ULP_ACT_HID_19842,
+ .act_pattern_id = 4,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_RSS |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [335] = {
+ .act_hid = BNXT_ULP_ACT_HID_198c2,
+ .act_pattern_id = 5,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_RSS |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [336] = {
+ .act_hid = BNXT_ULP_ACT_HID_e7e6,
+ .act_pattern_id = 6,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [337] = {
+ .act_hid = BNXT_ULP_ACT_HID_e866,
+ .act_pattern_id = 7,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_QUEUE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 4
+ },
+ [338] = {
+ .act_hid = BNXT_ULP_ACT_HID_a3e0,
+ .act_pattern_id = 0,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
+ },
+ [339] = {
+ .act_hid = BNXT_ULP_ACT_HID_240e0,
+ .act_pattern_id = 1,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
+ },
+ [340] = {
+ .act_hid = BNXT_ULP_ACT_HID_322c8,
+ .act_pattern_id = 2,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_METER_PROFILE |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
+ },
+ [341] = {
+ .act_hid = BNXT_ULP_ACT_HID_e228,
+ .act_pattern_id = 3,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DELETE |
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
+ },
+ [342] = {
+ .act_hid = BNXT_ULP_ACT_HID_36130,
+ .act_pattern_id = 4,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_UPDATE |
+ BNXT_ULP_ACT_BIT_SHARED_METER |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .act_tid = 5
+ },
+ [343] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e840,
+ .act_pattern_id = 0,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [344] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e880,
+ .act_pattern_id = 1,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [345] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e900,
+ .act_pattern_id = 2,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [346] = {
+ .act_hid = BNXT_ULP_ACT_HID_170c0,
+ .act_pattern_id = 3,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [347] = {
+ .act_hid = BNXT_ULP_ACT_HID_14ea0,
+ .act_pattern_id = 4,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [348] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b480,
+ .act_pattern_id = 5,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [349] = {
+ .act_hid = BNXT_ULP_ACT_HID_23d00,
+ .act_pattern_id = 6,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [350] = {
+ .act_hid = BNXT_ULP_ACT_HID_21ae0,
+ .act_pattern_id = 7,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [351] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e8c0,
+ .act_pattern_id = 8,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [352] = {
+ .act_hid = BNXT_ULP_ACT_HID_17140,
+ .act_pattern_id = 9,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [353] = {
+ .act_hid = BNXT_ULP_ACT_HID_14f20,
+ .act_pattern_id = 10,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [354] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b500,
+ .act_pattern_id = 11,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [355] = {
+ .act_hid = BNXT_ULP_ACT_HID_23d80,
+ .act_pattern_id = 12,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [356] = {
+ .act_hid = BNXT_ULP_ACT_HID_21b60,
+ .act_pattern_id = 13,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [357] = {
+ .act_hid = BNXT_ULP_ACT_HID_a1a2,
+ .act_pattern_id = 14,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [358] = {
+ .act_hid = BNXT_ULP_ACT_HID_a1e2,
+ .act_pattern_id = 15,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [359] = {
+ .act_hid = BNXT_ULP_ACT_HID_a262,
+ .act_pattern_id = 16,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [360] = {
+ .act_hid = BNXT_ULP_ACT_HID_30802,
+ .act_pattern_id = 17,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [361] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e5e2,
+ .act_pattern_id = 18,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [362] = {
+ .act_hid = BNXT_ULP_ACT_HID_16de2,
+ .act_pattern_id = 19,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [363] = {
+ .act_hid = BNXT_ULP_ACT_HID_3d442,
+ .act_pattern_id = 20,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [364] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b222,
+ .act_pattern_id = 21,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [365] = {
+ .act_hid = BNXT_ULP_ACT_HID_a222,
+ .act_pattern_id = 22,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [366] = {
+ .act_hid = BNXT_ULP_ACT_HID_30882,
+ .act_pattern_id = 23,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [367] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e662,
+ .act_pattern_id = 24,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [368] = {
+ .act_hid = BNXT_ULP_ACT_HID_16e62,
+ .act_pattern_id = 25,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [369] = {
+ .act_hid = BNXT_ULP_ACT_HID_3d4c2,
+ .act_pattern_id = 26,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [370] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b2a2,
+ .act_pattern_id = 27,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [371] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a4e0,
+ .act_pattern_id = 28,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [372] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a520,
+ .act_pattern_id = 29,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [373] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a5a0,
+ .act_pattern_id = 30,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [374] = {
+ .act_hid = BNXT_ULP_ACT_HID_22d60,
+ .act_pattern_id = 31,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [375] = {
+ .act_hid = BNXT_ULP_ACT_HID_1eb40,
+ .act_pattern_id = 32,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [376] = {
+ .act_hid = BNXT_ULP_ACT_HID_7340,
+ .act_pattern_id = 33,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [377] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f9a0,
+ .act_pattern_id = 34,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [378] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b780,
+ .act_pattern_id = 35,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [379] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a560,
+ .act_pattern_id = 36,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [380] = {
+ .act_hid = BNXT_ULP_ACT_HID_22de0,
+ .act_pattern_id = 37,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [381] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ebc0,
+ .act_pattern_id = 38,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [382] = {
+ .act_hid = BNXT_ULP_ACT_HID_73c0,
+ .act_pattern_id = 39,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [383] = {
+ .act_hid = BNXT_ULP_ACT_HID_2fa20,
+ .act_pattern_id = 40,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [384] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b800,
+ .act_pattern_id = 41,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_VLAN_VID |
+ BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 6
+ },
+ [385] = {
+ .act_hid = BNXT_ULP_ACT_HID_32840,
+ .act_pattern_id = 0,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [386] = {
+ .act_hid = BNXT_ULP_ACT_HID_36840,
+ .act_pattern_id = 1,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [387] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a840,
+ .act_pattern_id = 2,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [388] = {
+ .act_hid = BNXT_ULP_ACT_HID_328c0,
+ .act_pattern_id = 3,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [389] = {
+ .act_hid = BNXT_ULP_ACT_HID_368c0,
+ .act_pattern_id = 4,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [390] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a8c0,
+ .act_pattern_id = 5,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [391] = {
+ .act_hid = BNXT_ULP_ACT_HID_370c0,
+ .act_pattern_id = 6,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [392] = {
+ .act_hid = BNXT_ULP_ACT_HID_12b60,
+ .act_pattern_id = 7,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [393] = {
+ .act_hid = BNXT_ULP_ACT_HID_1b60,
+ .act_pattern_id = 8,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [394] = {
+ .act_hid = BNXT_ULP_ACT_HID_34c60,
+ .act_pattern_id = 9,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [395] = {
+ .act_hid = BNXT_ULP_ACT_HID_10700,
+ .act_pattern_id = 10,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [396] = {
+ .act_hid = BNXT_ULP_ACT_HID_18f80,
+ .act_pattern_id = 11,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [397] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b0c0,
+ .act_pattern_id = 12,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [398] = {
+ .act_hid = BNXT_ULP_ACT_HID_16b60,
+ .act_pattern_id = 13,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [399] = {
+ .act_hid = BNXT_ULP_ACT_HID_5b60,
+ .act_pattern_id = 14,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [400] = {
+ .act_hid = BNXT_ULP_ACT_HID_38c60,
+ .act_pattern_id = 15,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [401] = {
+ .act_hid = BNXT_ULP_ACT_HID_14700,
+ .act_pattern_id = 16,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [402] = {
+ .act_hid = BNXT_ULP_ACT_HID_1cf80,
+ .act_pattern_id = 17,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [403] = {
+ .act_hid = BNXT_ULP_ACT_HID_12e0,
+ .act_pattern_id = 18,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [404] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ab60,
+ .act_pattern_id = 19,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [405] = {
+ .act_hid = BNXT_ULP_ACT_HID_9b60,
+ .act_pattern_id = 20,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [406] = {
+ .act_hid = BNXT_ULP_ACT_HID_3cc60,
+ .act_pattern_id = 21,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [407] = {
+ .act_hid = BNXT_ULP_ACT_HID_18700,
+ .act_pattern_id = 22,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [408] = {
+ .act_hid = BNXT_ULP_ACT_HID_20f80,
+ .act_pattern_id = 23,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [409] = {
+ .act_hid = BNXT_ULP_ACT_HID_52e0,
+ .act_pattern_id = 24,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [410] = {
+ .act_hid = BNXT_ULP_ACT_HID_1eb60,
+ .act_pattern_id = 25,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [411] = {
+ .act_hid = BNXT_ULP_ACT_HID_db60,
+ .act_pattern_id = 26,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [412] = {
+ .act_hid = BNXT_ULP_ACT_HID_2e80,
+ .act_pattern_id = 27,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [413] = {
+ .act_hid = BNXT_ULP_ACT_HID_1c700,
+ .act_pattern_id = 28,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [414] = {
+ .act_hid = BNXT_ULP_ACT_HID_24f80,
+ .act_pattern_id = 29,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [415] = {
+ .act_hid = BNXT_ULP_ACT_HID_37140,
+ .act_pattern_id = 30,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [416] = {
+ .act_hid = BNXT_ULP_ACT_HID_12be0,
+ .act_pattern_id = 31,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [417] = {
+ .act_hid = BNXT_ULP_ACT_HID_1be0,
+ .act_pattern_id = 32,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [418] = {
+ .act_hid = BNXT_ULP_ACT_HID_34ce0,
+ .act_pattern_id = 33,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [419] = {
+ .act_hid = BNXT_ULP_ACT_HID_10780,
+ .act_pattern_id = 34,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [420] = {
+ .act_hid = BNXT_ULP_ACT_HID_19000,
+ .act_pattern_id = 35,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [421] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b140,
+ .act_pattern_id = 36,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [422] = {
+ .act_hid = BNXT_ULP_ACT_HID_16be0,
+ .act_pattern_id = 37,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [423] = {
+ .act_hid = BNXT_ULP_ACT_HID_5be0,
+ .act_pattern_id = 38,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [424] = {
+ .act_hid = BNXT_ULP_ACT_HID_38ce0,
+ .act_pattern_id = 39,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [425] = {
+ .act_hid = BNXT_ULP_ACT_HID_14780,
+ .act_pattern_id = 40,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [426] = {
+ .act_hid = BNXT_ULP_ACT_HID_1d000,
+ .act_pattern_id = 41,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [427] = {
+ .act_hid = BNXT_ULP_ACT_HID_1360,
+ .act_pattern_id = 42,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [428] = {
+ .act_hid = BNXT_ULP_ACT_HID_1abe0,
+ .act_pattern_id = 43,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [429] = {
+ .act_hid = BNXT_ULP_ACT_HID_9be0,
+ .act_pattern_id = 44,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [430] = {
+ .act_hid = BNXT_ULP_ACT_HID_3cce0,
+ .act_pattern_id = 45,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [431] = {
+ .act_hid = BNXT_ULP_ACT_HID_18780,
+ .act_pattern_id = 46,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [432] = {
+ .act_hid = BNXT_ULP_ACT_HID_21000,
+ .act_pattern_id = 47,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [433] = {
+ .act_hid = BNXT_ULP_ACT_HID_5360,
+ .act_pattern_id = 48,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [434] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ebe0,
+ .act_pattern_id = 49,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [435] = {
+ .act_hid = BNXT_ULP_ACT_HID_dbe0,
+ .act_pattern_id = 50,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [436] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f00,
+ .act_pattern_id = 51,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [437] = {
+ .act_hid = BNXT_ULP_ACT_HID_1c780,
+ .act_pattern_id = 52,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [438] = {
+ .act_hid = BNXT_ULP_ACT_HID_25000,
+ .act_pattern_id = 53,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [439] = {
+ .act_hid = BNXT_ULP_ACT_HID_5f20,
+ .act_pattern_id = 54,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [440] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f7a0,
+ .act_pattern_id = 55,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [441] = {
+ .act_hid = BNXT_ULP_ACT_HID_e7a0,
+ .act_pattern_id = 56,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [442] = {
+ .act_hid = BNXT_ULP_ACT_HID_3ac0,
+ .act_pattern_id = 57,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [443] = {
+ .act_hid = BNXT_ULP_ACT_HID_1d340,
+ .act_pattern_id = 58,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [444] = {
+ .act_hid = BNXT_ULP_ACT_HID_25bc0,
+ .act_pattern_id = 59,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [445] = {
+ .act_hid = BNXT_ULP_ACT_HID_5fa0,
+ .act_pattern_id = 60,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [446] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f820,
+ .act_pattern_id = 61,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [447] = {
+ .act_hid = BNXT_ULP_ACT_HID_e820,
+ .act_pattern_id = 62,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [448] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b40,
+ .act_pattern_id = 63,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [449] = {
+ .act_hid = BNXT_ULP_ACT_HID_1d3c0,
+ .act_pattern_id = 64,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [450] = {
+ .act_hid = BNXT_ULP_ACT_HID_25c40,
+ .act_pattern_id = 65,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [451] = {
+ .act_hid = BNXT_ULP_ACT_HID_237a0,
+ .act_pattern_id = 66,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [452] = {
+ .act_hid = BNXT_ULP_ACT_HID_127a0,
+ .act_pattern_id = 67,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [453] = {
+ .act_hid = BNXT_ULP_ACT_HID_7ac0,
+ .act_pattern_id = 68,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [454] = {
+ .act_hid = BNXT_ULP_ACT_HID_9f20,
+ .act_pattern_id = 69,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [455] = {
+ .act_hid = BNXT_ULP_ACT_HID_21340,
+ .act_pattern_id = 70,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [456] = {
+ .act_hid = BNXT_ULP_ACT_HID_29bc0,
+ .act_pattern_id = 71,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [457] = {
+ .act_hid = BNXT_ULP_ACT_HID_9fa0,
+ .act_pattern_id = 72,
+ .app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [458] = {
+ .act_hid = BNXT_ULP_ACT_HID_23820,
+ .act_pattern_id = 73,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [304] = {
- .act_hid = BNXT_ULP_ACT_HID_436c,
- .act_pattern_id = 13,
+ [459] = {
+ .act_hid = BNXT_ULP_ACT_HID_12820,
+ .act_pattern_id = 74,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [460] = {
+ .act_hid = BNXT_ULP_ACT_HID_7b40,
+ .act_pattern_id = 75,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [305] = {
- .act_hid = BNXT_ULP_ACT_HID_1436,
- .act_pattern_id = 14,
+ [461] = {
+ .act_hid = BNXT_ULP_ACT_HID_213c0,
+ .act_pattern_id = 76,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [306] = {
- .act_hid = BNXT_ULP_ACT_HID_143e,
- .act_pattern_id = 15,
+ [462] = {
+ .act_hid = BNXT_ULP_ACT_HID_29c40,
+ .act_pattern_id = 77,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [307] = {
- .act_hid = BNXT_ULP_ACT_HID_144e,
- .act_pattern_id = 16,
+ [463] = {
+ .act_hid = BNXT_ULP_ACT_HID_df20,
+ .act_pattern_id = 78,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_DROP |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [464] = {
+ .act_hid = BNXT_ULP_ACT_HID_277a0,
+ .act_pattern_id = 79,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [465] = {
+ .act_hid = BNXT_ULP_ACT_HID_167a0,
+ .act_pattern_id = 80,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [466] = {
+ .act_hid = BNXT_ULP_ACT_HID_bac0,
+ .act_pattern_id = 81,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [467] = {
+ .act_hid = BNXT_ULP_ACT_HID_25340,
+ .act_pattern_id = 82,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [468] = {
+ .act_hid = BNXT_ULP_ACT_HID_2dbc0,
+ .act_pattern_id = 83,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [469] = {
+ .act_hid = BNXT_ULP_ACT_HID_dfa0,
+ .act_pattern_id = 84,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [308] = {
- .act_hid = BNXT_ULP_ACT_HID_6102,
- .act_pattern_id = 17,
+ [470] = {
+ .act_hid = BNXT_ULP_ACT_HID_27820,
+ .act_pattern_id = 85,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [309] = {
- .act_hid = BNXT_ULP_ACT_HID_5cbe,
- .act_pattern_id = 18,
+ [471] = {
+ .act_hid = BNXT_ULP_ACT_HID_16820,
+ .act_pattern_id = 86,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
+ },
+ [472] = {
+ .act_hid = BNXT_ULP_ACT_HID_bb40,
+ .act_pattern_id = 87,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [473] = {
+ .act_hid = BNXT_ULP_ACT_HID_253c0,
+ .act_pattern_id = 88,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [474] = {
+ .act_hid = BNXT_ULP_ACT_HID_2dc40,
+ .act_pattern_id = 89,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [475] = {
+ .act_hid = BNXT_ULP_ACT_HID_11f20,
+ .act_pattern_id = 90,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [476] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b7a0,
+ .act_pattern_id = 91,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
+ },
+ [477] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a7a0,
+ .act_pattern_id = 92,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 7
},
- [310] = {
- .act_hid = BNXT_ULP_ACT_HID_2dbe,
- .act_pattern_id = 19,
+ [478] = {
+ .act_hid = BNXT_ULP_ACT_HID_fac0,
+ .act_pattern_id = 93,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [311] = {
- .act_hid = BNXT_ULP_ACT_HID_7a8a,
- .act_pattern_id = 20,
+ [479] = {
+ .act_hid = BNXT_ULP_ACT_HID_29340,
+ .act_pattern_id = 94,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [312] = {
- .act_hid = BNXT_ULP_ACT_HID_7646,
- .act_pattern_id = 21,
+ [480] = {
+ .act_hid = BNXT_ULP_ACT_HID_31bc0,
+ .act_pattern_id = 95,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [313] = {
- .act_hid = BNXT_ULP_ACT_HID_1446,
- .act_pattern_id = 22,
+ [481] = {
+ .act_hid = BNXT_ULP_ACT_HID_11fa0,
+ .act_pattern_id = 96,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [314] = {
- .act_hid = BNXT_ULP_ACT_HID_6112,
- .act_pattern_id = 23,
+ [482] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b820,
+ .act_pattern_id = 97,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [315] = {
- .act_hid = BNXT_ULP_ACT_HID_5cce,
- .act_pattern_id = 24,
+ [483] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a820,
+ .act_pattern_id = 98,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [316] = {
- .act_hid = BNXT_ULP_ACT_HID_2dce,
- .act_pattern_id = 25,
+ [484] = {
+ .act_hid = BNXT_ULP_ACT_HID_fb40,
+ .act_pattern_id = 99,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [317] = {
- .act_hid = BNXT_ULP_ACT_HID_7a9a,
- .act_pattern_id = 26,
+ [485] = {
+ .act_hid = BNXT_ULP_ACT_HID_293c0,
+ .act_pattern_id = 100,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_PCP |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [318] = {
- .act_hid = BNXT_ULP_ACT_HID_7656,
- .act_pattern_id = 27,
+ [486] = {
+ .act_hid = BNXT_ULP_ACT_HID_31c40,
+ .act_pattern_id = 101,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
- BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
- BNXT_ULP_ACT_BIT_SET_VLAN_VID |
- BNXT_ULP_ACT_BIT_PUSH_VLAN |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
+ BNXT_ULP_ACT_BIT_SET_IPV4_DST |
+ BNXT_ULP_ACT_BIT_SET_TP_SRC |
+ BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
- .act_tid = 6
+ .act_tid = 7
},
- [319] = {
- .act_hid = BNXT_ULP_ACT_HID_6508,
- .act_pattern_id = 0,
+ [487] = {
+ .act_hid = BNXT_ULP_ACT_HID_e1a2,
+ .act_pattern_id = 102,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [320] = {
- .act_hid = BNXT_ULP_ACT_HID_6d08,
- .act_pattern_id = 1,
+ [488] = {
+ .act_hid = BNXT_ULP_ACT_HID_121a2,
+ .act_pattern_id = 103,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [321] = {
- .act_hid = BNXT_ULP_ACT_HID_7508,
- .act_pattern_id = 2,
+ [489] = {
+ .act_hid = BNXT_ULP_ACT_HID_161a2,
+ .act_pattern_id = 104,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [322] = {
- .act_hid = BNXT_ULP_ACT_HID_6518,
- .act_pattern_id = 3,
+ [490] = {
+ .act_hid = BNXT_ULP_ACT_HID_e222,
+ .act_pattern_id = 105,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [323] = {
- .act_hid = BNXT_ULP_ACT_HID_6d18,
- .act_pattern_id = 4,
+ [491] = {
+ .act_hid = BNXT_ULP_ACT_HID_12222,
+ .act_pattern_id = 106,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [324] = {
- .act_hid = BNXT_ULP_ACT_HID_7518,
- .act_pattern_id = 5,
+ [492] = {
+ .act_hid = BNXT_ULP_ACT_HID_16222,
+ .act_pattern_id = 107,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [325] = {
- .act_hid = BNXT_ULP_ACT_HID_6e18,
- .act_pattern_id = 6,
+ [493] = {
+ .act_hid = BNXT_ULP_ACT_HID_12a22,
+ .act_pattern_id = 108,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [326] = {
- .act_hid = BNXT_ULP_ACT_HID_256c,
- .act_pattern_id = 7,
+ [494] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c2a2,
+ .act_pattern_id = 109,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [327] = {
- .act_hid = BNXT_ULP_ACT_HID_036c,
- .act_pattern_id = 8,
+ [495] = {
+ .act_hid = BNXT_ULP_ACT_HID_1b2a2,
+ .act_pattern_id = 110,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [328] = {
- .act_hid = BNXT_ULP_ACT_HID_698c,
- .act_pattern_id = 9,
+ [496] = {
+ .act_hid = BNXT_ULP_ACT_HID_105c2,
+ .act_pattern_id = 111,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [329] = {
- .act_hid = BNXT_ULP_ACT_HID_20e0,
- .act_pattern_id = 10,
+ [497] = {
+ .act_hid = BNXT_ULP_ACT_HID_29e42,
+ .act_pattern_id = 112,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [330] = {
- .act_hid = BNXT_ULP_ACT_HID_31f0,
- .act_pattern_id = 11,
+ [498] = {
+ .act_hid = BNXT_ULP_ACT_HID_326c2,
+ .act_pattern_id = 113,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -4472,53 +6656,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [331] = {
- .act_hid = BNXT_ULP_ACT_HID_7618,
- .act_pattern_id = 12,
+ [499] = {
+ .act_hid = BNXT_ULP_ACT_HID_16a22,
+ .act_pattern_id = 114,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [332] = {
- .act_hid = BNXT_ULP_ACT_HID_2d6c,
- .act_pattern_id = 13,
+ [500] = {
+ .act_hid = BNXT_ULP_ACT_HID_302a2,
+ .act_pattern_id = 115,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [333] = {
- .act_hid = BNXT_ULP_ACT_HID_0b6c,
- .act_pattern_id = 14,
+ [501] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f2a2,
+ .act_pattern_id = 116,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [334] = {
- .act_hid = BNXT_ULP_ACT_HID_718c,
- .act_pattern_id = 15,
+ [502] = {
+ .act_hid = BNXT_ULP_ACT_HID_145c2,
+ .act_pattern_id = 117,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [335] = {
- .act_hid = BNXT_ULP_ACT_HID_28e0,
- .act_pattern_id = 16,
+ [503] = {
+ .act_hid = BNXT_ULP_ACT_HID_2de42,
+ .act_pattern_id = 118,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -4526,11 +6715,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [336] = {
- .act_hid = BNXT_ULP_ACT_HID_39f0,
- .act_pattern_id = 17,
+ [504] = {
+ .act_hid = BNXT_ULP_ACT_HID_366c2,
+ .act_pattern_id = 119,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4539,53 +6729,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [337] = {
- .act_hid = BNXT_ULP_ACT_HID_025c,
- .act_pattern_id = 18,
+ [505] = {
+ .act_hid = BNXT_ULP_ACT_HID_1aa22,
+ .act_pattern_id = 120,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [338] = {
- .act_hid = BNXT_ULP_ACT_HID_356c,
- .act_pattern_id = 19,
+ [506] = {
+ .act_hid = BNXT_ULP_ACT_HID_342a2,
+ .act_pattern_id = 121,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [339] = {
- .act_hid = BNXT_ULP_ACT_HID_136c,
- .act_pattern_id = 20,
+ [507] = {
+ .act_hid = BNXT_ULP_ACT_HID_232a2,
+ .act_pattern_id = 122,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [340] = {
- .act_hid = BNXT_ULP_ACT_HID_798c,
- .act_pattern_id = 21,
+ [508] = {
+ .act_hid = BNXT_ULP_ACT_HID_185c2,
+ .act_pattern_id = 123,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [341] = {
- .act_hid = BNXT_ULP_ACT_HID_30e0,
- .act_pattern_id = 22,
+ [509] = {
+ .act_hid = BNXT_ULP_ACT_HID_31e42,
+ .act_pattern_id = 124,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -4593,11 +6788,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [342] = {
- .act_hid = BNXT_ULP_ACT_HID_41f0,
- .act_pattern_id = 23,
+ [510] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a6c2,
+ .act_pattern_id = 125,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4606,22 +6802,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [343] = {
- .act_hid = BNXT_ULP_ACT_HID_0a5c,
- .act_pattern_id = 24,
+ [511] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ea22,
+ .act_pattern_id = 126,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [344] = {
- .act_hid = BNXT_ULP_ACT_HID_3d6c,
- .act_pattern_id = 25,
+ [512] = {
+ .act_hid = BNXT_ULP_ACT_HID_382a2,
+ .act_pattern_id = 127,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4629,22 +6827,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [345] = {
- .act_hid = BNXT_ULP_ACT_HID_1b6c,
- .act_pattern_id = 26,
+ [513] = {
+ .act_hid = BNXT_ULP_ACT_HID_272a2,
+ .act_pattern_id = 128,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [346] = {
- .act_hid = BNXT_ULP_ACT_HID_05d0,
- .act_pattern_id = 27,
+ [514] = {
+ .act_hid = BNXT_ULP_ACT_HID_1c5c2,
+ .act_pattern_id = 129,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4652,11 +6852,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [347] = {
- .act_hid = BNXT_ULP_ACT_HID_38e0,
- .act_pattern_id = 28,
+ [515] = {
+ .act_hid = BNXT_ULP_ACT_HID_35e42,
+ .act_pattern_id = 130,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4665,11 +6866,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [348] = {
- .act_hid = BNXT_ULP_ACT_HID_49f0,
- .act_pattern_id = 29,
+ [516] = {
+ .act_hid = BNXT_ULP_ACT_HID_08e2,
+ .act_pattern_id = 131,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4679,53 +6881,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [349] = {
- .act_hid = BNXT_ULP_ACT_HID_6e28,
- .act_pattern_id = 30,
+ [517] = {
+ .act_hid = BNXT_ULP_ACT_HID_12aa2,
+ .act_pattern_id = 132,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [350] = {
- .act_hid = BNXT_ULP_ACT_HID_257c,
- .act_pattern_id = 31,
+ [518] = {
+ .act_hid = BNXT_ULP_ACT_HID_2c322,
+ .act_pattern_id = 133,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [351] = {
- .act_hid = BNXT_ULP_ACT_HID_037c,
- .act_pattern_id = 32,
+ [519] = {
+ .act_hid = BNXT_ULP_ACT_HID_1b322,
+ .act_pattern_id = 134,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [352] = {
- .act_hid = BNXT_ULP_ACT_HID_699c,
- .act_pattern_id = 33,
+ [520] = {
+ .act_hid = BNXT_ULP_ACT_HID_10642,
+ .act_pattern_id = 135,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [353] = {
- .act_hid = BNXT_ULP_ACT_HID_20f0,
- .act_pattern_id = 34,
+ [521] = {
+ .act_hid = BNXT_ULP_ACT_HID_29ec2,
+ .act_pattern_id = 136,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -4733,11 +6940,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [354] = {
- .act_hid = BNXT_ULP_ACT_HID_3200,
- .act_pattern_id = 35,
+ [522] = {
+ .act_hid = BNXT_ULP_ACT_HID_32742,
+ .act_pattern_id = 137,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4746,22 +6954,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [355] = {
- .act_hid = BNXT_ULP_ACT_HID_7628,
- .act_pattern_id = 36,
+ [523] = {
+ .act_hid = BNXT_ULP_ACT_HID_16aa2,
+ .act_pattern_id = 138,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [356] = {
- .act_hid = BNXT_ULP_ACT_HID_2d7c,
- .act_pattern_id = 37,
+ [524] = {
+ .act_hid = BNXT_ULP_ACT_HID_30322,
+ .act_pattern_id = 139,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4769,22 +6979,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [357] = {
- .act_hid = BNXT_ULP_ACT_HID_0b7c,
- .act_pattern_id = 38,
+ [525] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f322,
+ .act_pattern_id = 140,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [358] = {
- .act_hid = BNXT_ULP_ACT_HID_719c,
- .act_pattern_id = 39,
+ [526] = {
+ .act_hid = BNXT_ULP_ACT_HID_14642,
+ .act_pattern_id = 141,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4792,11 +7004,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [359] = {
- .act_hid = BNXT_ULP_ACT_HID_28f0,
- .act_pattern_id = 40,
+ [527] = {
+ .act_hid = BNXT_ULP_ACT_HID_2dec2,
+ .act_pattern_id = 142,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4805,11 +7018,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [360] = {
- .act_hid = BNXT_ULP_ACT_HID_3a00,
- .act_pattern_id = 41,
+ [528] = {
+ .act_hid = BNXT_ULP_ACT_HID_36742,
+ .act_pattern_id = 143,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4819,22 +7033,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [361] = {
- .act_hid = BNXT_ULP_ACT_HID_026c,
- .act_pattern_id = 42,
+ [529] = {
+ .act_hid = BNXT_ULP_ACT_HID_1aaa2,
+ .act_pattern_id = 144,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [362] = {
- .act_hid = BNXT_ULP_ACT_HID_357c,
- .act_pattern_id = 43,
+ [530] = {
+ .act_hid = BNXT_ULP_ACT_HID_34322,
+ .act_pattern_id = 145,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4842,22 +7058,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [363] = {
- .act_hid = BNXT_ULP_ACT_HID_137c,
- .act_pattern_id = 44,
+ [531] = {
+ .act_hid = BNXT_ULP_ACT_HID_23322,
+ .act_pattern_id = 146,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [364] = {
- .act_hid = BNXT_ULP_ACT_HID_799c,
- .act_pattern_id = 45,
+ [532] = {
+ .act_hid = BNXT_ULP_ACT_HID_18642,
+ .act_pattern_id = 147,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4865,11 +7083,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [365] = {
- .act_hid = BNXT_ULP_ACT_HID_30f0,
- .act_pattern_id = 46,
+ [533] = {
+ .act_hid = BNXT_ULP_ACT_HID_31ec2,
+ .act_pattern_id = 148,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -4878,11 +7097,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [366] = {
- .act_hid = BNXT_ULP_ACT_HID_4200,
- .act_pattern_id = 47,
+ [534] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a742,
+ .act_pattern_id = 149,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -4892,11 +7112,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [367] = {
- .act_hid = BNXT_ULP_ACT_HID_0a6c,
- .act_pattern_id = 48,
+ [535] = {
+ .act_hid = BNXT_ULP_ACT_HID_1eaa2,
+ .act_pattern_id = 150,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4904,11 +7125,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [368] = {
- .act_hid = BNXT_ULP_ACT_HID_3d7c,
- .act_pattern_id = 49,
+ [536] = {
+ .act_hid = BNXT_ULP_ACT_HID_38322,
+ .act_pattern_id = 151,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4917,11 +7139,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [369] = {
- .act_hid = BNXT_ULP_ACT_HID_1b7c,
- .act_pattern_id = 50,
+ [537] = {
+ .act_hid = BNXT_ULP_ACT_HID_27322,
+ .act_pattern_id = 152,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4929,11 +7152,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [370] = {
- .act_hid = BNXT_ULP_ACT_HID_05e0,
- .act_pattern_id = 51,
+ [538] = {
+ .act_hid = BNXT_ULP_ACT_HID_1c642,
+ .act_pattern_id = 153,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4942,11 +7166,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [371] = {
- .act_hid = BNXT_ULP_ACT_HID_38f0,
- .act_pattern_id = 52,
+ [539] = {
+ .act_hid = BNXT_ULP_ACT_HID_35ec2,
+ .act_pattern_id = 154,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4956,11 +7181,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [372] = {
- .act_hid = BNXT_ULP_ACT_HID_4a00,
- .act_pattern_id = 53,
+ [540] = {
+ .act_hid = BNXT_ULP_ACT_HID_0962,
+ .act_pattern_id = 155,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -4971,53 +7197,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [373] = {
- .act_hid = BNXT_ULP_ACT_HID_0be4,
- .act_pattern_id = 54,
+ [541] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f662,
+ .act_pattern_id = 156,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [374] = {
- .act_hid = BNXT_ULP_ACT_HID_3ef4,
- .act_pattern_id = 55,
+ [542] = {
+ .act_hid = BNXT_ULP_ACT_HID_38ee2,
+ .act_pattern_id = 157,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [375] = {
- .act_hid = BNXT_ULP_ACT_HID_1cf4,
- .act_pattern_id = 56,
+ [543] = {
+ .act_hid = BNXT_ULP_ACT_HID_27ee2,
+ .act_pattern_id = 158,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [376] = {
- .act_hid = BNXT_ULP_ACT_HID_0758,
- .act_pattern_id = 57,
+ [544] = {
+ .act_hid = BNXT_ULP_ACT_HID_1d202,
+ .act_pattern_id = 159,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [377] = {
- .act_hid = BNXT_ULP_ACT_HID_3a68,
- .act_pattern_id = 58,
+ [545] = {
+ .act_hid = BNXT_ULP_ACT_HID_36a82,
+ .act_pattern_id = 160,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -5025,11 +7256,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [378] = {
- .act_hid = BNXT_ULP_ACT_HID_4b78,
- .act_pattern_id = 59,
+ [546] = {
+ .act_hid = BNXT_ULP_ACT_HID_1522,
+ .act_pattern_id = 161,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5038,22 +7270,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [379] = {
- .act_hid = BNXT_ULP_ACT_HID_0bf4,
- .act_pattern_id = 60,
+ [547] = {
+ .act_hid = BNXT_ULP_ACT_HID_1f6e2,
+ .act_pattern_id = 162,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [380] = {
- .act_hid = BNXT_ULP_ACT_HID_3f04,
- .act_pattern_id = 61,
+ [548] = {
+ .act_hid = BNXT_ULP_ACT_HID_38f62,
+ .act_pattern_id = 163,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5061,22 +7295,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [381] = {
- .act_hid = BNXT_ULP_ACT_HID_1d04,
- .act_pattern_id = 62,
+ [549] = {
+ .act_hid = BNXT_ULP_ACT_HID_27f62,
+ .act_pattern_id = 164,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [382] = {
- .act_hid = BNXT_ULP_ACT_HID_0768,
- .act_pattern_id = 63,
+ [550] = {
+ .act_hid = BNXT_ULP_ACT_HID_1d282,
+ .act_pattern_id = 165,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5084,11 +7320,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [383] = {
- .act_hid = BNXT_ULP_ACT_HID_3a78,
- .act_pattern_id = 64,
+ [551] = {
+ .act_hid = BNXT_ULP_ACT_HID_36b02,
+ .act_pattern_id = 166,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5097,11 +7334,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [384] = {
- .act_hid = BNXT_ULP_ACT_HID_4b88,
- .act_pattern_id = 65,
+ [552] = {
+ .act_hid = BNXT_ULP_ACT_HID_15a2,
+ .act_pattern_id = 167,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5111,11 +7349,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [385] = {
- .act_hid = BNXT_ULP_ACT_HID_46f4,
- .act_pattern_id = 66,
+ [553] = {
+ .act_hid = BNXT_ULP_ACT_HID_3cee2,
+ .act_pattern_id = 168,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5123,22 +7362,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [386] = {
- .act_hid = BNXT_ULP_ACT_HID_24f4,
- .act_pattern_id = 67,
+ [554] = {
+ .act_hid = BNXT_ULP_ACT_HID_2bee2,
+ .act_pattern_id = 169,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [387] = {
- .act_hid = BNXT_ULP_ACT_HID_0f58,
- .act_pattern_id = 68,
+ [555] = {
+ .act_hid = BNXT_ULP_ACT_HID_21202,
+ .act_pattern_id = 170,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5146,22 +7387,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [388] = {
- .act_hid = BNXT_ULP_ACT_HID_13e4,
- .act_pattern_id = 69,
+ [556] = {
+ .act_hid = BNXT_ULP_ACT_HID_23662,
+ .act_pattern_id = 171,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [389] = {
- .act_hid = BNXT_ULP_ACT_HID_4268,
- .act_pattern_id = 70,
+ [557] = {
+ .act_hid = BNXT_ULP_ACT_HID_3aa82,
+ .act_pattern_id = 172,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5170,11 +7413,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [390] = {
- .act_hid = BNXT_ULP_ACT_HID_5378,
- .act_pattern_id = 71,
+ [558] = {
+ .act_hid = BNXT_ULP_ACT_HID_5522,
+ .act_pattern_id = 173,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5184,11 +7428,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [391] = {
- .act_hid = BNXT_ULP_ACT_HID_13f4,
- .act_pattern_id = 72,
+ [559] = {
+ .act_hid = BNXT_ULP_ACT_HID_236e2,
+ .act_pattern_id = 174,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5196,11 +7441,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [392] = {
- .act_hid = BNXT_ULP_ACT_HID_4704,
- .act_pattern_id = 73,
+ [560] = {
+ .act_hid = BNXT_ULP_ACT_HID_3cf62,
+ .act_pattern_id = 175,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5209,11 +7455,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [393] = {
- .act_hid = BNXT_ULP_ACT_HID_2504,
- .act_pattern_id = 74,
+ [561] = {
+ .act_hid = BNXT_ULP_ACT_HID_2bf62,
+ .act_pattern_id = 176,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5221,11 +7468,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [394] = {
- .act_hid = BNXT_ULP_ACT_HID_0f68,
- .act_pattern_id = 75,
+ [562] = {
+ .act_hid = BNXT_ULP_ACT_HID_21282,
+ .act_pattern_id = 177,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5234,11 +7482,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [395] = {
- .act_hid = BNXT_ULP_ACT_HID_4278,
- .act_pattern_id = 76,
+ [563] = {
+ .act_hid = BNXT_ULP_ACT_HID_3ab02,
+ .act_pattern_id = 178,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5248,11 +7497,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [396] = {
- .act_hid = BNXT_ULP_ACT_HID_5388,
- .act_pattern_id = 77,
+ [564] = {
+ .act_hid = BNXT_ULP_ACT_HID_55a2,
+ .act_pattern_id = 179,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5263,22 +7513,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [397] = {
- .act_hid = BNXT_ULP_ACT_HID_1be4,
- .act_pattern_id = 78,
+ [565] = {
+ .act_hid = BNXT_ULP_ACT_HID_27662,
+ .act_pattern_id = 180,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [398] = {
- .act_hid = BNXT_ULP_ACT_HID_4ef4,
- .act_pattern_id = 79,
+ [566] = {
+ .act_hid = BNXT_ULP_ACT_HID_3102,
+ .act_pattern_id = 181,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5286,22 +7538,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [399] = {
- .act_hid = BNXT_ULP_ACT_HID_2cf4,
- .act_pattern_id = 80,
+ [567] = {
+ .act_hid = BNXT_ULP_ACT_HID_2fee2,
+ .act_pattern_id = 182,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [400] = {
- .act_hid = BNXT_ULP_ACT_HID_1758,
- .act_pattern_id = 81,
+ [568] = {
+ .act_hid = BNXT_ULP_ACT_HID_25202,
+ .act_pattern_id = 183,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5309,11 +7563,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [401] = {
- .act_hid = BNXT_ULP_ACT_HID_4a68,
- .act_pattern_id = 82,
+ [569] = {
+ .act_hid = BNXT_ULP_ACT_HID_0ca2,
+ .act_pattern_id = 184,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5322,11 +7577,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [402] = {
- .act_hid = BNXT_ULP_ACT_HID_5b78,
- .act_pattern_id = 83,
+ [570] = {
+ .act_hid = BNXT_ULP_ACT_HID_9522,
+ .act_pattern_id = 185,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5336,11 +7592,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [403] = {
- .act_hid = BNXT_ULP_ACT_HID_1bf4,
- .act_pattern_id = 84,
+ [571] = {
+ .act_hid = BNXT_ULP_ACT_HID_276e2,
+ .act_pattern_id = 186,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5348,11 +7605,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [404] = {
- .act_hid = BNXT_ULP_ACT_HID_4f04,
- .act_pattern_id = 85,
+ [572] = {
+ .act_hid = BNXT_ULP_ACT_HID_3182,
+ .act_pattern_id = 187,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5361,11 +7619,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [405] = {
- .act_hid = BNXT_ULP_ACT_HID_2d04,
- .act_pattern_id = 86,
+ [573] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ff62,
+ .act_pattern_id = 188,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5373,11 +7632,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [406] = {
- .act_hid = BNXT_ULP_ACT_HID_1768,
- .act_pattern_id = 87,
+ [574] = {
+ .act_hid = BNXT_ULP_ACT_HID_25282,
+ .act_pattern_id = 189,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5386,11 +7646,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [407] = {
- .act_hid = BNXT_ULP_ACT_HID_4a78,
- .act_pattern_id = 88,
+ [575] = {
+ .act_hid = BNXT_ULP_ACT_HID_0d22,
+ .act_pattern_id = 190,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5400,11 +7661,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [408] = {
- .act_hid = BNXT_ULP_ACT_HID_5b88,
- .act_pattern_id = 89,
+ [576] = {
+ .act_hid = BNXT_ULP_ACT_HID_95a2,
+ .act_pattern_id = 191,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -5415,11 +7677,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [409] = {
- .act_hid = BNXT_ULP_ACT_HID_23e4,
- .act_pattern_id = 90,
+ [577] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b662,
+ .act_pattern_id = 192,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5427,11 +7690,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [410] = {
- .act_hid = BNXT_ULP_ACT_HID_56f4,
- .act_pattern_id = 91,
+ [578] = {
+ .act_hid = BNXT_ULP_ACT_HID_7102,
+ .act_pattern_id = 193,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5440,11 +7704,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [411] = {
- .act_hid = BNXT_ULP_ACT_HID_34f4,
- .act_pattern_id = 92,
+ [579] = {
+ .act_hid = BNXT_ULP_ACT_HID_33ee2,
+ .act_pattern_id = 194,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5452,11 +7717,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [412] = {
- .act_hid = BNXT_ULP_ACT_HID_1f58,
- .act_pattern_id = 93,
+ [580] = {
+ .act_hid = BNXT_ULP_ACT_HID_29202,
+ .act_pattern_id = 195,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5465,11 +7731,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [413] = {
- .act_hid = BNXT_ULP_ACT_HID_5268,
- .act_pattern_id = 94,
+ [581] = {
+ .act_hid = BNXT_ULP_ACT_HID_4ca2,
+ .act_pattern_id = 196,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5479,11 +7746,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [414] = {
- .act_hid = BNXT_ULP_ACT_HID_6378,
- .act_pattern_id = 95,
+ [582] = {
+ .act_hid = BNXT_ULP_ACT_HID_d522,
+ .act_pattern_id = 197,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5494,11 +7762,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [415] = {
- .act_hid = BNXT_ULP_ACT_HID_23f4,
- .act_pattern_id = 96,
+ [583] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b6e2,
+ .act_pattern_id = 198,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5507,11 +7776,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [416] = {
- .act_hid = BNXT_ULP_ACT_HID_5704,
- .act_pattern_id = 97,
+ [584] = {
+ .act_hid = BNXT_ULP_ACT_HID_7182,
+ .act_pattern_id = 199,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5521,11 +7791,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [417] = {
- .act_hid = BNXT_ULP_ACT_HID_3504,
- .act_pattern_id = 98,
+ [585] = {
+ .act_hid = BNXT_ULP_ACT_HID_33f62,
+ .act_pattern_id = 200,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5534,11 +7805,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [418] = {
- .act_hid = BNXT_ULP_ACT_HID_1f68,
- .act_pattern_id = 99,
+ [586] = {
+ .act_hid = BNXT_ULP_ACT_HID_29282,
+ .act_pattern_id = 201,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5548,11 +7820,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [419] = {
- .act_hid = BNXT_ULP_ACT_HID_5278,
- .act_pattern_id = 100,
+ [587] = {
+ .act_hid = BNXT_ULP_ACT_HID_4d22,
+ .act_pattern_id = 202,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5563,11 +7836,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [420] = {
- .act_hid = BNXT_ULP_ACT_HID_6388,
- .act_pattern_id = 101,
+ [588] = {
+ .act_hid = BNXT_ULP_ACT_HID_d5a2,
+ .act_pattern_id = 203,
.app_sig = 0,
.act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -5579,131 +7853,131 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [421] = {
- .act_hid = BNXT_ULP_ACT_HID_1c36,
- .act_pattern_id = 102,
+ [589] = {
+ .act_hid = BNXT_ULP_ACT_HID_3e4e0,
+ .act_pattern_id = 204,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [422] = {
- .act_hid = BNXT_ULP_ACT_HID_2436,
- .act_pattern_id = 103,
+ [590] = {
+ .act_hid = BNXT_ULP_ACT_HID_2700,
+ .act_pattern_id = 205,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [423] = {
- .act_hid = BNXT_ULP_ACT_HID_2c36,
- .act_pattern_id = 104,
+ [591] = {
+ .act_hid = BNXT_ULP_ACT_HID_6700,
+ .act_pattern_id = 206,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [424] = {
- .act_hid = BNXT_ULP_ACT_HID_1c46,
- .act_pattern_id = 105,
+ [592] = {
+ .act_hid = BNXT_ULP_ACT_HID_3e560,
+ .act_pattern_id = 207,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [425] = {
- .act_hid = BNXT_ULP_ACT_HID_2446,
- .act_pattern_id = 106,
+ [593] = {
+ .act_hid = BNXT_ULP_ACT_HID_2780,
+ .act_pattern_id = 208,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [426] = {
- .act_hid = BNXT_ULP_ACT_HID_2c46,
- .act_pattern_id = 107,
+ [594] = {
+ .act_hid = BNXT_ULP_ACT_HID_6780,
+ .act_pattern_id = 209,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [427] = {
- .act_hid = BNXT_ULP_ACT_HID_2546,
- .act_pattern_id = 108,
+ [595] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f80,
+ .act_pattern_id = 210,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [428] = {
- .act_hid = BNXT_ULP_ACT_HID_5856,
- .act_pattern_id = 109,
+ [596] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e800,
+ .act_pattern_id = 211,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [429] = {
- .act_hid = BNXT_ULP_ACT_HID_3656,
- .act_pattern_id = 110,
+ [597] = {
+ .act_hid = BNXT_ULP_ACT_HID_b800,
+ .act_pattern_id = 212,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [430] = {
- .act_hid = BNXT_ULP_ACT_HID_20ba,
- .act_pattern_id = 111,
+ [598] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b20,
+ .act_pattern_id = 213,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [431] = {
- .act_hid = BNXT_ULP_ACT_HID_53ca,
- .act_pattern_id = 112,
+ [599] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a3a0,
+ .act_pattern_id = 214,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [432] = {
- .act_hid = BNXT_ULP_ACT_HID_64da,
- .act_pattern_id = 113,
+ [600] = {
+ .act_hid = BNXT_ULP_ACT_HID_22c20,
+ .act_pattern_id = 215,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -5711,58 +7985,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [433] = {
- .act_hid = BNXT_ULP_ACT_HID_2d46,
- .act_pattern_id = 114,
+ [601] = {
+ .act_hid = BNXT_ULP_ACT_HID_6f80,
+ .act_pattern_id = 216,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [434] = {
- .act_hid = BNXT_ULP_ACT_HID_6056,
- .act_pattern_id = 115,
+ [602] = {
+ .act_hid = BNXT_ULP_ACT_HID_22800,
+ .act_pattern_id = 217,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [435] = {
- .act_hid = BNXT_ULP_ACT_HID_3e56,
- .act_pattern_id = 116,
+ [603] = {
+ .act_hid = BNXT_ULP_ACT_HID_f800,
+ .act_pattern_id = 218,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [436] = {
- .act_hid = BNXT_ULP_ACT_HID_28ba,
- .act_pattern_id = 117,
+ [604] = {
+ .act_hid = BNXT_ULP_ACT_HID_6b20,
+ .act_pattern_id = 219,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [437] = {
- .act_hid = BNXT_ULP_ACT_HID_5bca,
- .act_pattern_id = 118,
+ [605] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e3a0,
+ .act_pattern_id = 220,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -5770,12 +8044,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [438] = {
- .act_hid = BNXT_ULP_ACT_HID_6cda,
- .act_pattern_id = 119,
+ [606] = {
+ .act_hid = BNXT_ULP_ACT_HID_26c20,
+ .act_pattern_id = 221,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5784,58 +8058,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [439] = {
- .act_hid = BNXT_ULP_ACT_HID_3546,
- .act_pattern_id = 120,
+ [607] = {
+ .act_hid = BNXT_ULP_ACT_HID_af80,
+ .act_pattern_id = 222,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [440] = {
- .act_hid = BNXT_ULP_ACT_HID_6856,
- .act_pattern_id = 121,
+ [608] = {
+ .act_hid = BNXT_ULP_ACT_HID_26800,
+ .act_pattern_id = 223,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [441] = {
- .act_hid = BNXT_ULP_ACT_HID_4656,
- .act_pattern_id = 122,
+ [609] = {
+ .act_hid = BNXT_ULP_ACT_HID_13800,
+ .act_pattern_id = 224,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [442] = {
- .act_hid = BNXT_ULP_ACT_HID_30ba,
- .act_pattern_id = 123,
+ [610] = {
+ .act_hid = BNXT_ULP_ACT_HID_ab20,
+ .act_pattern_id = 225,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [443] = {
- .act_hid = BNXT_ULP_ACT_HID_63ca,
- .act_pattern_id = 124,
+ [611] = {
+ .act_hid = BNXT_ULP_ACT_HID_223a0,
+ .act_pattern_id = 226,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -5843,12 +8117,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [444] = {
- .act_hid = BNXT_ULP_ACT_HID_74da,
- .act_pattern_id = 125,
+ [612] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ac20,
+ .act_pattern_id = 227,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5857,24 +8131,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [445] = {
- .act_hid = BNXT_ULP_ACT_HID_3d46,
- .act_pattern_id = 126,
+ [613] = {
+ .act_hid = BNXT_ULP_ACT_HID_ef80,
+ .act_pattern_id = 228,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [446] = {
- .act_hid = BNXT_ULP_ACT_HID_7056,
- .act_pattern_id = 127,
+ [614] = {
+ .act_hid = BNXT_ULP_ACT_HID_2a800,
+ .act_pattern_id = 229,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5882,24 +8156,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [447] = {
- .act_hid = BNXT_ULP_ACT_HID_4e56,
- .act_pattern_id = 128,
+ [615] = {
+ .act_hid = BNXT_ULP_ACT_HID_17800,
+ .act_pattern_id = 230,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [448] = {
- .act_hid = BNXT_ULP_ACT_HID_38ba,
- .act_pattern_id = 129,
+ [616] = {
+ .act_hid = BNXT_ULP_ACT_HID_eb20,
+ .act_pattern_id = 231,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5907,12 +8181,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [449] = {
- .act_hid = BNXT_ULP_ACT_HID_6bca,
- .act_pattern_id = 130,
+ [617] = {
+ .act_hid = BNXT_ULP_ACT_HID_263a0,
+ .act_pattern_id = 232,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -5921,12 +8195,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [450] = {
- .act_hid = BNXT_ULP_ACT_HID_011e,
- .act_pattern_id = 131,
+ [618] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ec20,
+ .act_pattern_id = 233,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -5936,58 +8210,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [451] = {
- .act_hid = BNXT_ULP_ACT_HID_2556,
- .act_pattern_id = 132,
+ [619] = {
+ .act_hid = BNXT_ULP_ACT_HID_3000,
+ .act_pattern_id = 234,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [452] = {
- .act_hid = BNXT_ULP_ACT_HID_5866,
- .act_pattern_id = 133,
+ [620] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e880,
+ .act_pattern_id = 235,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [453] = {
- .act_hid = BNXT_ULP_ACT_HID_3666,
- .act_pattern_id = 134,
+ [621] = {
+ .act_hid = BNXT_ULP_ACT_HID_b880,
+ .act_pattern_id = 236,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [454] = {
- .act_hid = BNXT_ULP_ACT_HID_20ca,
- .act_pattern_id = 135,
+ [622] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ba0,
+ .act_pattern_id = 237,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [455] = {
- .act_hid = BNXT_ULP_ACT_HID_53da,
- .act_pattern_id = 136,
+ [623] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a420,
+ .act_pattern_id = 238,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -5995,12 +8269,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [456] = {
- .act_hid = BNXT_ULP_ACT_HID_64ea,
- .act_pattern_id = 137,
+ [624] = {
+ .act_hid = BNXT_ULP_ACT_HID_22ca0,
+ .act_pattern_id = 239,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6009,24 +8283,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [457] = {
- .act_hid = BNXT_ULP_ACT_HID_2d56,
- .act_pattern_id = 138,
+ [625] = {
+ .act_hid = BNXT_ULP_ACT_HID_7000,
+ .act_pattern_id = 240,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [458] = {
- .act_hid = BNXT_ULP_ACT_HID_6066,
- .act_pattern_id = 139,
+ [626] = {
+ .act_hid = BNXT_ULP_ACT_HID_22880,
+ .act_pattern_id = 241,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6034,24 +8308,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [459] = {
- .act_hid = BNXT_ULP_ACT_HID_3e66,
- .act_pattern_id = 140,
+ [627] = {
+ .act_hid = BNXT_ULP_ACT_HID_f880,
+ .act_pattern_id = 242,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [460] = {
- .act_hid = BNXT_ULP_ACT_HID_28ca,
- .act_pattern_id = 141,
+ [628] = {
+ .act_hid = BNXT_ULP_ACT_HID_6ba0,
+ .act_pattern_id = 243,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6059,12 +8333,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [461] = {
- .act_hid = BNXT_ULP_ACT_HID_5bda,
- .act_pattern_id = 142,
+ [629] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e420,
+ .act_pattern_id = 244,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6073,12 +8347,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [462] = {
- .act_hid = BNXT_ULP_ACT_HID_6cea,
- .act_pattern_id = 143,
+ [630] = {
+ .act_hid = BNXT_ULP_ACT_HID_26ca0,
+ .act_pattern_id = 245,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6088,24 +8362,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [463] = {
- .act_hid = BNXT_ULP_ACT_HID_3556,
- .act_pattern_id = 144,
+ [631] = {
+ .act_hid = BNXT_ULP_ACT_HID_b000,
+ .act_pattern_id = 246,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [464] = {
- .act_hid = BNXT_ULP_ACT_HID_6866,
- .act_pattern_id = 145,
+ [632] = {
+ .act_hid = BNXT_ULP_ACT_HID_26880,
+ .act_pattern_id = 247,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6113,24 +8387,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [465] = {
- .act_hid = BNXT_ULP_ACT_HID_4666,
- .act_pattern_id = 146,
+ [633] = {
+ .act_hid = BNXT_ULP_ACT_HID_13880,
+ .act_pattern_id = 248,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [466] = {
- .act_hid = BNXT_ULP_ACT_HID_30ca,
- .act_pattern_id = 147,
+ [634] = {
+ .act_hid = BNXT_ULP_ACT_HID_aba0,
+ .act_pattern_id = 249,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6138,12 +8412,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [467] = {
- .act_hid = BNXT_ULP_ACT_HID_63da,
- .act_pattern_id = 148,
+ [635] = {
+ .act_hid = BNXT_ULP_ACT_HID_22420,
+ .act_pattern_id = 250,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6152,12 +8426,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [468] = {
- .act_hid = BNXT_ULP_ACT_HID_74ea,
- .act_pattern_id = 149,
+ [636] = {
+ .act_hid = BNXT_ULP_ACT_HID_2aca0,
+ .act_pattern_id = 251,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6167,12 +8441,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [469] = {
- .act_hid = BNXT_ULP_ACT_HID_3d56,
- .act_pattern_id = 150,
+ [637] = {
+ .act_hid = BNXT_ULP_ACT_HID_f000,
+ .act_pattern_id = 252,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6180,12 +8454,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [470] = {
- .act_hid = BNXT_ULP_ACT_HID_7066,
- .act_pattern_id = 151,
+ [638] = {
+ .act_hid = BNXT_ULP_ACT_HID_2a880,
+ .act_pattern_id = 253,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6194,12 +8468,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [471] = {
- .act_hid = BNXT_ULP_ACT_HID_4e66,
- .act_pattern_id = 152,
+ [639] = {
+ .act_hid = BNXT_ULP_ACT_HID_17880,
+ .act_pattern_id = 254,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6207,12 +8481,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [472] = {
- .act_hid = BNXT_ULP_ACT_HID_38ca,
- .act_pattern_id = 153,
+ [640] = {
+ .act_hid = BNXT_ULP_ACT_HID_eba0,
+ .act_pattern_id = 255,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6221,12 +8495,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [473] = {
- .act_hid = BNXT_ULP_ACT_HID_6bda,
- .act_pattern_id = 154,
+ [641] = {
+ .act_hid = BNXT_ULP_ACT_HID_26420,
+ .act_pattern_id = 256,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6236,12 +8510,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [474] = {
- .act_hid = BNXT_ULP_ACT_HID_012e,
- .act_pattern_id = 155,
+ [642] = {
+ .act_hid = BNXT_ULP_ACT_HID_2eca0,
+ .act_pattern_id = 257,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6252,58 +8526,58 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [475] = {
- .act_hid = BNXT_ULP_ACT_HID_3ece,
- .act_pattern_id = 156,
+ [643] = {
+ .act_hid = BNXT_ULP_ACT_HID_fbc0,
+ .act_pattern_id = 258,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [476] = {
- .act_hid = BNXT_ULP_ACT_HID_71de,
- .act_pattern_id = 157,
+ [644] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b440,
+ .act_pattern_id = 259,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [477] = {
- .act_hid = BNXT_ULP_ACT_HID_4fde,
- .act_pattern_id = 158,
+ [645] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a440,
+ .act_pattern_id = 260,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [478] = {
- .act_hid = BNXT_ULP_ACT_HID_3a42,
- .act_pattern_id = 159,
+ [646] = {
+ .act_hid = BNXT_ULP_ACT_HID_f760,
+ .act_pattern_id = 261,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [479] = {
- .act_hid = BNXT_ULP_ACT_HID_6d52,
- .act_pattern_id = 160,
+ [647] = {
+ .act_hid = BNXT_ULP_ACT_HID_26fe0,
+ .act_pattern_id = 262,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_ACT_BIT_SET_TP_SRC |
@@ -6311,12 +8585,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [480] = {
- .act_hid = BNXT_ULP_ACT_HID_02a6,
- .act_pattern_id = 161,
+ [648] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f860,
+ .act_pattern_id = 263,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6325,24 +8599,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [481] = {
- .act_hid = BNXT_ULP_ACT_HID_3ede,
- .act_pattern_id = 162,
+ [649] = {
+ .act_hid = BNXT_ULP_ACT_HID_fc40,
+ .act_pattern_id = 264,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [482] = {
- .act_hid = BNXT_ULP_ACT_HID_71ee,
- .act_pattern_id = 163,
+ [650] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b4c0,
+ .act_pattern_id = 265,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6350,24 +8624,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [483] = {
- .act_hid = BNXT_ULP_ACT_HID_4fee,
- .act_pattern_id = 164,
+ [651] = {
+ .act_hid = BNXT_ULP_ACT_HID_1a4c0,
+ .act_pattern_id = 266,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [484] = {
- .act_hid = BNXT_ULP_ACT_HID_3a52,
- .act_pattern_id = 165,
+ [652] = {
+ .act_hid = BNXT_ULP_ACT_HID_f7e0,
+ .act_pattern_id = 267,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6375,12 +8649,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [485] = {
- .act_hid = BNXT_ULP_ACT_HID_6d62,
- .act_pattern_id = 166,
+ [653] = {
+ .act_hid = BNXT_ULP_ACT_HID_27060,
+ .act_pattern_id = 268,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6389,12 +8663,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [486] = {
- .act_hid = BNXT_ULP_ACT_HID_02b6,
- .act_pattern_id = 167,
+ [654] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f8e0,
+ .act_pattern_id = 269,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6404,12 +8678,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [487] = {
- .act_hid = BNXT_ULP_ACT_HID_79de,
- .act_pattern_id = 168,
+ [655] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f440,
+ .act_pattern_id = 270,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6417,24 +8691,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [488] = {
- .act_hid = BNXT_ULP_ACT_HID_57de,
- .act_pattern_id = 169,
+ [656] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e440,
+ .act_pattern_id = 271,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [489] = {
- .act_hid = BNXT_ULP_ACT_HID_4242,
- .act_pattern_id = 170,
+ [657] = {
+ .act_hid = BNXT_ULP_ACT_HID_13760,
+ .act_pattern_id = 272,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6442,24 +8716,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [490] = {
- .act_hid = BNXT_ULP_ACT_HID_46ce,
- .act_pattern_id = 171,
+ [658] = {
+ .act_hid = BNXT_ULP_ACT_HID_13bc0,
+ .act_pattern_id = 273,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [491] = {
- .act_hid = BNXT_ULP_ACT_HID_7552,
- .act_pattern_id = 172,
+ [659] = {
+ .act_hid = BNXT_ULP_ACT_HID_2afe0,
+ .act_pattern_id = 274,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6468,12 +8742,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [492] = {
- .act_hid = BNXT_ULP_ACT_HID_0aa6,
- .act_pattern_id = 173,
+ [660] = {
+ .act_hid = BNXT_ULP_ACT_HID_33860,
+ .act_pattern_id = 275,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6483,12 +8757,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [493] = {
- .act_hid = BNXT_ULP_ACT_HID_46de,
- .act_pattern_id = 174,
+ [661] = {
+ .act_hid = BNXT_ULP_ACT_HID_13c40,
+ .act_pattern_id = 276,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6496,12 +8770,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [494] = {
- .act_hid = BNXT_ULP_ACT_HID_79ee,
- .act_pattern_id = 175,
+ [662] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f4c0,
+ .act_pattern_id = 277,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6510,12 +8784,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [495] = {
- .act_hid = BNXT_ULP_ACT_HID_57ee,
- .act_pattern_id = 176,
+ [663] = {
+ .act_hid = BNXT_ULP_ACT_HID_1e4c0,
+ .act_pattern_id = 278,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6523,12 +8797,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [496] = {
- .act_hid = BNXT_ULP_ACT_HID_4252,
- .act_pattern_id = 177,
+ [664] = {
+ .act_hid = BNXT_ULP_ACT_HID_137e0,
+ .act_pattern_id = 279,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6537,12 +8811,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [497] = {
- .act_hid = BNXT_ULP_ACT_HID_7562,
- .act_pattern_id = 178,
+ [665] = {
+ .act_hid = BNXT_ULP_ACT_HID_2b060,
+ .act_pattern_id = 280,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6552,12 +8826,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [498] = {
- .act_hid = BNXT_ULP_ACT_HID_0ab6,
- .act_pattern_id = 179,
+ [666] = {
+ .act_hid = BNXT_ULP_ACT_HID_338e0,
+ .act_pattern_id = 281,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6568,24 +8842,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [499] = {
- .act_hid = BNXT_ULP_ACT_HID_4ece,
- .act_pattern_id = 180,
+ [667] = {
+ .act_hid = BNXT_ULP_ACT_HID_17bc0,
+ .act_pattern_id = 282,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [500] = {
- .act_hid = BNXT_ULP_ACT_HID_0622,
- .act_pattern_id = 181,
+ [668] = {
+ .act_hid = BNXT_ULP_ACT_HID_33440,
+ .act_pattern_id = 283,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6593,24 +8867,24 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [501] = {
- .act_hid = BNXT_ULP_ACT_HID_5fde,
- .act_pattern_id = 182,
+ [669] = {
+ .act_hid = BNXT_ULP_ACT_HID_22440,
+ .act_pattern_id = 284,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [502] = {
- .act_hid = BNXT_ULP_ACT_HID_4a42,
- .act_pattern_id = 183,
+ [670] = {
+ .act_hid = BNXT_ULP_ACT_HID_17760,
+ .act_pattern_id = 285,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6618,12 +8892,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [503] = {
- .act_hid = BNXT_ULP_ACT_HID_0196,
- .act_pattern_id = 184,
+ [671] = {
+ .act_hid = BNXT_ULP_ACT_HID_2efe0,
+ .act_pattern_id = 286,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_DST |
@@ -6632,12 +8906,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [504] = {
- .act_hid = BNXT_ULP_ACT_HID_12a6,
- .act_pattern_id = 185,
+ [672] = {
+ .act_hid = BNXT_ULP_ACT_HID_37860,
+ .act_pattern_id = 287,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_SET_IPV4_SRC |
@@ -6647,12 +8921,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [505] = {
- .act_hid = BNXT_ULP_ACT_HID_4ede,
- .act_pattern_id = 186,
+ [673] = {
+ .act_hid = BNXT_ULP_ACT_HID_17c40,
+ .act_pattern_id = 288,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6660,12 +8934,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [506] = {
- .act_hid = BNXT_ULP_ACT_HID_0632,
- .act_pattern_id = 187,
+ [674] = {
+ .act_hid = BNXT_ULP_ACT_HID_334c0,
+ .act_pattern_id = 289,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6674,12 +8948,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [507] = {
- .act_hid = BNXT_ULP_ACT_HID_5fee,
- .act_pattern_id = 188,
+ [675] = {
+ .act_hid = BNXT_ULP_ACT_HID_224c0,
+ .act_pattern_id = 290,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6687,12 +8961,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [508] = {
- .act_hid = BNXT_ULP_ACT_HID_4a52,
- .act_pattern_id = 189,
+ [676] = {
+ .act_hid = BNXT_ULP_ACT_HID_177e0,
+ .act_pattern_id = 291,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6701,12 +8975,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [509] = {
- .act_hid = BNXT_ULP_ACT_HID_01a6,
- .act_pattern_id = 190,
+ [677] = {
+ .act_hid = BNXT_ULP_ACT_HID_2f060,
+ .act_pattern_id = 292,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6716,12 +8990,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [510] = {
- .act_hid = BNXT_ULP_ACT_HID_12b6,
- .act_pattern_id = 191,
+ [678] = {
+ .act_hid = BNXT_ULP_ACT_HID_378e0,
+ .act_pattern_id = 293,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
BNXT_ULP_ACT_BIT_COUNT |
@@ -6732,12 +9006,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [511] = {
- .act_hid = BNXT_ULP_ACT_HID_56ce,
- .act_pattern_id = 192,
+ [679] = {
+ .act_hid = BNXT_ULP_ACT_HID_1bbc0,
+ .act_pattern_id = 294,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6745,12 +9019,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [512] = {
- .act_hid = BNXT_ULP_ACT_HID_0e22,
- .act_pattern_id = 193,
+ [680] = {
+ .act_hid = BNXT_ULP_ACT_HID_37440,
+ .act_pattern_id = 295,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6759,12 +9033,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [513] = {
- .act_hid = BNXT_ULP_ACT_HID_67de,
- .act_pattern_id = 194,
+ [681] = {
+ .act_hid = BNXT_ULP_ACT_HID_26440,
+ .act_pattern_id = 296,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6772,12 +9046,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [514] = {
- .act_hid = BNXT_ULP_ACT_HID_5242,
- .act_pattern_id = 195,
+ [682] = {
+ .act_hid = BNXT_ULP_ACT_HID_1b760,
+ .act_pattern_id = 297,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6786,12 +9060,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [515] = {
- .act_hid = BNXT_ULP_ACT_HID_0996,
- .act_pattern_id = 196,
+ [683] = {
+ .act_hid = BNXT_ULP_ACT_HID_32fe0,
+ .act_pattern_id = 298,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6801,12 +9075,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [516] = {
- .act_hid = BNXT_ULP_ACT_HID_1aa6,
- .act_pattern_id = 197,
+ [684] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b860,
+ .act_pattern_id = 299,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6817,12 +9091,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [517] = {
- .act_hid = BNXT_ULP_ACT_HID_56de,
- .act_pattern_id = 198,
+ [685] = {
+ .act_hid = BNXT_ULP_ACT_HID_1bc40,
+ .act_pattern_id = 300,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6831,12 +9105,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [518] = {
- .act_hid = BNXT_ULP_ACT_HID_0e32,
- .act_pattern_id = 199,
+ [686] = {
+ .act_hid = BNXT_ULP_ACT_HID_374c0,
+ .act_pattern_id = 301,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6846,12 +9120,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [519] = {
- .act_hid = BNXT_ULP_ACT_HID_67ee,
- .act_pattern_id = 200,
+ [687] = {
+ .act_hid = BNXT_ULP_ACT_HID_264c0,
+ .act_pattern_id = 302,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6860,12 +9134,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [520] = {
- .act_hid = BNXT_ULP_ACT_HID_5252,
- .act_pattern_id = 201,
+ [688] = {
+ .act_hid = BNXT_ULP_ACT_HID_1b7e0,
+ .act_pattern_id = 303,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6875,12 +9149,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [521] = {
- .act_hid = BNXT_ULP_ACT_HID_09a6,
- .act_pattern_id = 202,
+ [689] = {
+ .act_hid = BNXT_ULP_ACT_HID_33060,
+ .act_pattern_id = 304,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6891,12 +9165,12 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [522] = {
- .act_hid = BNXT_ULP_ACT_HID_1ab6,
- .act_pattern_id = 203,
+ [690] = {
+ .act_hid = BNXT_ULP_ACT_HID_3b8e0,
+ .act_pattern_id = 305,
.app_sig = 0,
.act_sig = { .bits =
- BNXT_ULP_ACT_BIT_SHARED_SAMPLE |
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
BNXT_ULP_ACT_BIT_SET_MAC_SRC |
BNXT_ULP_ACT_BIT_SET_MAC_DST |
BNXT_ULP_ACT_BIT_DEC_TTL |
@@ -6908,8 +9182,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 7
},
- [523] = {
- .act_hid = BNXT_ULP_ACT_HID_31d0,
+ [691] = {
+ .act_hid = BNXT_ULP_ACT_HID_18e80,
.act_pattern_id = 0,
.app_sig = 0,
.act_sig = { .bits =
@@ -6917,8 +9191,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [524] = {
- .act_hid = BNXT_ULP_ACT_HID_31e0,
+ [692] = {
+ .act_hid = BNXT_ULP_ACT_HID_18f00,
.act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
@@ -6927,8 +9201,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [525] = {
- .act_hid = BNXT_ULP_ACT_HID_39d0,
+ [693] = {
+ .act_hid = BNXT_ULP_ACT_HID_1ce80,
.act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
@@ -6937,8 +9211,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [526] = {
- .act_hid = BNXT_ULP_ACT_HID_39e0,
+ [694] = {
+ .act_hid = BNXT_ULP_ACT_HID_1cf00,
.act_pattern_id = 3,
.app_sig = 0,
.act_sig = { .bits =
@@ -6948,8 +9222,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [527] = {
- .act_hid = BNXT_ULP_ACT_HID_41d0,
+ [695] = {
+ .act_hid = BNXT_ULP_ACT_HID_20e80,
.act_pattern_id = 4,
.app_sig = 0,
.act_sig = { .bits =
@@ -6958,8 +9232,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [528] = {
- .act_hid = BNXT_ULP_ACT_HID_41e0,
+ [696] = {
+ .act_hid = BNXT_ULP_ACT_HID_20f00,
.act_pattern_id = 5,
.app_sig = 0,
.act_sig = { .bits =
@@ -6969,8 +9243,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [529] = {
- .act_hid = BNXT_ULP_ACT_HID_49d0,
+ [697] = {
+ .act_hid = BNXT_ULP_ACT_HID_24e80,
.act_pattern_id = 6,
.app_sig = 0,
.act_sig = { .bits =
@@ -6980,8 +9254,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [530] = {
- .act_hid = BNXT_ULP_ACT_HID_49e0,
+ [698] = {
+ .act_hid = BNXT_ULP_ACT_HID_24f00,
.act_pattern_id = 7,
.app_sig = 0,
.act_sig = { .bits =
@@ -6992,8 +9266,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [531] = {
- .act_hid = BNXT_ULP_ACT_HID_64ba,
+ [699] = {
+ .act_hid = BNXT_ULP_ACT_HID_325c2,
.act_pattern_id = 8,
.app_sig = 0,
.act_sig = { .bits =
@@ -7002,8 +9276,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [532] = {
- .act_hid = BNXT_ULP_ACT_HID_64ca,
+ [700] = {
+ .act_hid = BNXT_ULP_ACT_HID_32642,
.act_pattern_id = 9,
.app_sig = 0,
.act_sig = { .bits =
@@ -7013,8 +9287,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [533] = {
- .act_hid = BNXT_ULP_ACT_HID_6cba,
+ [701] = {
+ .act_hid = BNXT_ULP_ACT_HID_365c2,
.act_pattern_id = 10,
.app_sig = 0,
.act_sig = { .bits =
@@ -7024,8 +9298,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [534] = {
- .act_hid = BNXT_ULP_ACT_HID_6cca,
+ [702] = {
+ .act_hid = BNXT_ULP_ACT_HID_36642,
.act_pattern_id = 11,
.app_sig = 0,
.act_sig = { .bits =
@@ -7036,8 +9310,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [535] = {
- .act_hid = BNXT_ULP_ACT_HID_74ba,
+ [703] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a5c2,
.act_pattern_id = 12,
.app_sig = 0,
.act_sig = { .bits =
@@ -7047,8 +9321,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [536] = {
- .act_hid = BNXT_ULP_ACT_HID_74ca,
+ [704] = {
+ .act_hid = BNXT_ULP_ACT_HID_3a642,
.act_pattern_id = 13,
.app_sig = 0,
.act_sig = { .bits =
@@ -7059,8 +9333,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [537] = {
- .act_hid = BNXT_ULP_ACT_HID_00fe,
+ [705] = {
+ .act_hid = BNXT_ULP_ACT_HID_07e2,
.act_pattern_id = 14,
.app_sig = 0,
.act_sig = { .bits =
@@ -7071,8 +9345,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [538] = {
- .act_hid = BNXT_ULP_ACT_HID_010e,
+ [706] = {
+ .act_hid = BNXT_ULP_ACT_HID_0862,
.act_pattern_id = 15,
.app_sig = 0,
.act_sig = { .bits =
@@ -7084,8 +9358,100 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 8
},
- [539] = {
- .act_hid = BNXT_ULP_ACT_HID_331c,
+ [707] = {
+ .act_hid = BNXT_ULP_ACT_HID_22b20,
+ .act_pattern_id = 16,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [708] = {
+ .act_hid = BNXT_ULP_ACT_HID_22ba0,
+ .act_pattern_id = 17,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [709] = {
+ .act_hid = BNXT_ULP_ACT_HID_26b20,
+ .act_pattern_id = 18,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [710] = {
+ .act_hid = BNXT_ULP_ACT_HID_26ba0,
+ .act_pattern_id = 19,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [711] = {
+ .act_hid = BNXT_ULP_ACT_HID_2ab20,
+ .act_pattern_id = 20,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [712] = {
+ .act_hid = BNXT_ULP_ACT_HID_2aba0,
+ .act_pattern_id = 21,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [713] = {
+ .act_hid = BNXT_ULP_ACT_HID_2eb20,
+ .act_pattern_id = 22,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [714] = {
+ .act_hid = BNXT_ULP_ACT_HID_2eba0,
+ .act_pattern_id = 23,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_SET_MAC_SRC |
+ BNXT_ULP_ACT_BIT_SET_MAC_DST |
+ BNXT_ULP_ACT_BIT_VXLAN_ENCAP |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 8
+ },
+ [715] = {
+ .act_hid = BNXT_ULP_ACT_HID_199e0,
.act_pattern_id = 0,
.app_sig = 0,
.act_sig = { .bits =
@@ -7093,8 +9459,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 9
},
- [540] = {
- .act_hid = BNXT_ULP_ACT_HID_332c,
+ [716] = {
+ .act_hid = BNXT_ULP_ACT_HID_19960,
.act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
@@ -7103,8 +9469,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 9
},
- [541] = {
- .act_hid = BNXT_ULP_ACT_HID_6706,
+ [717] = {
+ .act_hid = BNXT_ULP_ACT_HID_33122,
.act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
@@ -7113,8 +9479,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 9
},
- [542] = {
- .act_hid = BNXT_ULP_ACT_HID_6716,
+ [718] = {
+ .act_hid = BNXT_ULP_ACT_HID_331a2,
.act_pattern_id = 3,
.app_sig = 0,
.act_sig = { .bits =
@@ -7124,8 +9490,29 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 9
},
- [543] = {
- .act_hid = BNXT_ULP_ACT_HID_1b6d,
+ [719] = {
+ .act_hid = BNXT_ULP_ACT_HID_23580,
+ .act_pattern_id = 4,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_VF_TO_VF |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 9
+ },
+ [720] = {
+ .act_hid = BNXT_ULP_ACT_HID_23700,
+ .act_pattern_id = 5,
+ .app_sig = 0,
+ .act_sig = { .bits =
+ BNXT_ULP_ACT_BIT_MULTIPLE_PORT |
+ BNXT_ULP_ACT_BIT_VF_TO_VF |
+ BNXT_ULP_ACT_BIT_COUNT |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .act_tid = 9
+ },
+ [721] = {
+ .act_hid = BNXT_ULP_ACT_HID_db61,
.act_pattern_id = 0,
.app_sig = 0,
.act_sig = { .bits =
@@ -7135,8 +9522,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 10
},
- [544] = {
- .act_hid = BNXT_ULP_ACT_HID_1b7d,
+ [722] = {
+ .act_hid = BNXT_ULP_ACT_HID_dbe1,
.act_pattern_id = 1,
.app_sig = 0,
.act_sig = { .bits =
@@ -7147,8 +9534,8 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.act_tid = 10
},
- [545] = {
- .act_hid = BNXT_ULP_ACT_HID_641a,
+ [723] = {
+ .act_hid = BNXT_ULP_ACT_HID_320ca,
.act_pattern_id = 2,
.app_sig = 0,
.act_sig = { .bits =
@@ -7158,3 +9545,4 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = {
.act_tid = 10
}
};
+
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2023 Broadcom
+ * Copyright(c) 2014-2024 Broadcom
* All rights reserved.
*/
@@ -8184,7 +8184,7 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
[345] = {
.class_hid = BNXT_ULP_CLASS_HID_0daa,
.class_tid = 2,
- .hdr_sig_id = 0,
+ .hdr_sig_id = 13,
.flow_sig_id = 20480UL,
.flow_pattern_id = 0,
.app_sig = 0,
@@ -8196,14 +8196,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_T_VXLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT }
+ BNXT_ULP_HF_0_2_13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF_0_2_13_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT }
},
[346] = {
.class_hid = BNXT_ULP_CLASS_HID_11b0,
.class_tid = 2,
- .hdr_sig_id = 0,
+ .hdr_sig_id = 13,
.flow_sig_id = 20488UL,
.flow_pattern_id = 0,
.app_sig = 0,
@@ -8215,15 +8215,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_T_VXLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF_0_2_0_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF_0_2_0_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_0_BITMASK_O_UDP_DST_PORT }
+ BNXT_ULP_HF_0_2_13_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF_0_2_13_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF_0_2_13_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_13_BITMASK_O_UDP_DST_PORT }
},
[347] = {
.class_hid = BNXT_ULP_CLASS_HID_403f8,
.class_tid = 2,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 14,
.flow_sig_id = 81920UL,
.flow_pattern_id = 0,
.app_sig = 0,
@@ -8235,14 +8235,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_T_VXLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT }
+ BNXT_ULP_HF_0_2_14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF_0_2_14_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT }
},
[348] = {
.class_hid = BNXT_ULP_CLASS_HID_4161e,
.class_tid = 2,
- .hdr_sig_id = 1,
+ .hdr_sig_id = 14,
.flow_sig_id = 81928UL,
.flow_pattern_id = 0,
.app_sig = 0,
@@ -8254,15 +8254,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_T_VXLAN |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF_0_2_1_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF_0_2_1_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_1_BITMASK_O_UDP_DST_PORT }
+ BNXT_ULP_HF_0_2_14_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF_0_2_14_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF_0_2_14_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_14_BITMASK_O_UDP_DST_PORT }
},
[349] = {
.class_hid = BNXT_ULP_CLASS_HID_40439,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 66304UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8274,14 +8274,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI }
},
[350] = {
.class_hid = BNXT_ULP_CLASS_HID_41405,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 68352UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8293,15 +8293,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI }
},
[351] = {
.class_hid = BNXT_ULP_CLASS_HID_51449,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 328448UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8313,15 +8313,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC }
},
[352] = {
.class_hid = BNXT_ULP_CLASS_HID_50b33,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 330496UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8333,16 +8333,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC }
},
[353] = {
.class_hid = BNXT_ULP_CLASS_HID_48c01,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 590592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8354,15 +8354,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC }
},
[354] = {
.class_hid = BNXT_ULP_CLASS_HID_483eb,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 592640UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8374,16 +8374,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC }
},
[355] = {
.class_hid = BNXT_ULP_CLASS_HID_5833f,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 852736UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8395,16 +8395,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC }
},
[356] = {
.class_hid = BNXT_ULP_CLASS_HID_5937b,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 854784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8416,17 +8416,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC }
},
[357] = {
.class_hid = BNXT_ULP_CLASS_HID_41875,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134284032UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8438,15 +8438,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[358] = {
.class_hid = BNXT_ULP_CLASS_HID_40f5f,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134286080UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8458,16 +8458,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[359] = {
.class_hid = BNXT_ULP_CLASS_HID_50f23,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134546176UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8479,16 +8479,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[360] = {
.class_hid = BNXT_ULP_CLASS_HID_51f6f,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134548224UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8500,17 +8500,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[361] = {
.class_hid = BNXT_ULP_CLASS_HID_4875b,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134808320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8522,16 +8522,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[362] = {
.class_hid = BNXT_ULP_CLASS_HID_49727,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 134810368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8543,17 +8543,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[363] = {
.class_hid = BNXT_ULP_CLASS_HID_5976b,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 135070464UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8565,17 +8565,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[364] = {
.class_hid = BNXT_ULP_CLASS_HID_58655,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 135072512UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8587,18 +8587,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR }
},
[365] = {
.class_hid = BNXT_ULP_CLASS_HID_4125f,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 268501760UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8610,15 +8610,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[366] = {
.class_hid = BNXT_ULP_CLASS_HID_401f9,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 268503808UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8630,16 +8630,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[367] = {
.class_hid = BNXT_ULP_CLASS_HID_501cd,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 268763904UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8651,16 +8651,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[368] = {
.class_hid = BNXT_ULP_CLASS_HID_51149,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 268765952UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8672,17 +8672,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[369] = {
.class_hid = BNXT_ULP_CLASS_HID_49a67,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 269026048UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8694,16 +8694,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[370] = {
.class_hid = BNXT_ULP_CLASS_HID_489c1,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 269028096UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8715,17 +8715,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[371] = {
.class_hid = BNXT_ULP_CLASS_HID_58955,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 269288192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8737,17 +8737,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[372] = {
.class_hid = BNXT_ULP_CLASS_HID_59951,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 269290240UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8759,18 +8759,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[373] = {
.class_hid = BNXT_ULP_CLASS_HID_40569,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 402719488UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8782,16 +8782,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[374] = {
.class_hid = BNXT_ULP_CLASS_HID_41575,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 402721536UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8803,17 +8803,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[375] = {
.class_hid = BNXT_ULP_CLASS_HID_51579,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 402981632UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8825,17 +8825,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[376] = {
.class_hid = BNXT_ULP_CLASS_HID_50463,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 402983680UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8847,18 +8847,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[377] = {
.class_hid = BNXT_ULP_CLASS_HID_48d71,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 403243776UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8870,17 +8870,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[378] = {
.class_hid = BNXT_ULP_CLASS_HID_49d7d,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 403245824UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8892,18 +8892,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[379] = {
.class_hid = BNXT_ULP_CLASS_HID_59d41,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 403505920UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8915,18 +8915,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[380] = {
.class_hid = BNXT_ULP_CLASS_HID_58c6b,
.class_tid = 2,
- .hdr_sig_id = 2,
+ .hdr_sig_id = 15,
.flow_sig_id = 403507968UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8938,19 +8938,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_2_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_2_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_15_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_15_BITMASK_I_IPV6_DST_ADDR }
},
[381] = {
.class_hid = BNXT_ULP_CLASS_HID_10255,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 265216UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8962,14 +8962,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI }
},
[382] = {
.class_hid = BNXT_ULP_CLASS_HID_11675,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 273408UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -8981,15 +8981,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI }
},
[383] = {
.class_hid = BNXT_ULP_CLASS_HID_14649,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1313792UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9001,15 +9001,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC }
},
[384] = {
.class_hid = BNXT_ULP_CLASS_HID_15a69,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1321984UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9021,16 +9021,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC }
},
[385] = {
.class_hid = BNXT_ULP_CLASS_HID_1205b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 2362368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9042,15 +9042,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC }
},
[386] = {
.class_hid = BNXT_ULP_CLASS_HID_1347b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 2370560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9062,16 +9062,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC }
},
[387] = {
.class_hid = BNXT_ULP_CLASS_HID_16bbf,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 3410944UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9083,16 +9083,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC }
},
[388] = {
.class_hid = BNXT_ULP_CLASS_HID_1785f,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 3419136UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9104,17 +9104,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC }
},
[389] = {
.class_hid = BNXT_ULP_CLASS_HID_11551,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 537136128UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9126,15 +9126,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[390] = {
.class_hid = BNXT_ULP_CLASS_HID_10897,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 537144320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9146,16 +9146,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[391] = {
.class_hid = BNXT_ULP_CLASS_HID_15955,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 538184704UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9167,16 +9167,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[392] = {
.class_hid = BNXT_ULP_CLASS_HID_14c8b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 538192896UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9188,17 +9188,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[393] = {
.class_hid = BNXT_ULP_CLASS_HID_13b47,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 539233280UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9210,16 +9210,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[394] = {
.class_hid = BNXT_ULP_CLASS_HID_12e85,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 539241472UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9231,17 +9231,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[395] = {
.class_hid = BNXT_ULP_CLASS_HID_17f5b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 540281856UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9253,17 +9253,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[396] = {
.class_hid = BNXT_ULP_CLASS_HID_17299,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 540290048UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9275,18 +9275,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR }
},
[397] = {
.class_hid = BNXT_ULP_CLASS_HID_10fe7,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1074007040UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9298,15 +9298,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[398] = {
.class_hid = BNXT_ULP_CLASS_HID_10325,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1074015232UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9318,16 +9318,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[399] = {
.class_hid = BNXT_ULP_CLASS_HID_153cb,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1075055616UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9339,16 +9339,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[400] = {
.class_hid = BNXT_ULP_CLASS_HID_14709,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1075063808UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9360,17 +9360,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[401] = {
.class_hid = BNXT_ULP_CLASS_HID_12dc5,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1076104192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9382,16 +9382,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[402] = {
.class_hid = BNXT_ULP_CLASS_HID_1212b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1076112384UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9403,17 +9403,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[403] = {
.class_hid = BNXT_ULP_CLASS_HID_171c9,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1077152768UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9425,17 +9425,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[404] = {
.class_hid = BNXT_ULP_CLASS_HID_1650f,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1077160960UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9447,18 +9447,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[405] = {
.class_hid = BNXT_ULP_CLASS_HID_10201,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1610877952UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9470,16 +9470,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[406] = {
.class_hid = BNXT_ULP_CLASS_HID_116c1,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1610886144UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9491,17 +9491,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[407] = {
.class_hid = BNXT_ULP_CLASS_HID_14605,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1611926528UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9513,17 +9513,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[408] = {
.class_hid = BNXT_ULP_CLASS_HID_15a05,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1611934720UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9535,18 +9535,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[409] = {
.class_hid = BNXT_ULP_CLASS_HID_12007,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1612975104UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9558,17 +9558,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[410] = {
.class_hid = BNXT_ULP_CLASS_HID_13407,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1612983296UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9580,18 +9580,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[411] = {
.class_hid = BNXT_ULP_CLASS_HID_1640b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1614023680UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9603,18 +9603,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[412] = {
.class_hid = BNXT_ULP_CLASS_HID_1780b,
.class_tid = 2,
- .hdr_sig_id = 3,
+ .hdr_sig_id = 16,
.flow_sig_id = 1614031872UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9626,19 +9626,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_3_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_3_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_16_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_16_BITMASK_I_IPV6_DST_ADDR }
},
[413] = {
.class_hid = BNXT_ULP_CLASS_HID_404b0,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 66304UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9650,14 +9650,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI }
},
[414] = {
.class_hid = BNXT_ULP_CLASS_HID_4148c,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 68352UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9669,15 +9669,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI }
},
[415] = {
.class_hid = BNXT_ULP_CLASS_HID_514c0,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 328448UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9689,15 +9689,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC }
},
[416] = {
.class_hid = BNXT_ULP_CLASS_HID_50bba,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 330496UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9709,16 +9709,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC }
},
[417] = {
.class_hid = BNXT_ULP_CLASS_HID_48c88,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 590592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9730,15 +9730,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC }
},
[418] = {
.class_hid = BNXT_ULP_CLASS_HID_48362,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 592640UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9750,16 +9750,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC }
},
[419] = {
.class_hid = BNXT_ULP_CLASS_HID_583b6,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 852736UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9771,16 +9771,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC }
},
[420] = {
.class_hid = BNXT_ULP_CLASS_HID_593f2,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 854784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9792,17 +9792,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC }
},
[421] = {
.class_hid = BNXT_ULP_CLASS_HID_41f54,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 536937216UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9814,15 +9814,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[422] = {
.class_hid = BNXT_ULP_CLASS_HID_40fce,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 536939264UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9834,16 +9834,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[423] = {
.class_hid = BNXT_ULP_CLASS_HID_50e02,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537199360UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9855,16 +9855,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[424] = {
.class_hid = BNXT_ULP_CLASS_HID_51e5e,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537201408UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9876,17 +9876,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[425] = {
.class_hid = BNXT_ULP_CLASS_HID_487ca,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537461504UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9898,16 +9898,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[426] = {
.class_hid = BNXT_ULP_CLASS_HID_49606,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537463552UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9919,17 +9919,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[427] = {
.class_hid = BNXT_ULP_CLASS_HID_5965a,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537723648UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9941,17 +9941,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[428] = {
.class_hid = BNXT_ULP_CLASS_HID_58514,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 537725696UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9963,18 +9963,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR }
},
[429] = {
.class_hid = BNXT_ULP_CLASS_HID_412c2,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1073808128UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -9986,15 +9986,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[430] = {
.class_hid = BNXT_ULP_CLASS_HID_401ac,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1073810176UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10006,16 +10006,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[431] = {
.class_hid = BNXT_ULP_CLASS_HID_501e0,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074070272UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10027,16 +10027,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[432] = {
.class_hid = BNXT_ULP_CLASS_HID_511cc,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074072320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10048,17 +10048,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[433] = {
.class_hid = BNXT_ULP_CLASS_HID_4990a,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074332416UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10070,16 +10070,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[434] = {
.class_hid = BNXT_ULP_CLASS_HID_489e4,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074334464UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10091,17 +10091,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[435] = {
.class_hid = BNXT_ULP_CLASS_HID_589c8,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074594560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10113,17 +10113,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[436] = {
.class_hid = BNXT_ULP_CLASS_HID_59804,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1074596608UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10135,18 +10135,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[437] = {
.class_hid = BNXT_ULP_CLASS_HID_40404,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1610679040UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10158,16 +10158,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[438] = {
.class_hid = BNXT_ULP_CLASS_HID_41440,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1610681088UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10179,17 +10179,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[439] = {
.class_hid = BNXT_ULP_CLASS_HID_51484,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1610941184UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10201,17 +10201,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[440] = {
.class_hid = BNXT_ULP_CLASS_HID_50b0e,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1610943232UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10223,18 +10223,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[441] = {
.class_hid = BNXT_ULP_CLASS_HID_48c4c,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1611203328UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10246,17 +10246,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[442] = {
.class_hid = BNXT_ULP_CLASS_HID_48306,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1611205376UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10268,18 +10268,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[443] = {
.class_hid = BNXT_ULP_CLASS_HID_5830a,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1611465472UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10291,18 +10291,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[444] = {
.class_hid = BNXT_ULP_CLASS_HID_59346,
.class_tid = 2,
- .hdr_sig_id = 4,
+ .hdr_sig_id = 17,
.flow_sig_id = 1611467520UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10314,19 +10314,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_4_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_4_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_17_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_17_BITMASK_I_IPV4_DST_ADDR }
},
[445] = {
.class_hid = BNXT_ULP_CLASS_HID_102cc,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 265216UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10338,14 +10338,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI }
},
[446] = {
.class_hid = BNXT_ULP_CLASS_HID_116ec,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 273408UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10357,15 +10357,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI }
},
[447] = {
.class_hid = BNXT_ULP_CLASS_HID_146d0,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 1313792UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10377,15 +10377,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC }
},
[448] = {
.class_hid = BNXT_ULP_CLASS_HID_15af0,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 1321984UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10397,16 +10397,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC }
},
[449] = {
.class_hid = BNXT_ULP_CLASS_HID_120c2,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2362368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10418,15 +10418,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC }
},
[450] = {
.class_hid = BNXT_ULP_CLASS_HID_134e2,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2370560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10438,16 +10438,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC }
},
[451] = {
.class_hid = BNXT_ULP_CLASS_HID_16b26,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 3410944UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10459,16 +10459,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC }
},
[452] = {
.class_hid = BNXT_ULP_CLASS_HID_178c6,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 3419136UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10480,17 +10480,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC }
},
[453] = {
.class_hid = BNXT_ULP_CLASS_HID_115c6,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2147748864UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10502,15 +10502,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[454] = {
.class_hid = BNXT_ULP_CLASS_HID_10804,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2147757056UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10522,16 +10522,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[455] = {
.class_hid = BNXT_ULP_CLASS_HID_15822,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2148797440UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10543,16 +10543,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[456] = {
.class_hid = BNXT_ULP_CLASS_HID_14c60,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2148805632UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10564,17 +10564,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[457] = {
.class_hid = BNXT_ULP_CLASS_HID_13bd4,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2149846016UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10586,16 +10586,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[458] = {
.class_hid = BNXT_ULP_CLASS_HID_12e12,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2149854208UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10607,17 +10607,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[459] = {
.class_hid = BNXT_ULP_CLASS_HID_17e30,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2150894592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10629,17 +10629,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[460] = {
.class_hid = BNXT_ULP_CLASS_HID_17276,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 2150902784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10651,18 +10651,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR }
},
[461] = {
.class_hid = BNXT_ULP_CLASS_HID_11f1a,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4295232512UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10674,15 +10674,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[462] = {
.class_hid = BNXT_ULP_CLASS_HID_11358,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4295240704UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10694,16 +10694,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[463] = {
.class_hid = BNXT_ULP_CLASS_HID_14398,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4296281088UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10715,16 +10715,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[464] = {
.class_hid = BNXT_ULP_CLASS_HID_157b8,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4296289280UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10736,17 +10736,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[465] = {
.class_hid = BNXT_ULP_CLASS_HID_13d68,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4297329664UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10758,16 +10758,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[466] = {
.class_hid = BNXT_ULP_CLASS_HID_131aa,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4297337856UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10779,17 +10779,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[467] = {
.class_hid = BNXT_ULP_CLASS_HID_16192,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4298378240UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10801,17 +10801,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[468] = {
.class_hid = BNXT_ULP_CLASS_HID_175b2,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 4298386432UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10823,18 +10823,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[469] = {
.class_hid = BNXT_ULP_CLASS_HID_112b2,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6442716160UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10846,16 +10846,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[470] = {
.class_hid = BNXT_ULP_CLASS_HID_106f0,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6442724352UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10867,17 +10867,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[471] = {
.class_hid = BNXT_ULP_CLASS_HID_15692,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6443764736UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10889,17 +10889,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[472] = {
.class_hid = BNXT_ULP_CLASS_HID_14ad0,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6443772928UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10911,18 +10911,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[473] = {
.class_hid = BNXT_ULP_CLASS_HID_13080,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6444813312UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10934,17 +10934,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[474] = {
.class_hid = BNXT_ULP_CLASS_HID_124c2,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6444821504UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10956,18 +10956,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[475] = {
.class_hid = BNXT_ULP_CLASS_HID_174e0,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6445861888UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -10979,18 +10979,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[476] = {
.class_hid = BNXT_ULP_CLASS_HID_16f22,
.class_tid = 2,
- .hdr_sig_id = 5,
+ .hdr_sig_id = 18,
.flow_sig_id = 6445870080UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11002,19 +11002,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_5_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_5_BITMASK_I_IPV4_DST_ADDR }
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_18_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_18_BITMASK_I_IPV4_DST_ADDR }
},
[477] = {
.class_hid = BNXT_ULP_CLASS_HID_4025b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 66304UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11027,14 +11027,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI }
},
[478] = {
.class_hid = BNXT_ULP_CLASS_HID_41267,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 68352UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11047,15 +11047,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI }
},
[479] = {
.class_hid = BNXT_ULP_CLASS_HID_5122b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 328448UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11068,15 +11068,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC }
},
[480] = {
.class_hid = BNXT_ULP_CLASS_HID_50d51,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 330496UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11089,16 +11089,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC }
},
[481] = {
.class_hid = BNXT_ULP_CLASS_HID_48a63,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 590592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11111,15 +11111,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC }
},
[482] = {
.class_hid = BNXT_ULP_CLASS_HID_48589,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 592640UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11132,16 +11132,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC }
},
[483] = {
.class_hid = BNXT_ULP_CLASS_HID_5855d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 852736UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11154,16 +11154,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC }
},
[484] = {
.class_hid = BNXT_ULP_CLASS_HID_59519,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 854784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11176,17 +11176,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC }
},
[485] = {
.class_hid = BNXT_ULP_CLASS_HID_41e17,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134284032UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11199,15 +11199,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[486] = {
.class_hid = BNXT_ULP_CLASS_HID_4093d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134286080UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11220,16 +11220,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[487] = {
.class_hid = BNXT_ULP_CLASS_HID_50941,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134546176UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11242,16 +11242,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[488] = {
.class_hid = BNXT_ULP_CLASS_HID_5190d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134548224UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11264,17 +11264,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[489] = {
.class_hid = BNXT_ULP_CLASS_HID_48139,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134808320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11287,16 +11287,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[490] = {
.class_hid = BNXT_ULP_CLASS_HID_49145,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 134810368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11309,17 +11309,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[491] = {
.class_hid = BNXT_ULP_CLASS_HID_59109,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 135070464UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11332,17 +11332,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[492] = {
.class_hid = BNXT_ULP_CLASS_HID_58037,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 135072512UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11355,18 +11355,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR }
},
[493] = {
.class_hid = BNXT_ULP_CLASS_HID_4143d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 268501760UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11379,15 +11379,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[494] = {
.class_hid = BNXT_ULP_CLASS_HID_4079b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 268503808UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11400,16 +11400,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[495] = {
.class_hid = BNXT_ULP_CLASS_HID_507af,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 268763904UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11422,16 +11422,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[496] = {
.class_hid = BNXT_ULP_CLASS_HID_5172b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 268765952UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11444,17 +11444,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[497] = {
.class_hid = BNXT_ULP_CLASS_HID_49c05,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 269026048UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11467,16 +11467,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[498] = {
.class_hid = BNXT_ULP_CLASS_HID_48fa3,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 269028096UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11489,17 +11489,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[499] = {
.class_hid = BNXT_ULP_CLASS_HID_58f37,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 269288192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11512,17 +11512,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[500] = {
.class_hid = BNXT_ULP_CLASS_HID_59f33,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 269290240UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11535,18 +11535,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[501] = {
.class_hid = BNXT_ULP_CLASS_HID_4030b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 402719488UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11559,16 +11559,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[502] = {
.class_hid = BNXT_ULP_CLASS_HID_41317,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 402721536UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11581,17 +11581,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[503] = {
.class_hid = BNXT_ULP_CLASS_HID_5131b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 402981632UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11604,17 +11604,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[504] = {
.class_hid = BNXT_ULP_CLASS_HID_50201,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 402983680UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11627,18 +11627,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[505] = {
.class_hid = BNXT_ULP_CLASS_HID_48b13,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 403243776UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11651,17 +11651,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[506] = {
.class_hid = BNXT_ULP_CLASS_HID_49b1f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 403245824UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11674,18 +11674,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[507] = {
.class_hid = BNXT_ULP_CLASS_HID_59b23,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 403505920UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11698,18 +11698,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[508] = {
.class_hid = BNXT_ULP_CLASS_HID_58a09,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 403507968UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11722,19 +11722,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR }
},
[509] = {
.class_hid = BNXT_ULP_CLASS_HID_419bf,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 536937216UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11747,15 +11747,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[510] = {
.class_hid = BNXT_ULP_CLASS_HID_40925,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 536939264UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11768,16 +11768,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[511] = {
.class_hid = BNXT_ULP_CLASS_HID_508e9,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537199360UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11790,16 +11790,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[512] = {
.class_hid = BNXT_ULP_CLASS_HID_518b5,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537201408UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11812,17 +11812,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[513] = {
.class_hid = BNXT_ULP_CLASS_HID_48121,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537461504UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11835,16 +11835,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[514] = {
.class_hid = BNXT_ULP_CLASS_HID_490ed,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537463552UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11857,17 +11857,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[515] = {
.class_hid = BNXT_ULP_CLASS_HID_590b1,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537723648UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11880,17 +11880,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[516] = {
.class_hid = BNXT_ULP_CLASS_HID_583ff,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 537725696UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11903,18 +11903,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[517] = {
.class_hid = BNXT_ULP_CLASS_HID_41475,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671154944UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11927,16 +11927,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[518] = {
.class_hid = BNXT_ULP_CLASS_HID_40473,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671156992UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11949,17 +11949,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[519] = {
.class_hid = BNXT_ULP_CLASS_HID_50427,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671417088UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11972,17 +11972,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[520] = {
.class_hid = BNXT_ULP_CLASS_HID_51763,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671419136UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -11995,18 +11995,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[521] = {
.class_hid = BNXT_ULP_CLASS_HID_49c3d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671679232UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12019,17 +12019,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[522] = {
.class_hid = BNXT_ULP_CLASS_HID_48c3b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671681280UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12042,18 +12042,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[523] = {
.class_hid = BNXT_ULP_CLASS_HID_58f6f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671941376UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12066,18 +12066,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[524] = {
.class_hid = BNXT_ULP_CLASS_HID_59f2b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 671943424UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12090,19 +12090,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[525] = {
.class_hid = BNXT_ULP_CLASS_HID_40333,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805372672UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12115,16 +12115,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[526] = {
.class_hid = BNXT_ULP_CLASS_HID_412bf,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805374720UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12137,17 +12137,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[527] = {
.class_hid = BNXT_ULP_CLASS_HID_512a3,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805634816UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12160,17 +12160,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[528] = {
.class_hid = BNXT_ULP_CLASS_HID_50229,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805636864UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12183,18 +12183,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[529] = {
.class_hid = BNXT_ULP_CLASS_HID_48abb,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805896960UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12207,17 +12207,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[530] = {
.class_hid = BNXT_ULP_CLASS_HID_49aa7,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 805899008UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12230,18 +12230,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[531] = {
.class_hid = BNXT_ULP_CLASS_HID_59a2b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 806159104UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12254,18 +12254,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[532] = {
.class_hid = BNXT_ULP_CLASS_HID_595b1,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 806161152UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12278,19 +12278,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[533] = {
.class_hid = BNXT_ULP_CLASS_HID_41e2f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 939590400UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12303,17 +12303,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[534] = {
.class_hid = BNXT_ULP_CLASS_HID_40e35,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 939592448UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12326,18 +12326,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[535] = {
.class_hid = BNXT_ULP_CLASS_HID_50939,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 939852544UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12350,18 +12350,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[536] = {
.class_hid = BNXT_ULP_CLASS_HID_51925,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 939854592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12374,19 +12374,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[537] = {
.class_hid = BNXT_ULP_CLASS_HID_48631,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 940114688UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12399,18 +12399,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[538] = {
.class_hid = BNXT_ULP_CLASS_HID_4913d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 940116736UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12423,19 +12423,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[539] = {
.class_hid = BNXT_ULP_CLASS_HID_59121,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 940376832UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12448,19 +12448,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[540] = {
.class_hid = BNXT_ULP_CLASS_HID_5812f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 940378880UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12473,20 +12473,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT }
},
[541] = {
.class_hid = BNXT_ULP_CLASS_HID_41429,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1073808128UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12499,15 +12499,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[542] = {
.class_hid = BNXT_ULP_CLASS_HID_40747,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1073810176UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12520,16 +12520,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[543] = {
.class_hid = BNXT_ULP_CLASS_HID_5070b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074070272UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12542,16 +12542,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[544] = {
.class_hid = BNXT_ULP_CLASS_HID_51727,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074072320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12564,17 +12564,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[545] = {
.class_hid = BNXT_ULP_CLASS_HID_49fe1,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074332416UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12587,16 +12587,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[546] = {
.class_hid = BNXT_ULP_CLASS_HID_48f0f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074334464UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12609,17 +12609,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[547] = {
.class_hid = BNXT_ULP_CLASS_HID_58f23,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074594560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12632,17 +12632,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[548] = {
.class_hid = BNXT_ULP_CLASS_HID_59eef,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1074596608UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12655,18 +12655,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[549] = {
.class_hid = BNXT_ULP_CLASS_HID_40347,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208025856UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12679,16 +12679,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[550] = {
.class_hid = BNXT_ULP_CLASS_HID_41303,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208027904UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12701,17 +12701,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[551] = {
.class_hid = BNXT_ULP_CLASS_HID_51247,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208288000UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12724,17 +12724,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[552] = {
.class_hid = BNXT_ULP_CLASS_HID_5026d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208290048UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12747,18 +12747,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[553] = {
.class_hid = BNXT_ULP_CLASS_HID_48b0f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208550144UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12771,17 +12771,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[554] = {
.class_hid = BNXT_ULP_CLASS_HID_49a4b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208552192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12794,18 +12794,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[555] = {
.class_hid = BNXT_ULP_CLASS_HID_59a0f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208812288UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12818,18 +12818,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[556] = {
.class_hid = BNXT_ULP_CLASS_HID_58a05,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1208814336UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12842,19 +12842,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[557] = {
.class_hid = BNXT_ULP_CLASS_HID_41983,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342243584UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12867,16 +12867,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[558] = {
.class_hid = BNXT_ULP_CLASS_HID_40929,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342245632UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12889,17 +12889,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[559] = {
.class_hid = BNXT_ULP_CLASS_HID_5092d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342505728UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12912,17 +12912,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[560] = {
.class_hid = BNXT_ULP_CLASS_HID_518a9,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342507776UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12935,18 +12935,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[561] = {
.class_hid = BNXT_ULP_CLASS_HID_48125,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342767872UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12959,17 +12959,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[562] = {
.class_hid = BNXT_ULP_CLASS_HID_49121,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1342769920UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -12982,18 +12982,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[563] = {
.class_hid = BNXT_ULP_CLASS_HID_59085,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1343030016UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13006,18 +13006,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[564] = {
.class_hid = BNXT_ULP_CLASS_HID_58023,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1343032064UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13030,19 +13030,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[565] = {
.class_hid = BNXT_ULP_CLASS_HID_41509,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476461312UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13055,17 +13055,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[566] = {
.class_hid = BNXT_ULP_CLASS_HID_40407,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476463360UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13078,18 +13078,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[567] = {
.class_hid = BNXT_ULP_CLASS_HID_5040b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476723456UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13102,18 +13102,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[568] = {
.class_hid = BNXT_ULP_CLASS_HID_51407,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476725504UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13126,19 +13126,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[569] = {
.class_hid = BNXT_ULP_CLASS_HID_49d21,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476985600UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13151,18 +13151,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[570] = {
.class_hid = BNXT_ULP_CLASS_HID_48c0f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1476987648UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13175,19 +13175,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[571] = {
.class_hid = BNXT_ULP_CLASS_HID_58c03,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1477247744UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13200,19 +13200,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[572] = {
.class_hid = BNXT_ULP_CLASS_HID_59f0f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1477249792UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13225,20 +13225,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[573] = {
.class_hid = BNXT_ULP_CLASS_HID_402ef,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1610679040UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13251,16 +13251,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[574] = {
.class_hid = BNXT_ULP_CLASS_HID_412ab,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1610681088UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13273,17 +13273,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[575] = {
.class_hid = BNXT_ULP_CLASS_HID_5126f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1610941184UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13296,17 +13296,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[576] = {
.class_hid = BNXT_ULP_CLASS_HID_50de5,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1610943232UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13319,18 +13319,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[577] = {
.class_hid = BNXT_ULP_CLASS_HID_48aa7,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1611203328UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13343,17 +13343,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[578] = {
.class_hid = BNXT_ULP_CLASS_HID_485ed,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1611205376UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13366,18 +13366,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[579] = {
.class_hid = BNXT_ULP_CLASS_HID_585e1,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1611465472UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13390,18 +13390,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[580] = {
.class_hid = BNXT_ULP_CLASS_HID_595ad,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1611467520UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13414,19 +13414,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[581] = {
.class_hid = BNXT_ULP_CLASS_HID_41e6b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1744896768UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13439,17 +13439,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[582] = {
.class_hid = BNXT_ULP_CLASS_HID_40961,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1744898816UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13462,18 +13462,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[583] = {
.class_hid = BNXT_ULP_CLASS_HID_50925,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745158912UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13486,18 +13486,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[584] = {
.class_hid = BNXT_ULP_CLASS_HID_51961,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745160960UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13510,19 +13510,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[585] = {
.class_hid = BNXT_ULP_CLASS_HID_4816d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745421056UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13535,18 +13535,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[586] = {
.class_hid = BNXT_ULP_CLASS_HID_49129,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745423104UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13559,19 +13559,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[587] = {
.class_hid = BNXT_ULP_CLASS_HID_5916d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745683200UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13584,19 +13584,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[588] = {
.class_hid = BNXT_ULP_CLASS_HID_5806b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1745685248UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13609,20 +13609,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[589] = {
.class_hid = BNXT_ULP_CLASS_HID_414a1,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879114496UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13635,17 +13635,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[590] = {
.class_hid = BNXT_ULP_CLASS_HID_4042f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879116544UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13658,18 +13658,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[591] = {
.class_hid = BNXT_ULP_CLASS_HID_507a3,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879376640UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13682,18 +13682,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[592] = {
.class_hid = BNXT_ULP_CLASS_HID_517af,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879378688UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13706,19 +13706,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[593] = {
.class_hid = BNXT_ULP_CLASS_HID_49c29,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879638784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13731,18 +13731,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[594] = {
.class_hid = BNXT_ULP_CLASS_HID_48fa7,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879640832UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13755,19 +13755,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[595] = {
.class_hid = BNXT_ULP_CLASS_HID_58fab,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879900928UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13780,19 +13780,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[596] = {
.class_hid = BNXT_ULP_CLASS_HID_59f27,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 1879902976UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13805,20 +13805,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[597] = {
.class_hid = BNXT_ULP_CLASS_HID_4032f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013332224UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13831,18 +13831,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[598] = {
.class_hid = BNXT_ULP_CLASS_HID_4132b,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013334272UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13855,19 +13855,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[599] = {
.class_hid = BNXT_ULP_CLASS_HID_5132f,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013594368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13880,19 +13880,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[600] = {
.class_hid = BNXT_ULP_CLASS_HID_50225,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013596416UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13905,20 +13905,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[601] = {
.class_hid = BNXT_ULP_CLASS_HID_48b27,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013856512UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13931,19 +13931,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[602] = {
.class_hid = BNXT_ULP_CLASS_HID_49b23,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2013858560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13956,20 +13956,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[603] = {
.class_hid = BNXT_ULP_CLASS_HID_59b27,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2014118656UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -13982,20 +13982,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[604] = {
.class_hid = BNXT_ULP_CLASS_HID_58a2d,
.class_tid = 2,
- .hdr_sig_id = 6,
+ .hdr_sig_id = 19,
.flow_sig_id = 2014120704UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14008,21 +14008,21 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_SRC_PORT |
- BNXT_ULP_HF_0_2_6_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_SRC_PORT |
+ BNXT_ULP_HF_0_2_19_BITMASK_I_TCP_DST_PORT }
},
[605] = {
.class_hid = BNXT_ULP_CLASS_HID_10437,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 265216UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14035,14 +14035,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI }
},
[606] = {
.class_hid = BNXT_ULP_CLASS_HID_11017,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 273408UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14055,15 +14055,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI }
},
[607] = {
.class_hid = BNXT_ULP_CLASS_HID_1402b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1313792UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14076,15 +14076,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC }
},
[608] = {
.class_hid = BNXT_ULP_CLASS_HID_15c0b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1321984UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14097,16 +14097,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC }
},
[609] = {
.class_hid = BNXT_ULP_CLASS_HID_12639,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2362368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14119,15 +14119,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC }
},
[610] = {
.class_hid = BNXT_ULP_CLASS_HID_13219,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2370560UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14140,16 +14140,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC }
},
[611] = {
.class_hid = BNXT_ULP_CLASS_HID_16ddd,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3410944UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14162,16 +14162,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC }
},
[612] = {
.class_hid = BNXT_ULP_CLASS_HID_17e3d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3419136UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14184,17 +14184,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC }
},
[613] = {
.class_hid = BNXT_ULP_CLASS_HID_11333,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 537136128UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14207,15 +14207,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[614] = {
.class_hid = BNXT_ULP_CLASS_HID_10ef5,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 537144320UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14228,16 +14228,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[615] = {
.class_hid = BNXT_ULP_CLASS_HID_15f37,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 538184704UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14250,16 +14250,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[616] = {
.class_hid = BNXT_ULP_CLASS_HID_14ae9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 538192896UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14272,17 +14272,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[617] = {
.class_hid = BNXT_ULP_CLASS_HID_13d25,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 539233280UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14295,16 +14295,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[618] = {
.class_hid = BNXT_ULP_CLASS_HID_128e7,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 539241472UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14317,17 +14317,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[619] = {
.class_hid = BNXT_ULP_CLASS_HID_17939,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 540281856UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14340,17 +14340,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[620] = {
.class_hid = BNXT_ULP_CLASS_HID_174fb,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 540290048UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14363,18 +14363,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR }
},
[621] = {
.class_hid = BNXT_ULP_CLASS_HID_10985,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1074007040UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14387,15 +14387,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[622] = {
.class_hid = BNXT_ULP_CLASS_HID_10547,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1074015232UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14408,16 +14408,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[623] = {
.class_hid = BNXT_ULP_CLASS_HID_155a9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1075055616UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14430,16 +14430,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[624] = {
.class_hid = BNXT_ULP_CLASS_HID_1416b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1075063808UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14452,17 +14452,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[625] = {
.class_hid = BNXT_ULP_CLASS_HID_12ba7,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1076104192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14475,16 +14475,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[626] = {
.class_hid = BNXT_ULP_CLASS_HID_12749,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1076112384UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14497,17 +14497,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[627] = {
.class_hid = BNXT_ULP_CLASS_HID_177ab,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1077152768UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14520,17 +14520,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[628] = {
.class_hid = BNXT_ULP_CLASS_HID_1636d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1077160960UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14543,18 +14543,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[629] = {
.class_hid = BNXT_ULP_CLASS_HID_10463,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1610877952UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14567,16 +14567,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[630] = {
.class_hid = BNXT_ULP_CLASS_HID_110a3,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1610886144UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14589,17 +14589,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[631] = {
.class_hid = BNXT_ULP_CLASS_HID_14067,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1611926528UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14612,17 +14612,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[632] = {
.class_hid = BNXT_ULP_CLASS_HID_15c67,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1611934720UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14635,18 +14635,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[633] = {
.class_hid = BNXT_ULP_CLASS_HID_12665,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1612975104UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14659,17 +14659,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[634] = {
.class_hid = BNXT_ULP_CLASS_HID_13265,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1612983296UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14682,18 +14682,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[635] = {
.class_hid = BNXT_ULP_CLASS_HID_16269,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1614023680UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14706,18 +14706,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[636] = {
.class_hid = BNXT_ULP_CLASS_HID_17e69,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 1614031872UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14730,19 +14730,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR }
},
[637] = {
.class_hid = BNXT_ULP_CLASS_HID_1133d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2147748864UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14755,15 +14755,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[638] = {
.class_hid = BNXT_ULP_CLASS_HID_10eff,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2147757056UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14776,16 +14776,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[639] = {
.class_hid = BNXT_ULP_CLASS_HID_15ed9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2148797440UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14798,16 +14798,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[640] = {
.class_hid = BNXT_ULP_CLASS_HID_14a9b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2148805632UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14820,17 +14820,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[641] = {
.class_hid = BNXT_ULP_CLASS_HID_13d2f,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2149846016UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14843,16 +14843,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[642] = {
.class_hid = BNXT_ULP_CLASS_HID_128e9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2149854208UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14865,17 +14865,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[643] = {
.class_hid = BNXT_ULP_CLASS_HID_178cb,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2150894592UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14888,17 +14888,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[644] = {
.class_hid = BNXT_ULP_CLASS_HID_1748d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2150902784UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14911,18 +14911,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[645] = {
.class_hid = BNXT_ULP_CLASS_HID_109fb,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2684619776UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14935,16 +14935,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[646] = {
.class_hid = BNXT_ULP_CLASS_HID_105bd,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2684627968UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14957,17 +14957,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[647] = {
.class_hid = BNXT_ULP_CLASS_HID_155bf,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2685668352UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -14980,17 +14980,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[648] = {
.class_hid = BNXT_ULP_CLASS_HID_14179,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2685676544UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15003,18 +15003,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[649] = {
.class_hid = BNXT_ULP_CLASS_HID_12bed,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2686716928UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15027,17 +15027,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[650] = {
.class_hid = BNXT_ULP_CLASS_HID_127af,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2686725120UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15050,18 +15050,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[651] = {
.class_hid = BNXT_ULP_CLASS_HID_177a9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2687765504UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15074,18 +15074,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[652] = {
.class_hid = BNXT_ULP_CLASS_HID_1636b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 2687773696UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15098,19 +15098,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[653] = {
.class_hid = BNXT_ULP_CLASS_HID_1046d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3221490688UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15123,16 +15123,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[654] = {
.class_hid = BNXT_ULP_CLASS_HID_1104d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3221498880UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15145,17 +15145,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[655] = {
.class_hid = BNXT_ULP_CLASS_HID_14009,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3222539264UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15168,17 +15168,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[656] = {
.class_hid = BNXT_ULP_CLASS_HID_15c69,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3222547456UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15191,18 +15191,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[657] = {
.class_hid = BNXT_ULP_CLASS_HID_1260f,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3223587840UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15215,17 +15215,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[658] = {
.class_hid = BNXT_ULP_CLASS_HID_1326f,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3223596032UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15238,18 +15238,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[659] = {
.class_hid = BNXT_ULP_CLASS_HID_1622b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3224636416UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15262,18 +15262,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[660] = {
.class_hid = BNXT_ULP_CLASS_HID_17e0b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3224644608UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15286,19 +15286,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[661] = {
.class_hid = BNXT_ULP_CLASS_HID_11369,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3758361600UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15311,17 +15311,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[662] = {
.class_hid = BNXT_ULP_CLASS_HID_10f2b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3758369792UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15334,18 +15334,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[663] = {
.class_hid = BNXT_ULP_CLASS_HID_15f6d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3759410176UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15358,18 +15358,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[664] = {
.class_hid = BNXT_ULP_CLASS_HID_14b2f,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3759418368UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15382,19 +15382,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[665] = {
.class_hid = BNXT_ULP_CLASS_HID_13d6b,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3760458752UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15407,18 +15407,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[666] = {
.class_hid = BNXT_ULP_CLASS_HID_1292d,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3760466944UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15431,19 +15431,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[667] = {
.class_hid = BNXT_ULP_CLASS_HID_1792f,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3761507328UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15456,19 +15456,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[668] = {
.class_hid = BNXT_ULP_CLASS_HID_174e9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 3761515520UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15481,20 +15481,20 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_SRC_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_SRC_PORT }
},
[669] = {
.class_hid = BNXT_ULP_CLASS_HID_119e1,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4295232512UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15507,15 +15507,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[670] = {
.class_hid = BNXT_ULP_CLASS_HID_115a3,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4295240704UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15528,16 +15528,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[671] = {
.class_hid = BNXT_ULP_CLASS_HID_14563,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4296281088UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15550,16 +15550,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[672] = {
.class_hid = BNXT_ULP_CLASS_HID_15143,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4296289280UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15572,17 +15572,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[673] = {
.class_hid = BNXT_ULP_CLASS_HID_13b93,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4297329664UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15595,16 +15595,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[674] = {
.class_hid = BNXT_ULP_CLASS_HID_13751,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4297337856UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15617,17 +15617,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[675] = {
.class_hid = BNXT_ULP_CLASS_HID_16769,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4298378240UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15640,17 +15640,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[676] = {
.class_hid = BNXT_ULP_CLASS_HID_17349,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4298386432UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15663,18 +15663,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[677] = {
.class_hid = BNXT_ULP_CLASS_HID_114ab,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4832103424UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15687,16 +15687,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[678] = {
.class_hid = BNXT_ULP_CLASS_HID_10061,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4832111616UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15709,17 +15709,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[679] = {
.class_hid = BNXT_ULP_CLASS_HID_15063,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4833152000UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15732,17 +15732,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[680] = {
.class_hid = BNXT_ULP_CLASS_HID_14c21,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4833160192UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15755,18 +15755,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[681] = {
.class_hid = BNXT_ULP_CLASS_HID_13671,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4834200576UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15779,17 +15779,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[682] = {
.class_hid = BNXT_ULP_CLASS_HID_12233,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4834208768UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15802,18 +15802,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[683] = {
.class_hid = BNXT_ULP_CLASS_HID_17271,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4835249152UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15826,18 +15826,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[684] = {
.class_hid = BNXT_ULP_CLASS_HID_16e33,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 4835257344UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15850,19 +15850,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[685] = {
.class_hid = BNXT_ULP_CLASS_HID_102c1,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5368974336UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15875,16 +15875,16 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[686] = {
.class_hid = BNXT_ULP_CLASS_HID_11f21,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5368982528UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15897,17 +15897,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[687] = {
.class_hid = BNXT_ULP_CLASS_HID_14ee1,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5370022912UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15920,17 +15920,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[688] = {
.class_hid = BNXT_ULP_CLASS_HID_15ac1,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5370031104UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15943,18 +15943,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[689] = {
.class_hid = BNXT_ULP_CLASS_HID_12cc3,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5371071488UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15967,17 +15967,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[690] = {
.class_hid = BNXT_ULP_CLASS_HID_13923,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5371079680UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -15990,18 +15990,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[691] = {
.class_hid = BNXT_ULP_CLASS_HID_168e3,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5372120064UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -16014,18 +16014,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[692] = {
.class_hid = BNXT_ULP_CLASS_HID_164a9,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5372128256UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -16038,19 +16038,19 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_SMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[693] = {
.class_hid = BNXT_ULP_CLASS_HID_11e29,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5905845248UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -16063,17 +16063,17 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[694] = {
.class_hid = BNXT_ULP_CLASS_HID_115eb,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5905853440UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -16086,18 +16086,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_UDP_DST_PORT |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }
},
[695] = {
.class_hid = BNXT_ULP_CLASS_HID_145a3,
.class_tid = 2,
- .hdr_sig_id = 7,
+ .hdr_sig_id = 20,
.flow_sig_id = 5906893824UL,
.flow_pattern_id = 1,
.app_sig = 0,
@@ -16110,18 +16110,18 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_I_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_T_VXLAN_VNI |
- BNXT_ULP_HF_0_2_7_BITMASK_I_ETH_DMAC |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_SRC_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_IPV6_DST_ADDR |
- BNXT_ULP_HF_0_2_7_BITMASK_I_TCP_DST_PORT }
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_SRC_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_IPV6_DST_ADDR |
+ BNXT_ULP_HF_0_2_20_BITMASK_I_TCP_DST_PORT }