[v2,1/1] baseband/acc: fix ring memory allocation logic

Message ID 20241108003238.1921588-2-nicolas.chautru@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Maxime Coquelin
Headers
Series baseband/acc: fix ring memory allocation logic\ |

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Commit Message

Nicolas Chautru Nov. 8, 2024, 12:32 a.m. UTC
Allowing ring memory allocation whose end address is aligned with 64 MB.
Previous logic was off by one.

Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
Cc: stable@dpdk.org

Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
---
 drivers/baseband/acc/acc_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Maxime Coquelin Nov. 8, 2024, 9 a.m. UTC | #1
On 11/8/24 01:32, Nicolas Chautru wrote:
> Allowing ring memory allocation whose end address is aligned with 64 MB.
> Previous logic was off by one.
> 
> Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
>   drivers/baseband/acc/acc_common.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
> index 4c60b7896b..bf218332be 100644
> --- a/drivers/baseband/acc/acc_common.h
> +++ b/drivers/baseband/acc/acc_common.h
> @@ -795,7 +795,7 @@ alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d,
>   				sw_rings_base, ACC_SIZE_64MBYTE);
>   		next_64mb_align_addr_iova = sw_rings_base_iova +
>   				next_64mb_align_offset;
> -		sw_ring_iova_end_addr = sw_rings_base_iova + dev_sw_ring_size;
> +		sw_ring_iova_end_addr = sw_rings_base_iova + dev_sw_ring_size - 1;
>   
>   		/* Check if the end of the sw ring memory block is before the
>   		 * start of next 64MB aligned mem address
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks,
Maxime
  
Maxime Coquelin Nov. 8, 2024, 10:32 a.m. UTC | #2
On 11/8/24 01:32, Nicolas Chautru wrote:
> Allowing ring memory allocation whose end address is aligned with 64 MB.
> Previous logic was off by one.
> 
> Fixes: 060e76729302 ("baseband/acc100: add queue configuration")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com>
> ---
>   drivers/baseband/acc/acc_common.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 

Applied to next-baseband/for-main

Thanks,
Maxime
  

Patch

diff --git a/drivers/baseband/acc/acc_common.h b/drivers/baseband/acc/acc_common.h
index 4c60b7896b..bf218332be 100644
--- a/drivers/baseband/acc/acc_common.h
+++ b/drivers/baseband/acc/acc_common.h
@@ -795,7 +795,7 @@  alloc_sw_rings_min_mem(struct rte_bbdev *dev, struct acc_device *d,
 				sw_rings_base, ACC_SIZE_64MBYTE);
 		next_64mb_align_addr_iova = sw_rings_base_iova +
 				next_64mb_align_offset;
-		sw_ring_iova_end_addr = sw_rings_base_iova + dev_sw_ring_size;
+		sw_ring_iova_end_addr = sw_rings_base_iova + dev_sw_ring_size - 1;
 
 		/* Check if the end of the sw ring memory block is before the
 		 * start of next 64MB aligned mem address