[v1] common/iavf: introduce hardware clock ID in PTP caps

Message ID 20250115072323.1117429-1-soumyadeep.hore@intel.com (mailing list archive)
State Deferred
Delegated to: Bruce Richardson
Headers
Series [v1] common/iavf: introduce hardware clock ID in PTP caps |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Functional success Functional PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-sample-apps-testing success Testing PASS
ci/iol-compile-amd64-testing success Testing PASS

Commit Message

Soumyadeep Hore Jan. 15, 2025, 7:23 a.m. UTC
From: Jun Zhang <xuejun.zhang@intel.com>

When there are at least two VFs on a single adapter and both are used in
the same VM, each of them will register its own PTP clock. However, every
E810/E822 adapter has only one PHC clock that we use. In order to register
only one PTP clock, VFs need to identify HW and make sure they come from
the same board.

This patch adds a @hardware_clock_id that helps in this identification.
VFs from the same board should receive the same @hardware_clock_id and VFs
from two different boards should receive different IDs.

Signed-off-by: Jun Zhang <xuejun.zhang@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
 drivers/common/iavf/virtchnl.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
  

Comments

Bruce Richardson Jan. 21, 2025, 2:52 p.m. UTC | #1
On Wed, Jan 15, 2025 at 07:23:23AM +0000, Soumyadeep Hore wrote:
> From: Jun Zhang <xuejun.zhang@intel.com>
> 
> When there are at least two VFs on a single adapter and both are used in
> the same VM, each of them will register its own PTP clock. However, every
> E810/E822 adapter has only one PHC clock that we use. In order to register
> only one PTP clock, VFs need to identify HW and make sure they come from
> the same board.
> 
> This patch adds a @hardware_clock_id that helps in this identification.
> VFs from the same board should receive the same @hardware_clock_id and VFs
> from two different boards should receive different IDs.
> 
> Signed-off-by: Jun Zhang <xuejun.zhang@intel.com>
> Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
> ---
>  drivers/common/iavf/virtchnl.h | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
> index c0d52ddd32..f4ca2cc9f0 100644
> --- a/drivers/common/iavf/virtchnl.h
> +++ b/drivers/common/iavf/virtchnl.h
> @@ -2224,6 +2224,7 @@ VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
>  #define VIRTCHNL_1588_PTP_CAP_PHC_REGS		BIT(4)
>  #define VIRTCHNL_1588_PTP_CAP_SYNCE			BIT(6)
>  #define VIRTCHNL_1588_PTP_CAP_GNSS			BIT(7)
> +#define VIRTCHNL_1588_PTP_CAP_HARDWARE_CLOCK_ID	BIT(8)
>  
>  struct virtchnl_phc_regs {
>  	u32 clock_hi;
> @@ -2248,7 +2249,8 @@ struct virtchnl_ptp_caps {
>  	u8 n_per_out;
>  	u8 n_pins;
>  	u8 tx_tstamp_format;
> -	u8 rsvd[11];
> +	u8 hardware_clock_id;
> +	u8 rsvd[10];
>  };
>  

These definitions look fine to me, but on the other hand it seems strange
adding them without any user of them. Can we defer this patch until such
time as we have a patch with code which uses these fields?

/Bruce
  

Patch

diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index c0d52ddd32..f4ca2cc9f0 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -2224,6 +2224,7 @@  VIRTCHNL_CHECK_STRUCT_LEN(12, virtchnl_quanta_cfg);
 #define VIRTCHNL_1588_PTP_CAP_PHC_REGS		BIT(4)
 #define VIRTCHNL_1588_PTP_CAP_SYNCE			BIT(6)
 #define VIRTCHNL_1588_PTP_CAP_GNSS			BIT(7)
+#define VIRTCHNL_1588_PTP_CAP_HARDWARE_CLOCK_ID	BIT(8)
 
 struct virtchnl_phc_regs {
 	u32 clock_hi;
@@ -2248,7 +2249,8 @@  struct virtchnl_ptp_caps {
 	u8 n_per_out;
 	u8 n_pins;
 	u8 tx_tstamp_format;
-	u8 rsvd[11];
+	u8 hardware_clock_id;
+	u8 rsvd[10];
 };
 
 VIRTCHNL_CHECK_STRUCT_LEN(48, virtchnl_ptp_caps);