| Message ID | 20250205104548.1533554-30-sil-plv@napatech.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Stephen Hemminger |
| Headers |
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| Series |
net/ntnic: bugfixes and refactoring
|
|
Checks
| Context | Check | Description |
|---|---|---|
| ci/checkpatch | success | coding style OK |
Commit Message
Serhii Iliushyk
Feb. 5, 2025, 10:45 a.m. UTC
FPGA module mapping(to string) was extended with new fpga's modules.
Signed-off-by: Serhii Iliushyk <sil-plv@napatech.com>
---
.../nthw/supported/nthw_fpga_mod_str_map.c | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_str_map.c b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_str_map.c index e8ed7faf0d..459cc724c2 100644 --- a/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_str_map.c +++ b/drivers/net/ntnic/nthw/supported/nthw_fpga_mod_str_map.c @@ -6,20 +6,44 @@ #include "nthw_fpga_mod_str_map.h" const struct nthw_fpga_mod_str_s sa_nthw_fpga_mod_str_map[] = { + { MOD_CAT, "CAT" }, + { MOD_CPY, "CPY" }, + { MOD_CSU, "CSU" }, + { MOD_DBS, "DBS" }, + { MOD_FLM, "FLM" }, { MOD_GFG, "GFG" }, { MOD_GMF, "GMF" }, { MOD_GPIO_PHY, "GPIO_PHY" }, + { MOD_HFU, "HFU" }, { MOD_HIF, "HIF" }, + { MOD_HSH, "HSH" }, { MOD_I2CM, "I2CM" }, + { MOD_IFR, "IFR" }, { MOD_IIC, "IIC" }, + { MOD_INS, "INS" }, + { MOD_KM, "KM" }, { MOD_MAC_PCS, "MAC_PCS" }, { MOD_PCIE3, "PCIE3" }, + { MOD_MAC_RX, "MAC_RX" }, + { MOD_MAC_TX, "MAC_TX" }, { MOD_PCI_RD_TG, "PCI_RD_TG" }, { MOD_PCI_WR_TG, "PCI_WR_TG" }, + { MOD_PCIE3, "PCIE3" }, + { MOD_PDB, "PDB" }, + { MOD_QSL, "QSL" }, { MOD_RAC, "RAC" }, + { MOD_RMC, "RMC" }, + { MOD_RPF, "RPF" }, + { MOD_RPL, "RPL" }, + { MOD_RPP_LR, "RPP_LR" }, { MOD_RST9563, "RST9563" }, { MOD_SDC, "SDC" }, + { MOD_SLC_LR, "SLC_LR" }, + { MOD_SLC, "SLC" }, { MOD_STA, "STA" }, { MOD_TSM, "TSM" }, + { MOD_TX_CPY, "TX_CPY" }, + { MOD_TX_INS, "TX_INS" }, + { MOD_TX_RPL, "TX_RPL" }, { 0UL, NULL } };