diff mbox series

[v2] config/arm: add HiSilicon HIP12

Message ID 20251029011626.9298-1-fengchengwen@huawei.com (mailing list archive)
State Accepted
Delegated to: Thomas Monjalon
Headers
Series [v2] config/arm: add HiSilicon HIP12 |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-mellanox-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/intel-Testing success Testing PASS
ci/github-robot: build success github build: passed
ci/github-robot-post success github post: success
ci/intel-Functional success Functional PASS
ci/iol-unit-amd64-testing success Testing PASS
ci/iol-sample-apps-testing warning Testing issues
ci/iol-compile-amd64-testing warning Testing issues
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-marvell-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-compile-arm64-testing success Testing PASS
ci/iol-unit-arm64-testing success Testing PASS
ci/aws-unit-testing success Unit Testing PASS

Commit Message

fengchengwen Oct. 29, 2025, 1:16 a.m. UTC 
Adding support for HiSilicon HIP12 platform.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
---
 config/arm/arm64_hip12_linux_gcc | 17 +++++++++++++++++
 config/arm/meson.build           | 22 ++++++++++++++++++++++
 2 files changed, 39 insertions(+)
 create mode 100644 config/arm/arm64_hip12_linux_gcc

---
v2: try to fix meson build error "Expecting eof got rcurl"

Comments

lihuisong (C) Oct. 29, 2025, 2:02 a.m. UTC | #1 
在 2025/10/29 9:16, Chengwen Feng 写道:
> Adding support for HiSilicon HIP12 platform.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> ---
>
Thanks,
Acked-by: lihuisong@huawei.com
Thomas Monjalon Nov. 5, 2025, 3:09 p.m. UTC | #2 
> > Adding support for HiSilicon HIP12 platform.
> >
> > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> > ---
> >
> Thanks,
> Acked-by: lihuisong@huawei.com

Applied, thanks.
diff mbox series

Patch

diff --git a/config/arm/arm64_hip12_linux_gcc b/config/arm/arm64_hip12_linux_gcc
new file mode 100644
index 0000000000..949093d67b
--- /dev/null
+++ b/config/arm/arm64_hip12_linux_gcc
@@ -0,0 +1,17 @@ 
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pkg-config = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8.5-a'
+endian = 'little'
+
+[properties]
+platform = 'hip12'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index ec9e08cb5e..c0aa21b57d 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -255,6 +255,15 @@  implementer_hisilicon = {
                 ['RTE_MAX_LCORE', 1280],
                 ['RTE_MAX_NUMA_NODES', 16]
             ]
+        },
+        '0xd06': {
+            'mcpu': 'mcpu_hip12',
+            'flags': [
+                ['RTE_MACHINE', '"hip12"'],
+                ['RTE_ARM_FEATURE_ATOMICS', true],
+                ['RTE_MAX_LCORE', 1280],
+                ['RTE_MAX_NUMA_NODES', 16]
+            ]
         }
     }
 }
@@ -562,6 +571,13 @@  soc_hip10 = {
     'numa': true
 }
 
+soc_hip12 = {
+    'description': 'HiSilicon HIP12',
+    'implementer': '0x48',
+    'part_number': '0xd06',
+    'numa': true
+}
+
 soc_imx = {
     'description': 'NXP IMX',
     'implementer': '0x41',
@@ -703,6 +719,10 @@  mcpu_defs = {
         'march': 'armv8.5-a',
         'march_extensions': ['crypto', 'sve']
     },
+    'mcpu_hip12': {
+        'march': 'armv8.5-a',
+        'march_extensions': ['crypto', 'sve']
+    },
     'mcpu_kunpeng930': {
         'march': 'armv8.2-a',
         'march_extensions': ['crypto', 'sve']
@@ -758,6 +778,7 @@  graviton2:       AWS Graviton2
 graviton3:       AWS Graviton3
 graviton4:       AWS Graviton4
 hip10:           HiSilicon HIP10
+hip12:           HiSilicon HIP12
 imx:             NXP IMX
 kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
@@ -801,6 +822,7 @@  socs = {
     'graviton3': soc_graviton3,
     'graviton4': soc_graviton4,
     'hip10': soc_hip10,
+    'hip12': soc_hip12,
     'imx': soc_imx,
     'kunpeng920': soc_kunpeng920,
     'kunpeng930': soc_kunpeng930,